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| author | Jan Beulich <jbeulich@suse.com> | 2022-12-12 13:53:40 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2022-12-12 13:53:40 +0100 |
| commit | 77a19f0e19391dd243f8090a613324c8836e1f8a (patch) | |
| tree | 621153d799fd4e28aa09ba2da60cad0c5a30aabd /opcodes/i386-opc.tbl | |
| parent | e3669c7f7ba400bb56738d5460a3ea194916599d (diff) | |
| download | gdb-77a19f0e19391dd243f8090a613324c8836e1f8a.zip gdb-77a19f0e19391dd243f8090a613324c8836e1f8a.tar.gz gdb-77a19f0e19391dd243f8090a613324c8836e1f8a.tar.bz2 | |
x86: drop (now) stray IsString
The need for them on the operand-less string insns has gone away with
the removal of maybe_adjust_templates() and associated logic. Since
i386_index_check() needs adjustment then anyway, take the opportunity
and also simplify it, possible again as a result of said removal (plus
the opcode template adjustments done here).
Diffstat (limited to 'opcodes/i386-opc.tbl')
| -rw-r--r-- | opcodes/i386-opc.tbl | 26 |
1 files changed, 13 insertions, 13 deletions
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl index a6e820a..9eba0a3 100644 --- a/opcodes/i386-opc.tbl +++ b/opcodes/i386-opc.tbl @@ -490,37 +490,37 @@ loopne, 0xe0, None, Cpu64, JumpByte|No_bSuf|No_wSuf|No_sSuf|NoRex64, { Disp8 } set<cc>, 0xf9<cc:opc>, 0, Cpu386, Modrm|No_wSuf|No_lSuf|No_sSuf|No_qSuf, { Reg8|Byte|Unspecified|BaseIndex } // String manipulation. -cmps, 0xa6, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +cmps, 0xa6, None, 0, W|No_sSuf|RepPrefixOk, {} cmps, 0xa6, None, 0, W|No_sSuf|IsStringEsOp0|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex, Byte|Word|Dword|Qword|Unspecified|BaseIndex } -scmp, 0xa6, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +scmp, 0xa6, None, 0, W|No_sSuf|RepPrefixOk, {} scmp, 0xa6, None, 0, W|No_sSuf|IsStringEsOp0|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex, Byte|Word|Dword|Qword|Unspecified|BaseIndex } -ins, 0x6c, None, Cpu186, W|No_sSuf|No_qSuf|IsString|RepPrefixOk, {} +ins, 0x6c, None, Cpu186, W|No_sSuf|No_qSuf|RepPrefixOk, {} ins, 0x6c, None, Cpu186, W|No_sSuf|No_qSuf|IsStringEsOp1|RepPrefixOk, { InOutPortReg, Byte|Word|Dword|Unspecified|BaseIndex } -outs, 0x6e, None, Cpu186, W|No_sSuf|No_qSuf|IsString|RepPrefixOk, {} +outs, 0x6e, None, Cpu186, W|No_sSuf|No_qSuf|RepPrefixOk, {} outs, 0x6e, None, Cpu186, W|No_sSuf|No_qSuf|IsString|RepPrefixOk, { Byte|Word|Dword|Unspecified|BaseIndex, InOutPortReg } -lods, 0xac, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +lods, 0xac, None, 0, W|No_sSuf|RepPrefixOk, {} lods, 0xac, None, 0, W|No_sSuf|IsString|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex } lods, 0xac, None, 0, W|No_sSuf|IsString|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword } -slod, 0xac, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +slod, 0xac, None, 0, W|No_sSuf|RepPrefixOk, {} slod, 0xac, None, 0, W|No_sSuf|IsString|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex } slod, 0xac, None, 0, W|No_sSuf|IsString|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword } -movs, 0xa4, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +movs, 0xa4, None, 0, W|No_sSuf|RepPrefixOk, {} movs, 0xa4, None, 0, W|No_sSuf|IsStringEsOp1|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex, Byte|Word|Dword|Qword|Unspecified|BaseIndex } -smov, 0xa4, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +smov, 0xa4, None, 0, W|No_sSuf|RepPrefixOk, {} smov, 0xa4, None, 0, W|No_sSuf|IsStringEsOp1|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex, Byte|Word|Dword|Qword|Unspecified|BaseIndex } -scas, 0xae, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +scas, 0xae, None, 0, W|No_sSuf|RepPrefixOk, {} scas, 0xae, None, 0, W|No_sSuf|IsStringEsOp0|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex } scas, 0xae, None, 0, W|No_sSuf|IsStringEsOp0|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword } -ssca, 0xae, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +ssca, 0xae, None, 0, W|No_sSuf|RepPrefixOk, {} ssca, 0xae, None, 0, W|No_sSuf|IsStringEsOp0|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex } ssca, 0xae, None, 0, W|No_sSuf|IsStringEsOp0|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex, Acc|Byte|Word|Dword|Qword } -stos, 0xaa, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +stos, 0xaa, None, 0, W|No_sSuf|RepPrefixOk, {} stos, 0xaa, None, 0, W|No_sSuf|IsStringEsOp0|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex } stos, 0xaa, None, 0, W|No_sSuf|IsStringEsOp1|RepPrefixOk, { Acc|Byte|Word|Dword|Qword, Byte|Word|Dword|Qword|Unspecified|BaseIndex } -ssto, 0xaa, None, 0, W|No_sSuf|IsString|RepPrefixOk, {} +ssto, 0xaa, None, 0, W|No_sSuf|RepPrefixOk, {} ssto, 0xaa, None, 0, W|No_sSuf|IsStringEsOp0|RepPrefixOk, { Byte|Word|Dword|Qword|Unspecified|BaseIndex } ssto, 0xaa, None, 0, W|No_sSuf|IsStringEsOp1|RepPrefixOk, { Acc|Byte|Word|Dword|Qword, Byte|Word|Dword|Qword|Unspecified|BaseIndex } -xlat, 0xd7, None, 0, No_wSuf|No_lSuf|No_sSuf|No_qSuf|IsString, {} +xlat, 0xd7, None, 0, No_wSuf|No_lSuf|No_sSuf|No_qSuf, {} xlat, 0xd7, None, 0, No_wSuf|No_lSuf|No_sSuf|No_qSuf|IsString, { Byte|Unspecified|BaseIndex } // Bit manipulation. |