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author | Sudakshina Das <sudi.das@arm.com> | 2018-11-12 12:58:26 +0000 |
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committer | Sudakshina Das <sudi.das@arm.com> | 2018-11-12 12:59:42 +0000 |
commit | b731bc3b1bd122872a6aff68aafba1eda64a98d1 (patch) | |
tree | 9d16181a8c68a83ed69a5a1f1d5542888aa1444b /gas | |
parent | 193614f2b908c2b55c188cb14c3ef78993ff85b0 (diff) | |
download | gdb-b731bc3b1bd122872a6aff68aafba1eda64a98d1.zip gdb-b731bc3b1bd122872a6aff68aafba1eda64a98d1.tar.gz gdb-b731bc3b1bd122872a6aff68aafba1eda64a98d1.tar.bz2 |
[BINUTILS, AARCH64, 3/8] Add Pointer Arithmetic instructions in Memory Tagging Extension
This patch is part of the patch series to add support for ARMv8.5-A
Memory Tagging Extensions which is an optional extension to
ARMv8.5-A and is enabled using the +memtag command line option.
This patch add support to the Pointer Arithmetic instructions from
MTE. These are the following instructions added in this patch:
- SUBP <Xd>, <Xn|SP>, <Xm|SP>
- SUBPS <Xd>, <Xn|SP>, <Xm|SP>
- CMPP <Xn|SP>, <Xm|SP>
where CMPP is an alias to SUBPS XZR, <Xn|SP>, <Xm|SP>
where
<Xd> : Is the 64-bit destination GPR.
<Xn|SP> : Is the 64-bit first source GPR or Stack pointer.
<Xm|SP> : Is the 64-bit second source GPR or Stack pointer.
*** opcodes/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* aarch64-tbl.h (aarch64_opcode_table): Add subp, subps and cmpp.
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
*** gas/ChangeLog ***
2018-11-12 Sudakshina Das <sudi.das@arm.com>
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for subp,
subps and cmpp.
* testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
Diffstat (limited to 'gas')
-rw-r--r-- | gas/ChangeLog | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/armv8_5-a-memtag.d | 22 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/armv8_5-a-memtag.s | 20 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/illegal-memtag.l | 8 | ||||
-rw-r--r-- | gas/testsuite/gas/aarch64/illegal-memtag.s | 8 |
5 files changed, 66 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 605fd05..784a638 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,13 @@ 2018-11-12 Sudakshina Das <sudi.das@arm.com> + * testsuite/gas/aarch64/armv8_5-a-memtag.s: Add tests for subp, + subps and cmpp. + * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise. + * testsuite/gas/aarch64/illegal-memtag.s: Likewise. + * testsuite/gas/aarch64/illegal-memtag.l: Likewise. + +2018-11-12 Sudakshina Das <sudi.das@arm.com> + * config/tc-aarch64.c (parse_operands): Add switch case for AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10. * testsuite/gas/aarch64/armv8_5-a-memtag.s: New. diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d index 4610461..a7cb6c4 100644 --- a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d +++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d @@ -33,3 +33,25 @@ Disassembly of section \.text: .*: d180037b subg x27, x27, #0x0, #0x0 .*: d1bf3fe0 subg x0, sp, #0x3f0, #0xf .*: d1bf141f subg sp, x0, #0x3f0, #0x5 +.*: 9ac00000 subp x0, x0, x0 +.*: 9ac0001b subp x27, x0, x0 +.*: 9ac00360 subp x0, x27, x0 +.*: 9adb0000 subp x0, x0, x27 +.*: 9adb037b subp x27, x27, x27 +.*: 9ac003e0 subp x0, sp, x0 +.*: 9adf0000 subp x0, x0, sp +.*: 9ac0001f subp xzr, x0, x0 +.*: bac00000 subps x0, x0, x0 +.*: bac0001b subps x27, x0, x0 +.*: bac00360 subps x0, x27, x0 +.*: badb0000 subps x0, x0, x27 +.*: badb037b subps x27, x27, x27 +.*: bac003e0 subps x0, sp, x0 +.*: badf0000 subps x0, x0, sp +.*: bac0001f cmpp x0, x0 +.*: bac0001f cmpp x0, x0 +.*: bac0037f cmpp x27, x0 +.*: badb001f cmpp x0, x27 +.*: badb037f cmpp x27, x27 +.*: bac003ff cmpp sp, x0 +.*: badf001f cmpp x0, sp diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s index 96a3f37..f17f87e 100644 --- a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s +++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s @@ -35,3 +35,23 @@ func: expand_2_reg subg subg x0, sp, #0x3f0, #0xf subg sp, x0, #0x3f0, #0x5 + + # SUBP + expand_3_reg subp + subp x0, sp, x0 + subp x0, x0, sp + subp xzr, x0, x0 + + # SUBPS + expand_3_reg subps + subps x0, sp, x0 + subps x0, x0, sp + subps xzr, x0, x0 + + # CMPP + cmpp x0, x0 + cmpp x27, x0 + cmpp x0, x27 + cmpp x27, x27 + cmpp sp, x0 + cmpp x0, sp diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.l b/gas/testsuite/gas/aarch64/illegal-memtag.l index 501faa7..4da0c35 100644 --- a/gas/testsuite/gas/aarch64/illegal-memtag.l +++ b/gas/testsuite/gas/aarch64/illegal-memtag.l @@ -12,3 +12,11 @@ [^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `gmi x1,xzr,x3' [^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `addg xzr,x2,#0,#0' [^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `subg x1,xzr,#0,#0' +[^:]*:[0-9]+: Error: operand 1 must be an integer register -- `subp sp,x1,x2' +[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `subp x1,xzr,x2' +[^:]*:[0-9]+: Error: operand 3 must be an integer or stack pointer register -- `subp x1,x2,xzr' +[^:]*:[0-9]+: Error: operand 1 must be an integer register -- `subps sp,x1,x2' +[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `subps x1,xzr,x2' +[^:]*:[0-9]+: Error: operand 3 must be an integer or stack pointer register -- `subps x1,x2,xzr' +[^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `cmpp xzr,x2' +[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `cmpp x2,xzr' diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.s b/gas/testsuite/gas/aarch64/illegal-memtag.s index 05f3ead..7eab07f 100644 --- a/gas/testsuite/gas/aarch64/illegal-memtag.s +++ b/gas/testsuite/gas/aarch64/illegal-memtag.s @@ -17,3 +17,11 @@ func: gmi x1, xzr, x3 addg xzr, x2, #0, #0 subg x1, xzr, #0, #0 + subp sp, x1, x2 + subp x1, xzr, x2 + subp x1, x2, xzr + subps sp, x1, x2 + subps x1, xzr, x2 + subps x1, x2, xzr + cmpp xzr, x2 + cmpp x2, xzr |