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authorSudakshina Das <sudi.das@arm.com>2018-11-12 12:52:55 +0000
committerSudakshina Das <sudi.das@arm.com>2018-11-12 12:59:22 +0000
commit193614f2b908c2b55c188cb14c3ef78993ff85b0 (patch)
tree4a762f9576281e236a28853ba62089abdd1b43e8 /gas
parent73b605ec3f546ff5a1c343ae02e6322aaa451bcf (diff)
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gdb-193614f2b908c2b55c188cb14c3ef78993ff85b0.tar.gz
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[BINUTILS, AARCH64, 2/8] Add Tag generation instructions in Memory Tagging Extension
This patch is part of the patch series to add support for ARMv8.5-A Memory Tagging Extensions which is an optional extension to ARMv8.5-A and is enabled using the +memtag command line option. This patch add support to the Tag generation instructions from MTE. These are the following instructions added in this patch: - IRG <Xd|SP>, <Xn|SP>{, Xm} - ADDG <Xd|SP>, <Xn|SP>, #<uimm1>. #<uimm2> - SUBG <Xd|SP>, <Xn|SP>, #<uimm1>. #<uimm2> - GMI <Xd>, <Xn|SP>, <Xm> where <Xd|SP> : Is the 64-bit destination GPR or Stack pointer. <Xn|SP> : Is the 64-bit source GPR or Stack pointer. <uimm6> : Is the unsigned immediate, a multiple of 16 in the range 0 to 1008. <uimm4> : Is the unsigned immediate, in the range 0 to 15. *** include/ChangeLog *** 2018-11-12 Sudakshina Das <sudi.das@arm.com> * opcode/aarch64.h (aarch64_opnd): Add AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10 as new enums. *** opcodes/ChangeLog *** 2018-11-12 Sudakshina Das <sudi.das@arm.com> * aarch64-opc.h (aarch64_field_kind): New FLD_imm4_3. (OPD_F_SHIFT_BY_4, operand_need_shift_by_four): New. * aarch64-opc.c (fields): Add entry for imm4_3. (operand_general_constraint_met_p): Add cases for AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10. (aarch64_print_operand): Likewise. * aarch64-tbl.h (QL_ADDG): New. (aarch64_opcode_table): Add addg, subg, irg and gmi. (AARCH64_OPERANDS): Define UIMM4_ADDG and UIMM10. * aarch64-asm.c (aarch64_ins_imm): Add case for operand_need_shift_by_four. * aarch64-asm-2.c: Regenerated. * aarch64-dis-2.c: Regenerated. * aarch64-opc-2.c: Regenerated. *** gas/ChangeLog *** 2018-11-12 Sudakshina Das <sudi.das@arm.com> * config/tc-aarch64.c (parse_operands): Add switch case for AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10. * testsuite/gas/aarch64/armv8_5-a-memtag.s: New. * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise. * testsuite/gas/aarch64/illegal-memtag.s: Likewise. * testsuite/gas/aarch64/illegal-memtag.l: Likewise. * testsuite/gas/aarch64/illegal-memtag.d: Likewise.
Diffstat (limited to 'gas')
-rw-r--r--gas/ChangeLog10
-rw-r--r--gas/config/tc-aarch64.c2
-rw-r--r--gas/testsuite/gas/aarch64/armv8_5-a-memtag.d35
-rw-r--r--gas/testsuite/gas/aarch64/armv8_5-a-memtag.s37
-rw-r--r--gas/testsuite/gas/aarch64/illegal-memtag.d3
-rw-r--r--gas/testsuite/gas/aarch64/illegal-memtag.l14
-rw-r--r--gas/testsuite/gas/aarch64/illegal-memtag.s19
7 files changed, 120 insertions, 0 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2986f0d..605fd05 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,15 @@
2018-11-12 Sudakshina Das <sudi.das@arm.com>
+ * config/tc-aarch64.c (parse_operands): Add switch case for
+ AARCH64_OPND_UIMM4_ADDG and AARCH64_OPND_UIMM10.
+ * testsuite/gas/aarch64/armv8_5-a-memtag.s: New.
+ * testsuite/gas/aarch64/armv8_5-a-memtag.d: Likewise.
+ * testsuite/gas/aarch64/illegal-memtag.s: Likewise.
+ * testsuite/gas/aarch64/illegal-memtag.l: Likewise.
+ * testsuite/gas/aarch64/illegal-memtag.d: Likewise.
+
+2018-11-12 Sudakshina Das <sudi.das@arm.com>
+
* config/tc-aarch64.c (aarch64_features): Add "memtag"
as a new option.
* doc/c-aarch64.texi: Document the same.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index b9aceb2..5f79e92 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -5742,6 +5742,8 @@ parse_operands (char *str, const aarch64_opcode *opcode)
case AARCH64_OPND_SIMM5:
case AARCH64_OPND_FBITS:
case AARCH64_OPND_UIMM4:
+ case AARCH64_OPND_UIMM4_ADDG:
+ case AARCH64_OPND_UIMM10:
case AARCH64_OPND_UIMM3_OP1:
case AARCH64_OPND_UIMM3_OP2:
case AARCH64_OPND_IMM_VLSL:
diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
new file mode 100644
index 0000000..4610461
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.d
@@ -0,0 +1,35 @@
+#as: -march=armv8.5-a+memtag
+# objdump: -d
+
+.*: .*
+
+
+Disassembly of section \.text:
+
+0+0 <func>:
+.*: 9ac01000 irg x0, x0, x0
+.*: 9ac0101b irg x27, x0, x0
+.*: 9ac01360 irg x0, x27, x0
+.*: 9adb1000 irg x0, x0, x27
+.*: 9adb137b irg x27, x27, x27
+.*: 9adf101f irg sp, x0
+.*: 9adf13e0 irg x0, sp
+.*: 9ac01400 gmi x0, x0, x0
+.*: 9ac0141b gmi x27, x0, x0
+.*: 9ac01760 gmi x0, x27, x0
+.*: 9adb1400 gmi x0, x0, x27
+.*: 9adb177b gmi x27, x27, x27
+.*: 9ac017e0 gmi x0, sp, x0
+.*: 9ac0141f gmi xzr, x0, x0
+.*: 91800000 addg x0, x0, #0x0, #0x0
+.*: 9180001b addg x27, x0, #0x0, #0x0
+.*: 91800360 addg x0, x27, #0x0, #0x0
+.*: 9180037b addg x27, x27, #0x0, #0x0
+.*: 91bf3fe0 addg x0, sp, #0x3f0, #0xf
+.*: 91aa3c1f addg sp, x0, #0x2a0, #0xf
+.*: d1800000 subg x0, x0, #0x0, #0x0
+.*: d180001b subg x27, x0, #0x0, #0x0
+.*: d1800360 subg x0, x27, #0x0, #0x0
+.*: d180037b subg x27, x27, #0x0, #0x0
+.*: d1bf3fe0 subg x0, sp, #0x3f0, #0xf
+.*: d1bf141f subg sp, x0, #0x3f0, #0x5
diff --git a/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s
new file mode 100644
index 0000000..96a3f37
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/armv8_5-a-memtag.s
@@ -0,0 +1,37 @@
+func:
+ # OP x[0,30], x[0,30], x[0,30]
+ .macro expand_3_reg op
+ \op x0, x0, x0
+ \op x27, x0, x0
+ \op x0, x27, x0
+ \op x0, x0, x27
+ \op x27, x27, x27
+ .endm
+
+ # OP x[0,30], x[0,30], #[0,30], #[0,14]
+ .macro expand_2_reg op
+ \op x0, x0, #0, #0
+ \op x27, x0, #0, #0
+ \op x0, x27, #0, #0
+ \op x27, x27, #0, #0
+ .endm
+
+ # IRG
+ expand_3_reg irg
+ irg sp, x0
+ irg x0, sp
+
+ # GMI
+ expand_3_reg gmi
+ gmi x0, sp, x0
+ gmi xzr, x0, x0
+
+ # ADDG
+ expand_2_reg addg
+ addg x0, sp, #0x3f0, #0xf
+ addg sp, x0, #0x2a0, #0xf
+
+ # SUBG
+ expand_2_reg subg
+ subg x0, sp, #0x3f0, #0xf
+ subg sp, x0, #0x3f0, #0x5
diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.d b/gas/testsuite/gas/aarch64/illegal-memtag.d
new file mode 100644
index 0000000..913661a
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-memtag.d
@@ -0,0 +1,3 @@
+#as: -march=armv8.5-a+memtag
+#source: illegal-memtag.s
+#error_output: illegal-memtag.l
diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.l b/gas/testsuite/gas/aarch64/illegal-memtag.l
new file mode 100644
index 0000000..501faa7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-memtag.l
@@ -0,0 +1,14 @@
+[^:]*: Assembler messages:
+[^:]*:[0-9]+: Error: immediate value must be a multiple of 16 at operand 3 -- `addg x1,x2,#0x3ef,#0x6'
+[^:]*:[0-9]+: Error: immediate value out of range 0 to 1008 at operand 3 -- `subg x1,x2,#0x400,#0x3'
+[^:]*:[0-9]+: Error: immediate value out of range 0 to 1008 at operand 3 -- `subg x1,x2,-16,#0x3'
+[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 4 -- `addg x1,x2,#0x3f0,#0x10'
+[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 4 -- `subg x1,x2,#0x3f0,-4'
+[^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `irg xzr,x2,x3'
+[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `irg x1,xzr,x3'
+[^:]*:[0-9]+: Error: operand 3 must be an integer register -- `irg x1,x2,sp'
+[^:]*:[0-9]+: Error: operand 3 must be an integer register -- `gmi x1,x2,sp'
+[^:]*:[0-9]+: Error: operand 1 must be an integer register -- `gmi sp,x2,x3'
+[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `gmi x1,xzr,x3'
+[^:]*:[0-9]+: Error: operand 1 must be an integer or stack pointer register -- `addg xzr,x2,#0,#0'
+[^:]*:[0-9]+: Error: operand 2 must be an integer or stack pointer register -- `subg x1,xzr,#0,#0'
diff --git a/gas/testsuite/gas/aarch64/illegal-memtag.s b/gas/testsuite/gas/aarch64/illegal-memtag.s
new file mode 100644
index 0000000..05f3ead
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/illegal-memtag.s
@@ -0,0 +1,19 @@
+func:
+ # ADDG/SUBG : Fail uimm6
+ addg x1, x2, #0x3ef, #0x6
+ subg x1, x2, #0x400, #0x3
+ subg x1, x2, -16, #0x3
+
+ # ADDG/SUBG : Fail uimm4
+ addg x1, x2, #0x3f0, #0x10
+ subg x1, x2, #0x3f0, -4
+
+ # Illegal SP/XZR registers
+ irg xzr, x2, x3
+ irg x1, xzr, x3
+ irg x1, x2, sp
+ gmi x1, x2, sp
+ gmi sp, x2, x3
+ gmi x1, xzr, x3
+ addg xzr, x2, #0, #0
+ subg x1, xzr, #0, #0