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AgeCommit message (Expand)AuthorFilesLines
2022-09-30Document -fexcess-precision=16 in target.defH.J. Lu1-1/+1
2022-08-30omp-simd-clone: Allow fixed-lane vectorsAndrew Stubbs1-0/+3
2022-05-25Add new parameter to vec_perm_const hook for specifying operand mode.Prathamesh Kulkarni1-7/+11
2022-04-01Add an assertion: the zeroed_hardregs set is a subset of all call used regs.Qing Zhao1-0/+7
2022-02-21aarch64: Add compiler support for Shadow Call StackDan Li1-0/+8
2022-01-17Change references of .c files to .cc filesMartin Liska1-12/+12
2022-01-04ipa-inline: Add target info into fn summary [PR102059]Kewen Lin1-0/+35
2022-01-03Update copyright years.Jakub Jelinek1-1/+1
2021-12-03Add TARGET_IFUNC_REF_LOCAL_OKH.J. Lu1-0/+8
2021-11-15IPA: Provide a mechanism to register static DTORs via cxa_atexit.Iain Sandoe1-0/+10
2021-11-04vect: Convert cost hooks to classesRichard Sandiford1-45/+4
2021-10-20calls.c: Remove some dead code and target hooksAlex Coplan1-45/+0
2021-09-17openacc: Shared memory layout optimisationJulian Brown1-1/+11
2021-09-08Support -fexcess-precision=16 which will enable FLT_EVAL_METHOD_PROMOTE_TO_FL...liuhongt1-4/+7
2021-08-16gcov: Add TARGET_GCOV_TYPE_SIZE target hookSebastian Huber1-0/+12
2021-08-09openacc: Middle-end worker-partitioning supportJulian Brown1-0/+11
2021-07-30Add QI vector mode support to by-pieces for memsetH.J. Lu1-0/+9
2021-07-29Adjust docu of TARGET_VECTORIZE_VEC_PERM_CONSTAndreas Krebbel1-1/+1
2021-07-29Use preferred mode for doloop IV [PR61837]Jiufu Guo1-0/+13
2021-07-15pass location to md_asm_adjustTrevor Saunders1-2/+3
2021-06-17Add a target calls hook: TARGET_PUSH_ARGUMENTH.J. Lu1-0/+14
2021-06-07Reformat target.def for better parsing.Martin Liska1-225/+260
2021-05-21[OpenACC privatization] Largely extend diagnostics and corresponding testsuit...Thomas Schwinge1-1/+2
2021-05-21openacc: Add support for gang local storage allocation in shared memory [PR90...Julian Brown1-0/+29
2021-05-11vect: Add costing_for_scalar parameter to init_cost hookKewen Lin1-2/+4
2021-05-04Remove CC0Segher Boessenkool1-1/+1
2021-04-29Generate offset adjusted operation for op_by_pieces operationsH.J. Lu1-0/+9
2021-04-27aix: TLS precompute register parameters (PR 94177)David Edelsohn1-0/+12
2021-03-04Add input_modes parameter to TARGET_MD_ASM_ADJUST hookIlya Leoshkevich1-5/+8
2021-03-01dwarf2unwind : Force the CFA after remember/restore pairs [44107/48097].Iain Sandoe1-0/+14
2021-01-04Update copyright years.Jakub Jelinek1-1/+1
2020-12-17vect, aarch64: Extend SVE vs Advanced SIMD costing decisions in vect_better_l...Kyrylo Tkachov1-2/+5
2020-12-04Refactor -frecord-gcc-switches.Martin Liska1-36/+2
2020-12-02introduce overridable clear_cache emitterAlexandre Oliva1-1/+17
2020-11-25libsanitizer: mid-end: Introduce stack variable handling for HWASANMatthew Malcomson1-0/+65
2020-11-25libsanitizer: options: Add hwasan flags and argument parsingMatthew Malcomson1-0/+15
2020-11-17Relocatable read-only section support for absolute jump tableHaochen Gui1-6/+8
2020-11-13Asan changes for RISC-V.Jim Wilson1-1/+2
2020-11-11CFI-handling : Add a hook to allow target-specific Personality and LSDA indir...Iain Sandoe1-0/+10
2020-10-30Add -fzero-call-used-regs option and zero_call_used_regs function attributes.qing zhao1-0/+15
2020-09-30[nvptx] Add type arg to TARGET_LIBC_HAS_FUNCTIONTom de Vries1-2/+5
2020-09-14options: Save and restore opts_set for Optimization and Target optionsJakub Jelinek1-2/+4
2020-07-21Add TARGET_LOWER_LOCAL_DECL_ALIGNMENT [PR95237]Sunil K Pandey1-0/+7
2020-07-16doc: Document TARGET_TRULY_NOOP_TRUNCATION requires trunc?i?i2 patterns.Roger Sayle1-1/+3
2020-05-13add vectype parameter to add_stmt_cost hookRichard Biener1-1/+1
2020-05-12RISC-V: Add shorten_memrefs pass.Craig Blackmore1-0/+11
2020-05-05add vec_info * parameters where neededRichard Biener1-1/+1
2020-03-17Fix up duplicated duplicated words mostly in commentsJakub Jelinek1-3/+3
2020-01-24doc: target.def (flags_regnum): Also mention effect on delay slot filling.Hans-Peter Nilsson1-4/+4
2020-01-09Add a compatible_vector_types_p target hookRichard Sandiford1-0/+23
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