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2020-01-15i386: Fix wrong-code x86 issue with avx512{f,vl} fma PR93009Jakub Jelinek1-16/+16
2020-01-14PR target/93254 - -msse generates sse2 instructionsUros Bizjak1-1/+1
2020-01-13Add initial octeontx2 support.Andrew Pinski2-1/+11
2020-01-10aarch64.c (aarch64_invalid_conversion): New function for target hook.Stam Markianos-Wright1-0/+58
2020-01-10config.gcc: Add arm_bf16.h.Stam Markianos-Wright10-45/+164
2020-01-10[AArch64] Make -msve-vector-bits=128 generate VL-specific codeRichard Sandiford2-9/+21
2020-01-10[AArch64] Fix reversed vcond_mask invocation in aarch64_evpc_selRichard Sandiford1-1/+3
2020-01-10[AArch64] Tighten mode checks in aarch64_builtin_vectorized_functionRichard Sandiford1-12/+5
2020-01-09[AArch64] Add support for the SVE2 ACLERichard Sandiford17-308/+5542
2020-01-09[AArch64] Pass a mode to some SVE immediate queriesRichard Sandiford3-23/+17
2020-01-09[AArch64] Add banner comments to aarch64-sve2.mdRichard Sandiford2-79/+186
2020-01-09[AArch64] Simplify WHILERW and WHILEWR definitionRichard Sandiford3-28/+10
2020-01-09[AArch64] Rename UNSPEC_WHILE* to match instruction mnemonicsRichard Sandiford4-17/+17
2020-01-09[AArch64] Rename SVE shape "unary_count" to "unary_to_uint"Richard Sandiford3-25/+25
2020-01-09[AArch64] Specify some SVE ACLE functions in a more generic wayRichard Sandiford2-55/+28
2020-01-09[AArch64] Tweak iterator usage for [SU]Q{ADD,SUB}Richard Sandiford6-51/+30
2020-01-09[AArch64] Remove fictitious [SU]RHSUB instructionsRichard Sandiford1-7/+1
2020-01-09Add a compatible_vector_types_p target hookRichard Sandiford2-2/+18
2020-01-09re PR inline-asm/93202 ([RISCV] ICE when using inline asm 'h' operand modifier)Jakub Jelinek1-1/+2
2020-01-09re PR target/93141 (Missed optimization : Use of adc when checking overflow)Jakub Jelinek1-12/+169
2020-01-08RISC-V: Disable use of TLS copy relocs.Jim Wilson1-0/+3
2020-01-08re PR target/93187 (ICE in extract_insn, at recog.c:2294)Jakub Jelinek1-0/+2
2020-01-08re PR target/93174 (ICE building glibc __sha512_process_block for i686)Jakub Jelinek1-5/+5
2020-01-08Add -nodevicespecs option for avr.Georg-Johann Lay2-4/+8
2020-01-08Implement 64-bit double functions.Georg-Johann Lay4-1/+53
2020-01-08arm: Fix rmprofile multilibs when architecture includes +mp or +sec (PR targe...Richard Earnshaw1-0/+9
2020-01-07Revert patch accidentily created on the wrong sandboxMichael Meissner1-86/+0
2020-01-07Restore patch reverted on trunk instead of a branchMichael Meissner1-0/+86
2020-01-07[amdgcn] Add more modes for vector comparisonsAndrew Stubbs3-50/+111
2020-01-07Disallow 'B' constraints on amdgcn addc/subbAndrew Stubbs4-159/+70
2020-01-07Add a generic lhd_simulate_enum_declRichard Sandiford1-1/+4
2020-01-07[AArch64] Use type attributes to mark types that use the SVE PCSRichard Sandiford3-87/+65
2020-01-07Refactor some code for a future change.Michael Meissner1-15/+26
2020-01-07Update 'Q' constraint documentation.Michael Meissner1-2/+1
2020-01-07Fix bad code of vector extract of PC-relative address with variable element #.Michael Meissner1-4/+4
2020-01-07Add support for large prefixed address in adjusting a vector address.Michael Meissner1-1/+15
2020-01-06pa.md: Revert change to use ordered_comparison_operator instead of...John David Anglin2-2/+8
2020-01-06Fix amdgcn issue with '0' constraintsAndrew Stubbs1-13/+13
2020-01-06mips.c (vr4130_align_insns): Fix typo.Bryan Stenson1-1/+1
2020-01-06Fix early-clobber in amdgcn vec_extractAndrew Stubbs1-3/+3
2020-01-06[AArch64] Use move-if-change for aarch64-tune.mdRichard Sandiford1-1/+5
2020-01-06[AArch64] Fix constraints for CPY /MRichard Sandiford1-1/+1
2020-01-06Fix amdgcn inline immediate rangeAndrew Stubbs1-1/+1
2020-01-05re PR target/93141 (Missed optimization : Use of adc when checking overflow)Jakub Jelinek1-19/+276
2020-01-03re PR target/93089 (Force mprefer-vector-width=512 in 'e' simd clones)Jakub Jelinek1-3/+24
2020-01-03re PR target/93089 (Force mprefer-vector-width=512 in 'e' simd clones)Jakub Jelinek4-13/+45
2020-01-03re PR target/93110 (grub-2.04/grub-core/lib/division.c:28:1: internal compile...Jakub Jelinek1-24/+10
2020-01-02[Arm] Enable CLI for Armv8.6-a: armv8.6-a, i8mm and bf16.Dennis Zhang8-12/+95
2020-01-01re PR target/67834 (Local references inside comdat groups)John David Anglin2-0/+26
2020-01-01re PR target/93111 (FAIL: gfortran.fortran-torture/compile/pr32663.f, -O3 -g...John David Anglin2-31/+25
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