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| author | Jakub Jelinek <jakub@redhat.com> | 2020-01-15 00:30:10 +0100 |
|---|---|---|
| committer | Jakub Jelinek <jakub@redhat.com> | 2020-01-15 00:30:10 +0100 |
| commit | fbbc4c24fd7ba87e0c47cd965ae624afba6fa375 (patch) | |
| tree | 8175b3ddc03ae580e8dde005c60d4b41c09c0aa3 /gcc/config | |
| parent | f474fbd5e3cca37ebc886a4950827e93d1c665c8 (diff) | |
| download | gcc-fbbc4c24fd7ba87e0c47cd965ae624afba6fa375.zip gcc-fbbc4c24fd7ba87e0c47cd965ae624afba6fa375.tar.gz gcc-fbbc4c24fd7ba87e0c47cd965ae624afba6fa375.tar.bz2 | |
i386: Fix wrong-code x86 issue with avx512{f,vl} fma PR93009
As mentioned in the PR, the following testcase is miscompiled with avx512vl.
The reason is that the fma *_bcst_1 define_insns have two alternatives:
"=v,v" "0,v" "v,0" "m,m" and use the same
vfmadd213* %3<avx512bcst>, %2, %0<sd_mask_op4>
pattern. If the first alternative is chosen, everything is ok, but if the
second alternative is chosen, %2 and %0 are the same register, so instead
of doing dest=dest*another+membcst we do dest=dest*dest+membcst.
Now, to fix this, either we'd need separate:
"vfmadd213<ssemodesuffix>\t{%3<avx512bcst>, %2, %0<sd_mask_op4>|%0<sd_mask_op4>, %2, %3<avx512bcst>}
vfmadd213<ssemodesuffix>\t{%3<avx512bcst>, %1, %0<sd_mask_op4>|%0<sd_mask_op4>, %1, %3<avx512bcst>}"
where for the second alternative, we'd just use %1 instead of %2, but
what I think is actually cleaner is just use a single alternative and
make the two multiplication operands commutative, which they really are.
2020-01-15 Jakub Jelinek <jakub@redhat.com>
PR target/93009
* config/i386/sse.md
(*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1,
*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1,
*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1,
*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Use
just a single alternative instead of two, make operands 1 and 2
commutative.
* gcc.target/i386/avx512vl-pr93009.c: New test.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/sse.md | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index f4c8a39..b8d41b7 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -4172,12 +4172,12 @@ (set_attr "mode" "<MODE>")]) (define_insn "*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1" - [(set (match_operand:VF_AVX512 0 "register_operand" "=v,v") + [(set (match_operand:VF_AVX512 0 "register_operand" "=v") (fma:VF_AVX512 - (match_operand:VF_AVX512 1 "register_operand" "0,v") - (match_operand:VF_AVX512 2 "register_operand" "v,0") + (match_operand:VF_AVX512 1 "register_operand" "%0") + (match_operand:VF_AVX512 2 "register_operand" "v") (vec_duplicate:VF_AVX512 - (match_operand:<ssescalarmode> 3 "memory_operand" "m,m"))))] + (match_operand:<ssescalarmode> 3 "memory_operand" "m"))))] "TARGET_AVX512F && <sd_mask_mode512bit_condition>" "vfmadd213<ssemodesuffix>\t{%3<avx512bcst>, %2, %0<sd_mask_op4>|%0<sd_mask_op4>, %2, %3<avx512bcst>}" [(set_attr "type" "ssemuladd") @@ -4289,13 +4289,13 @@ (set_attr "mode" "<MODE>")]) (define_insn "*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1" - [(set (match_operand:VF_AVX512 0 "register_operand" "=v,v") + [(set (match_operand:VF_AVX512 0 "register_operand" "=v") (fma:VF_AVX512 - (match_operand:VF_AVX512 1 "register_operand" "0,v") - (match_operand:VF_AVX512 2 "register_operand" "v,0") + (match_operand:VF_AVX512 1 "register_operand" "%0") + (match_operand:VF_AVX512 2 "register_operand" "v") (neg:VF_AVX512 (vec_duplicate:VF_AVX512 - (match_operand:<ssescalarmode> 3 "memory_operand" "m,m")))))] + (match_operand:<ssescalarmode> 3 "memory_operand" "m")))))] "TARGET_AVX512F && <sd_mask_mode512bit_condition>" "vfmsub213<ssemodesuffix>\t{%3<avx512bcst>, %2, %0<sd_mask_op4>|%0<sd_mask_op4>, %2, %3<avx512bcst>}" [(set_attr "type" "ssemuladd") @@ -4411,13 +4411,13 @@ (set_attr "mode" "<MODE>")]) (define_insn "*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1" - [(set (match_operand:VF_AVX512 0 "register_operand" "=v,v") + [(set (match_operand:VF_AVX512 0 "register_operand" "=v") (fma:VF_AVX512 (neg:VF_AVX512 - (match_operand:VF_AVX512 1 "register_operand" "0,v")) - (match_operand:VF_AVX512 2 "register_operand" "v,0") + (match_operand:VF_AVX512 1 "register_operand" "%0")) + (match_operand:VF_AVX512 2 "register_operand" "v") (vec_duplicate:VF_AVX512 - (match_operand:<ssescalarmode> 3 "memory_operand" "m,m"))))] + (match_operand:<ssescalarmode> 3 "memory_operand" "m"))))] "TARGET_AVX512F && <sd_mask_mode512bit_condition>" "vfnmadd213<ssemodesuffix>\t{%3<avx512bcst>, %2, %0<sd_mask_op4>|%0<sd_mask_op4>, %2, %3<avx512bcst>}" [(set_attr "type" "ssemuladd") @@ -4535,14 +4535,14 @@ (set_attr "mode" "<MODE>")]) (define_insn "*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1" - [(set (match_operand:VF_AVX512 0 "register_operand" "=v,v") + [(set (match_operand:VF_AVX512 0 "register_operand" "=v") (fma:VF_AVX512 (neg:VF_AVX512 - (match_operand:VF_AVX512 1 "register_operand" "0,v")) - (match_operand:VF_AVX512 2 "register_operand" "v,0") + (match_operand:VF_AVX512 1 "register_operand" "%0")) + (match_operand:VF_AVX512 2 "register_operand" "v") (neg:VF_AVX512 (vec_duplicate:VF_AVX512 - (match_operand:<ssescalarmode> 3 "memory_operand" "m,m")))))] + (match_operand:<ssescalarmode> 3 "memory_operand" "m")))))] "TARGET_AVX512F && <sd_mask_mode512bit_condition>" "vfnmsub213<ssemodesuffix>\t{%3<avx512bcst>, %2, %0<sd_mask_op4>|%0<sd_mask_op4>, %2, %3<avx512bcst>}" [(set_attr "type" "ssemuladd") |