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Age
Commit message (
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Author
Files
Lines
2024-12-06
SVE intrinsics: Fold calls with pfalse predicate.
Jennifer Schmitz
4
-14
/
+352
2024-12-05
i386: Fix addcarry/subborrow issues [PR117860]
Uros Bizjak
2
-20
/
+88
2024-12-05
arm: remove support for iWMMX/iWMMX2 intrinsics
Richard Earnshaw
1
-1811
/
+1
2024-12-05
aarch64: Mark vluti* intrinsics as QUIET
Richard Sandiford
1
-12
/
+12
2024-12-05
aarch64: Reintroduce FLAG_AUTO_FP
Richard Sandiford
1
-7
/
+8
2024-12-05
aarch64: Rename FLAG_NONE to FLAG_DEFAULT
Richard Sandiford
3
-391
/
+391
2024-12-05
aarch64: Rename FLAG_AUTO_FP to FLAG_QUIET
Richard Sandiford
2
-23
/
+23
2024-12-05
arm: Add CDE options for star-mc1 cpu
Arvin Zhong
1
-0
/
+8
2024-12-05
AVR: target/107957 - Propagate zero_reg to store sources.
Georg-Johann Lay
3
-3
/
+56
2024-12-05
AVR: target/107957 - Split multi-byte loads and stores.
Georg-Johann Lay
4
-5
/
+125
2024-12-05
AVR: target/64242 - Copy FP to a local reg in nonlocal_goto.
Georg-Johann Lay
1
-1
/
+6
2024-12-05
AVR: Rework patterns that add / subtract an (inverted) MSB.
Georg-Johann Lay
3
-114
/
+227
2024-12-05
RISC-V: Add const to function_shape::get_name [NFC]
Kito Cheng
3
-73
/
+73
2024-12-04
sched1: parameterize pressure scheduling spilling aggressiveness [PR/114729]
Vineet Gupta
1
-0
/
+4
2024-12-04
AVR: ad target/84211 - Fix dumping INSN_UID for null insn.
Georg-Johann Lay
1
-3
/
+4
2024-12-04
arm: use quotes when referring to command-line options [PR90160]
David Malcolm
1
-3
/
+3
2024-12-04
RISC-V: Add assert for insn operand out of range access [PR117878][NFC]
Pan Li
1
-0
/
+6
2024-12-03
AVR: Improve location of late diagnostics.
Georg-Johann Lay
1
-12
/
+28
2024-12-03
AVR: ad target/117726 - Also split logic shifts of bitsize - 1.
Georg-Johann Lay
1
-12
/
+12
2024-12-03
AVR: Tweak uin8_t << 6 and uint8_t >> 6 shifts.
Georg-Johann Lay
3
-26
/
+73
2024-12-03
aarch64: Fix fp8 cpuinfo feature names
Claudio Bantaloukas
1
-7
/
+7
2024-12-03
aarch64: Add flags field to aarch64-simd-pragma-builtins.def
Richard Sandiford
2
-29
/
+42
2024-12-03
aarch64: Add support for AdvSIMD lut
Saurabh Jha
6
-2
/
+212
2024-12-03
aarch64: Refactor AdvSIMD intrinsics
Saurabh Jha
2
-32
/
+98
2024-12-03
aarch64: Put iterators into the right section
Saurabh Jha
1
-53
/
+50
2024-12-03
aarch64: Split out aarch64_v64_mode
Richard Sandiford
3
-27
/
+36
2024-12-03
aarch64: Move some diagnostic functions to aarch64.cc
Richard Sandiford
3
-63
/
+78
2024-12-02
m68k: don't allow o/o in movdi, movdf, movxf
Andreas Schwab
1
-6
/
+6
2024-12-02
Add trailing newlines where needed
Jakub Jelinek
2
-2
/
+2
2024-12-02
arm, mve: Adding missing Runtime Library Exception to header files
Andre Vieira
2
-0
/
+8
2024-12-02
RISC-V: Add intrinsics support for SiFive Xsfvfnrclipxfqf extensions.
yulong
15
-39
/
+214
2024-12-02
riscv: Avoid narrowing warning
Andreas Schwab
1
-25
/
+39
2024-12-02
x86: Correct comments for pass_apx_nf_convert
H.J. Lu
1
-1
/
+1
2024-11-30
Support for 64-bit location_t: Backend parts
Lewis Hyatt
3
-6
/
+3
2024-11-30
AVR: ad target/84211 - Split MOVW into MOVs in try_split_any.
Georg-Johann Lay
1
-0
/
+8
2024-11-30
LoongArch: Mask shift offset when emit {xv, v}{srl, sll, sra} with sameimm ve...
Jinyang He
5
-37
/
+110
2024-11-29
AVR: Fix some coding rule nits and typos.
Georg-Johann Lay
5
-176
/
+188
2024-11-29
aarch64: Add attributes to the data intrinsics.
Andrew Pinski
1
-6
/
+8
2024-11-29
aarch64: add attributes to the prefetch_builtins
Andrew Pinski
1
-1
/
+3
2024-11-29
aarch64: Fix up flags for vget_low_*, vget_high_* and vreinterpret intrinsics
Andrew Pinski
1
-3
/
+3
2024-11-29
aarch64: Mark __builtin_aarch64_im_lane_boundsi as leaf and nothrow [PR117665]
Andrew Pinski
1
-1
/
+5
2024-11-29
AVR: target/117681 - Set UNWIND_WORD_MODE to Pmode.
Georg-Johann Lay
1
-0
/
+12
2024-11-29
AVR: target/117726 - Better optimize shifts.
Georg-Johann Lay
5
-248
/
+563
2024-11-29
arm, mve: Detect uses of vctp_vpr_generated inside subregs
Andre Vieira
1
-1
/
+2
2024-11-29
[PATCH v7 03/12] RISC-V: Add CRC expander to generate faster CRC.
Mariam Arutunian
5
-0
/
+233
2024-11-29
RISC-V: Add intrinsics support for SiFive Xsfvqmaccqoq/dod extensions.
yulong
16
-18
/
+740
2024-11-29
AArch64: Suppress default options when march or mcpu used is not affected by it.
Tamar Christina
8
-13
/
+88
2024-11-29
aarch64: Add ISA requirements to some SVE/SME md comments
Richard Sandiford
2
-113
/
+121
2024-11-29
aarch64: add SVE2 FP8DOT2 and FP8DOT4 intrinsics
Claudio Bantaloukas
8
-23
/
+172
2024-11-29
aarch64: add SVE2 FP8 multiply accumulate intrinsics
Claudio Bantaloukas
11
-18
/
+290
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