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2015-01-06configure.ac: Add Visium support.Eric Botcazou13-0/+9405
2015-01-05* config/nds32/nds32-peephole2.md: Do not mention define_peephole.Eric Botcazou1-2/+1
2015-01-05Fix loop optimization when ZOL is not available in xtensa configurationMax Filippov1-0/+8
2015-01-05i386.c (output_387_binary_op): Use std::swap.Uros Bizjak1-5/+1
2015-01-05rtlanal.c (refers_to_regno_p): Change return value from int to bool.Oleg Endo12-31/+18
2015-01-05Update copyright years.Jakub Jelinek1273-1292/+1287
2015-01-03pa.md (decrement_and_branch_until_zero): Use `Q' constraint instead of `m' co...John David Anglin2-10/+19
2015-01-01Roll ChangeLog file. Limit offsets to 16 bits for moxie.Anthony Green1-1/+2
2014-12-30Fix zero extension for moxieAnthony Green1-16/+4
2014-12-31i386.c (ix86_legitimize_address): Declare "changed" as bool.Uros Bizjak1-26/+23
2014-12-30i386.c (ix86_legitimize_address): Use std::swap.Uros Bizjak1-21/+8
2014-12-29t-mti-linux (MULTILIB_EXCEPTIONS): Add exceptions for mips32[r1] and mips64[r...Steve Ellcey2-2/+8
2014-12-27Issue an error for ms_abi attribute with x32H.J. Lu1-1/+12
2014-12-27Switch to 16-bit offsets for moxie ldo/sto instructionsAnthony Green6-9/+28
2014-12-27mmx.md (*vec_extractv2sf_1): Do not emit unpckhps.Uros Bizjak1-17/+19
2014-12-24re PR target/51244 ([SH] Inefficient conditional branch and code around T bit)Oleg Endo1-14/+14
2014-12-24re PR target/64160 (msp430 code generation error adding 32-bit integers)Nick Clifton1-6/+8
2014-12-24Add mul.x support for moxieAnthony Green4-9/+47
2014-12-21re PR target/55212 ([SH] Switch to LRA)Oleg Endo1-3/+9
2014-12-20re PR target/64358 (Wrong code for __int128 operations in powerpc64le)Segher Boessenkool2-6/+10
2014-12-19MIPSR6: mips-img-elf mips-img-linux-gnu triplets and vendor updatesMatthew Fortune3-1/+76
2014-12-19MIPS32R6 and MIPS64R6 supportMatthew Fortune12-367/+801
2014-12-19[AArch64 3/3] Fix XOR_one_cmpl pattern; add SIMD-reg variants for BIC,ORN,EONAlan Lawrence2-7/+32
2014-12-19[AArch64 2/3] Add SIMD-reg variants of logical operators and/ior/xor/notAlan Lawrence2-10/+18
2014-12-19[AArch64 1/3] Don't disparage add/sub in SIMD registersAlan Lawrence1-6/+6
2014-12-19[PATCH][ARM] Fix reservation pattern in cortex-a9-neon.mdXingxing Pan1-1/+1
2014-12-19* [SH] Split QI/HImode load/store via r0 when LRA is enabled.Kaz Kojima1-0/+32
2014-12-19* [SH] Add splitter to addsi3_compact.Kaz Kojima2-7/+35
2014-12-19* [SH] Modify movsi_ie and movsf_ie patterns for LRA.Kaz Kojima3-2/+138
2014-12-19* [SH] Miscellaneous changes for LRA.Kaz Kojima5-3/+79
2014-12-19* [SH] Add -mlra option.Kaz Kojima2-0/+17
2014-12-19* Add TARGET_LEGITIMIZE_ADDRESS_DISPLACEMENT target macro.Kaz Kojima1-0/+28
2014-12-19* Add TARGET_CANNOT_SUBSTITUTE_MEM_EQUIV target macro.Kaz Kojima1-0/+22
2014-12-18X86-64: Add -mskip-rax-setupH.J. Lu2-1/+10
2014-12-18[AArch64] Simplify+improve patterns for ushr(d?)_n_u64 intrinsicAlan Lawrence2-13/+1
2014-12-18[AArch64] Simplify patterns for sshr_n_[us]64 intrinsicAlan Lawrence2-15/+5
2014-12-18[AArch64] Add TARGET_MIN_DIVISIONS_FOR_RECIP_MULWilco Dijkstra1-0/+9
2014-12-18[AArch64] Generalize code alignmentWilco Dijkstra2-8/+18
2014-12-17re PR target/51244 ([SH] Inefficient conditional branch and code around T bit)Oleg Endo2-49/+54
2014-12-17re PR target/51244 ([SH] Inefficient conditional branch and code around T bit)Oleg Endo1-1/+22
2014-12-17[AArch64] Remove "generic_sched" attributeJames Greenhalgh1-8/+0
2014-12-17MSP430: Fix unused arg warningJan-Benedict Glaw1-1/+1
2014-12-17Add -malign-data={abi|compat|cachineline}H.J. Lu3-2/+31
2014-12-16i386.c (ix86_address_cost): Add explicit restriction to RTL level for the che...Igor Zamyatin1-4/+6
2014-12-16gnu-user.h (TARGET_CAN_SPLIT_STACK): Move from here ...Uros Bizjak3-10/+6
2014-12-16re PR target/64217 (LRA: generate wrong liveness info after r217947 for clobb...Chung-Ju Wu1-1/+1
2014-12-15* config/rl78/rl78.h: Remove SHORT_IMMEDIATES_SIGN_EXTEND.DJ Delorie1-1/+0
2014-12-15* gcc/config/rs6000/rs6000.md (*add>mode>3_imm_dot,Segher Boessenkool1-2/+2
2014-12-15[AARCH64]Fix CLZ_DEFINED_AT_ZERO and CTZ_DEFINED_AT_ZERO definition.Renlin Li1-2/+2
2014-12-12nvptx: Define valid ASM_OUTPUT_ALIGN.Thomas Schwinge1-1/+9
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