riscv-gnu-toolchain/gcc.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2024-06-19	RISC-V: Promote Zaamo/Zalrsc to a when using an old binutils	Patrick O'Neill	1	-0/+1
2024-06-19	i386: Zhaoxin shijidadao enablement	mayshao	3	-3/+14
2024-06-17	RISC-V: Add configure check for Zaamo/Zalrsc assembler support	Patrick O'Neill	1	-0/+11
2024-06-11	RISC-V: Add basic Zaamo and Zalrsc support	Edwin Lu	1	-2/+9
2024-06-03	Add AVX10.1 target_clones support	Haochen Jiang	3	-5/+8
2024-05-20	i386: Remove Xeon Phi ISA support	Haochen Jiang	4	-134/+5
2024-05-16	RISC-V: Add Zvfbfwma extension to the -march= option	Xiao Zeng	1	-0/+5
2024-05-06	[PATCH 1/1] RISC-V: Add Zfbfmin extension to the -march= option	Xiao Zeng	1	-0/+3
2024-04-29	RISC-V: Fix parsing of Zic* extensions	Christoph Müllner	1	-4/+4
2024-04-22	i386: Fix Sierra Forest auto dispatch	Haochen Jiang	1	-1/+1
2024-03-31	RISC-V: Fix one unused varable in riscv_subset_list::parse	Pan Li	1	-1/+0
2024-03-22	RISC-V: Bugfix function target attribute pollution	Pan Li	1	-2/+103
2024-03-22	RISC-V: Bugfix ICE for __attribute__((target("arch=+v"))	Pan Li	1	-10/+21
2024-03-18	[PATCH v5 1/1] RISC-V: Add support for XCVbi extension in CV32E40P	Mary Bennett	1	-0/+2
2024-03-18	Add AMD znver5 processor enablement with scheduler model	Jan Hubicka	3	-1/+23
2024-02-29	AVR: target/114100 - Better indirect accesses for reduced Tiny	Georg-Johann Lay	1	-0/+2
2024-02-16	RISC-V: Add new option -march=help to print all supported extensions	Kito Cheng	1	-0/+46
2024-02-01	RISC-V: Add minimal support for 7 new unprivileged extensions	Monk Chiang	1	-0/+14
2024-01-25	RISC-V: Add support for XCVsimd extension in CV32E40P	Mary Bennett	1	-0/+2
2024-01-24	RISC-V: Don't make Ztso imply A	Palmer Dabbelt	1	-2/+0
2024-01-19	RISC-V: Add the Zihpm and Zicntr extensions	Palmer Dabbelt	1	-0/+3
2024-01-19	RISC-V: Remove unused function in riscv_subset_list [NFC]	Kito Cheng	1	-179/+0
2024-01-19	RISC-V: Relax the -march string for accept any order	Kito Cheng	1	-37/+54
2024-01-19	RISC-V: Extract part parsing base ISA logic into a standalone function [NFC]	Kito Cheng	1	-24/+45
2024-01-18	RISC-V: Introduce XTheadVector as a subset of V1.0.0	Jun Sha (Joshua)	1	-0/+23
2024-01-03	Update copyright years.	Jakub Jelinek	56	-56/+56
2023-12-16	[aarch64] Add function multiversioning support	Andrew Carlotti	1	-0/+94
2023-12-16	aarch64: Fix +nopredres, +nols64 and +nomops	Andrew Carlotti	1	-8/+3
2023-12-16	aarch64: Fix +nocrypto handling	Andrew Carlotti	1	-8/+27
2023-12-15	[PATCH v4 1/3] RISC-V: Add support for XCVelw extension in CV32E40P	Mary Bennett	1	-0/+2
2023-12-15	[PATCH] RISC-V: Add Zvfbfmin extension to the -march= option	Xiao Zeng	1	-0/+4
2023-12-13	RISC-V:Add crypto vector implied ISA info.	Feng Wang	1	-0/+9
2023-12-07	aarch64: Add an early RA for strided registers	Richard Sandiford	1	-0/+1
2023-12-05	RISC-V: Check if zcd conflicts with zcmt and zcmp	Kito Cheng	1	-0/+8
2023-12-04	RISC-V: Update crypto vector ISA info with latest spec	Feng Wang	1	-2/+4
2023-12-04	RISC-V: Refactor riscv_implied_info_t to make it able to handle conditional i...	Kito Cheng	1	-11/+33
2023-12-04	RISC-V: Refine riscv_subset_list::parse [NFC]	Kito Cheng	1	-12/+19
2023-12-04	i386: Fix CPUID of USER_MSR.	Hu, Lin1	1	-2/+2
2023-11-27	RISC-V: Initial RV64E and LP64E support	Tsukasa OI	1	-4/+4
2023-11-20	Initial support for AVX10.1	Haochen Jiang	4	-1/+92
2023-11-15	RISC-V: Fix ICE in non-canonical march parsing	Patrick O'Neill	1	-4/+13
2023-10-30	i386: Zhaoxin yongfeng enablement	Mayshao	3	-5/+12
2023-10-22	RISC-V: Prohibit combination of 'E' and 'H'	Tsukasa OI	1	-0/+4
2023-10-22	RISC-V: 'Zfa' extension is now ratified	Tsukasa OI	1	-1/+1
2023-10-18	Initial Panther Lake Support	Haochen Jiang	3	-0/+12
2023-10-18	Initial Clearwater Forest Support	Haochen Jiang	3	-0/+10
2023-10-12	Support Intel USER_MSR	Hu, Lin1	4	-0/+19
2023-10-11	RISC-V: Extend riscv_subset_list, preparatory for target attribute support	Kito Cheng	1	-0/+209
2023-10-11	[PATCH v4 2/2] RISC-V: Add support for XCValu extension in CV32E40P	Mary Bennett	1	-0/+2
2023-10-11	[PATCH v4 1/2] RISC-V: Add support for XCVmac extension in CV32E40P	Mary Bennett	1	-0/+4