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-rw-r--r--gcc/config/gcn/gcn.c12
-rw-r--r--gcc/config/m32c/m32c.c3
-rw-r--r--gcc/config/rs6000/rs6000.c6
3 files changed, 6 insertions, 15 deletions
diff --git a/gcc/config/gcn/gcn.c b/gcc/config/gcn/gcn.c
index 548ab17..2c6c872 100644
--- a/gcc/config/gcn/gcn.c
+++ b/gcc/config/gcn/gcn.c
@@ -4552,9 +4552,7 @@ gcn_md_reorg (void)
&& prev_insn->unit == UNIT_VECTOR
&& gcn_vmem_insn_p (itype))
{
- HARD_REG_SET regs;
- regs = prev_insn->writes;
- AND_HARD_REG_SET (regs, ireads);
+ HARD_REG_SET regs = prev_insn->writes & ireads;
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) SGPR_REGS]))
nops_rqd = 5 - prev_insn->age;
@@ -4582,9 +4580,7 @@ gcn_md_reorg (void)
&& prev_insn->unit == UNIT_VECTOR
&& get_attr_laneselect (insn) == LANESELECT_YES)
{
- HARD_REG_SET regs;
- regs = prev_insn->writes;
- AND_HARD_REG_SET (regs, ireads);
+ HARD_REG_SET regs = prev_insn->writes & ireads;
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) SGPR_REGS])
|| hard_reg_set_intersect_p
@@ -4598,9 +4594,7 @@ gcn_md_reorg (void)
&& prev_insn->unit == UNIT_VECTOR
&& itype == TYPE_VOP_DPP)
{
- HARD_REG_SET regs;
- regs = prev_insn->writes;
- AND_HARD_REG_SET (regs, ireads);
+ HARD_REG_SET regs = prev_insn->writes & ireads;
if (hard_reg_set_intersect_p
(regs, reg_class_contents[(int) VGPR_REGS]))
nops_rqd = 2 - prev_insn->age;
diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c
index 4e18287..d89064a 100644
--- a/gcc/config/m32c/m32c.c
+++ b/gcc/config/m32c/m32c.c
@@ -341,8 +341,7 @@ reduce_class (reg_class_t original_class, reg_class_t limiting_class,
if (original_class == limiting_class)
return original_class;
- cc = reg_class_contents[original_class];
- AND_HARD_REG_SET (cc, reg_class_contents[limiting_class]);
+ cc = reg_class_contents[original_class] & reg_class_contents[limiting_class];
for (i = 0; i < LIM_REG_CLASSES; i++)
{
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 8193c6b..03349e8 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -21107,10 +21107,8 @@ rs6000_register_move_cost (machine_mode mode,
Do this first so we give best-case answers for union classes
containing both gprs and vsx regs. */
HARD_REG_SET to_vsx, from_vsx;
- to_vsx = reg_class_contents[to];
- AND_HARD_REG_SET (to_vsx, reg_class_contents[VSX_REGS]);
- from_vsx = reg_class_contents[from];
- AND_HARD_REG_SET (from_vsx, reg_class_contents[VSX_REGS]);
+ to_vsx = reg_class_contents[to] & reg_class_contents[VSX_REGS];
+ from_vsx = reg_class_contents[from] & reg_class_contents[VSX_REGS];
if (!hard_reg_set_empty_p (to_vsx)
&& !hard_reg_set_empty_p (from_vsx)
&& (TARGET_VSX