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-rw-r--r--gcc/config/i386/i386.md50
1 files changed, 50 insertions, 0 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md
index d15170e..c8fbf60 100644
--- a/gcc/config/i386/i386.md
+++ b/gcc/config/i386/i386.md
@@ -3180,6 +3180,38 @@
(const_int 8))
(subreg:SWI248 (match_dup 1) 0))])
+;; Eliminate redundant insv, e.g. xorl %eax,%eax; movb $0, %ah
+(define_peephole2
+ [(parallel [(set (match_operand:SWI48 0 "general_reg_operand")
+ (const_int 0))
+ (clobber (reg:CC FLAGS_REG))])
+ (set (zero_extract:SWI248 (match_operand:SWI248 1 "general_reg_operand")
+ (const_int 8)
+ (const_int 8))
+ (const_int 0))]
+ "REGNO (operands[0]) == REGNO (operands[1])"
+ [(parallel [(set (match_operand:SWI48 0 "general_reg_operand")
+ (const_int 0))
+ (clobber (reg:CC FLAGS_REG))])])
+
+;; Combine movl followed by movb.
+(define_peephole2
+ [(set (match_operand:SWI48 0 "general_reg_operand")
+ (match_operand:SWI48 1 "const_int_operand"))
+ (set (zero_extract:SWI248 (match_operand:SWI248 2 "general_reg_operand")
+ (const_int 8)
+ (const_int 8))
+ (match_operand:SWI248 3 "const_int_operand"))]
+ "REGNO (operands[0]) == REGNO (operands[2])"
+ [(set (match_operand:SWI48 0 "general_reg_operand")
+ (match_dup 4))]
+{
+ HOST_WIDE_INT tmp = INTVAL (operands[1]) & ~(HOST_WIDE_INT)0xff00;
+ tmp |= (INTVAL (operands[3]) & 0xff) << 8;
+ operands[4] = gen_int_mode (tmp, <SWI48:MODE>mode);
+})
+
+
(define_code_iterator any_extract [sign_extract zero_extract])
(define_insn "*insvqi_2"
@@ -4276,6 +4308,24 @@
[(set_attr "isa" "*,avx512dq,avx512dq")
(set_attr "type" "imovx,mskmov,mskmov")
(set_attr "mode" "SI,QI,QI")])
+
+;; Transform xorl; mov[bw] (set strict_low_part) into movz[bw]l.
+(define_peephole2
+ [(parallel [(set (match_operand:SWI48 0 "general_reg_operand")
+ (const_int 0))
+ (clobber (reg:CC FLAGS_REG))])
+ (set (strict_low_part (match_operand:SWI12 1 "general_reg_operand"))
+ (match_operand:SWI12 2 "nonimmediate_operand"))]
+ "REGNO (operands[0]) == REGNO (operands[1])"
+ [(set (match_dup 0) (zero_extend:SWI48 (match_dup 2)))])
+
+;; Likewise, but preserving FLAGS_REG.
+(define_peephole2
+ [(set (match_operand:SWI48 0 "general_reg_operand") (const_int 0))
+ (set (strict_low_part (match_operand:SWI12 1 "general_reg_operand"))
+ (match_operand:SWI12 2 "nonimmediate_operand"))]
+ "REGNO (operands[0]) == REGNO (operands[1])"
+ [(set (match_dup 0) (zero_extend:SWI48 (match_dup 2)))])
;; Sign extension instructions