diff options
| author | Richard Sandiford <richard.sandiford@arm.com> | 2014-10-29 12:02:45 +0000 |
|---|---|---|
| committer | Richard Sandiford <rsandifo@gcc.gnu.org> | 2014-10-29 12:02:45 +0000 |
| commit | ef4bddc299eae13cc25e50eebc523a4963e0a5f7 (patch) | |
| tree | 9a57dad975c942ce6765490066e2492bc1ce59e9 /gcc/config | |
| parent | ca557f533aa5e941d765c4c78b10b095537f0bdf (diff) | |
| download | gcc-ef4bddc299eae13cc25e50eebc523a4963e0a5f7.zip gcc-ef4bddc299eae13cc25e50eebc523a4963e0a5f7.tar.gz gcc-ef4bddc299eae13cc25e50eebc523a4963e0a5f7.tar.bz2 | |
decl.c, [...]: Remove redundant enum from machine_mode.
gcc/ada/
* gcc-interface/decl.c, gcc-interface/gigi.h, gcc-interface/misc.c,
gcc-interface/trans.c, gcc-interface/utils.c, gcc-interface/utils2.c:
Remove redundant enum from machine_mode.
gcc/c-family/
* c-common.c, c-common.h, c-cppbuiltin.c, c-lex.c: Remove redundant
enum from machine_mode.
gcc/c/
* c-decl.c, c-tree.h, c-typeck.c: Remove redundant enum from
machine_mode.
gcc/cp/
* constexpr.c: Remove redundant enum from machine_mode.
gcc/fortran/
* trans-types.c, trans-types.h: Remove redundant enum from
machine_mode.
gcc/go/
* go-lang.c: Remove redundant enum from machine_mode.
gcc/java/
* builtins.c, java-tree.h, typeck.c: Remove redundant enum from
machine_mode.
gcc/lto/
* lto-lang.c: Remove redundant enum from machine_mode.
gcc/
* addresses.h, alias.c, asan.c, auto-inc-dec.c, bt-load.c, builtins.c,
builtins.h, caller-save.c, calls.c, calls.h, cfgexpand.c, cfgloop.h,
cfgrtl.c, combine.c, compare-elim.c, config/aarch64/aarch64-builtins.c,
config/aarch64/aarch64-protos.h, config/aarch64/aarch64-simd.md,
config/aarch64/aarch64.c, config/aarch64/aarch64.h,
config/aarch64/aarch64.md, config/alpha/alpha-protos.h,
config/alpha/alpha.c, config/arc/arc-protos.h, config/arc/arc.c,
config/arc/arc.h, config/arc/predicates.md,
config/arm/aarch-common-protos.h, config/arm/aarch-common.c,
config/arm/arm-protos.h, config/arm/arm.c, config/arm/arm.h,
config/arm/arm.md, config/arm/neon.md, config/arm/thumb2.md,
config/avr/avr-log.c, config/avr/avr-protos.h, config/avr/avr.c,
config/avr/avr.md, config/bfin/bfin-protos.h, config/bfin/bfin.c,
config/c6x/c6x-protos.h, config/c6x/c6x.c, config/c6x/c6x.md,
config/cr16/cr16-protos.h, config/cr16/cr16.c,
config/cris/cris-protos.h, config/cris/cris.c, config/cris/cris.md,
config/darwin-protos.h, config/darwin.c,
config/epiphany/epiphany-protos.h, config/epiphany/epiphany.c,
config/epiphany/epiphany.md, config/fr30/fr30.c,
config/frv/frv-protos.h, config/frv/frv.c, config/frv/predicates.md,
config/h8300/h8300-protos.h, config/h8300/h8300.c,
config/i386/i386-builtin-types.awk, config/i386/i386-protos.h,
config/i386/i386.c, config/i386/i386.md, config/i386/predicates.md,
config/i386/sse.md, config/i386/sync.md, config/ia64/ia64-protos.h,
config/ia64/ia64.c, config/iq2000/iq2000-protos.h,
config/iq2000/iq2000.c, config/iq2000/iq2000.md,
config/lm32/lm32-protos.h, config/lm32/lm32.c,
config/m32c/m32c-protos.h, config/m32c/m32c.c,
config/m32r/m32r-protos.h, config/m32r/m32r.c,
config/m68k/m68k-protos.h, config/m68k/m68k.c,
config/mcore/mcore-protos.h, config/mcore/mcore.c,
config/mcore/mcore.md, config/mep/mep-protos.h, config/mep/mep.c,
config/microblaze/microblaze-protos.h, config/microblaze/microblaze.c,
config/mips/mips-protos.h, config/mips/mips.c,
config/mmix/mmix-protos.h, config/mmix/mmix.c,
config/mn10300/mn10300-protos.h, config/mn10300/mn10300.c,
config/moxie/moxie.c, config/msp430/msp430-protos.h,
config/msp430/msp430.c, config/nds32/nds32-cost.c,
config/nds32/nds32-intrinsic.c, config/nds32/nds32-md-auxiliary.c,
config/nds32/nds32-protos.h, config/nds32/nds32.c,
config/nios2/nios2-protos.h, config/nios2/nios2.c,
config/pa/pa-protos.h, config/pa/pa.c, config/pdp11/pdp11-protos.h,
config/pdp11/pdp11.c, config/rl78/rl78-protos.h, config/rl78/rl78.c,
config/rs6000/altivec.md, config/rs6000/rs6000-c.c,
config/rs6000/rs6000-protos.h, config/rs6000/rs6000.c,
config/rs6000/rs6000.h, config/rx/rx-protos.h, config/rx/rx.c,
config/s390/predicates.md, config/s390/s390-protos.h,
config/s390/s390.c, config/s390/s390.h, config/s390/s390.md,
config/sh/predicates.md, config/sh/sh-protos.h, config/sh/sh.c,
config/sh/sh.md, config/sparc/predicates.md,
config/sparc/sparc-protos.h, config/sparc/sparc.c,
config/sparc/sparc.md, config/spu/spu-protos.h, config/spu/spu.c,
config/stormy16/stormy16-protos.h, config/stormy16/stormy16.c,
config/tilegx/tilegx-protos.h, config/tilegx/tilegx.c,
config/tilegx/tilegx.md, config/tilepro/tilepro-protos.h,
config/tilepro/tilepro.c, config/v850/v850-protos.h,
config/v850/v850.c, config/v850/v850.md, config/vax/vax-protos.h,
config/vax/vax.c, config/vms/vms-c.c, config/xtensa/xtensa-protos.h,
config/xtensa/xtensa.c, coverage.c, cprop.c, cse.c, cselib.c, cselib.h,
dbxout.c, ddg.c, df-problems.c, dfp.c, dfp.h, doc/md.texi,
doc/rtl.texi, doc/tm.texi, doc/tm.texi.in, dojump.c, dse.c,
dwarf2cfi.c, dwarf2out.c, dwarf2out.h, emit-rtl.c, emit-rtl.h,
except.c, explow.c, expmed.c, expmed.h, expr.c, expr.h, final.c,
fixed-value.c, fixed-value.h, fold-const.c, function.c, function.h,
fwprop.c, gcse.c, gengenrtl.c, genmodes.c, genopinit.c, genoutput.c,
genpreds.c, genrecog.c, gensupport.c, gimple-ssa-strength-reduction.c,
graphite-clast-to-gimple.c, haifa-sched.c, hooks.c, hooks.h, ifcvt.c,
internal-fn.c, ira-build.c, ira-color.c, ira-conflicts.c, ira-costs.c,
ira-emit.c, ira-int.h, ira-lives.c, ira.c, ira.h, jump.c, langhooks.h,
libfuncs.h, lists.c, loop-doloop.c, loop-invariant.c, loop-iv.c,
loop-unroll.c, lower-subreg.c, lower-subreg.h, lra-assigns.c,
lra-constraints.c, lra-eliminations.c, lra-int.h, lra-lives.c,
lra-spills.c, lra.c, lra.h, machmode.h, omp-low.c, optabs.c, optabs.h,
output.h, postreload.c, print-tree.c, read-rtl.c, real.c, real.h,
recog.c, recog.h, ree.c, reg-stack.c, regcprop.c, reginfo.c,
regrename.c, regs.h, reload.c, reload.h, reload1.c, rtl.c, rtl.h,
rtlanal.c, rtlhash.c, rtlhooks-def.h, rtlhooks.c, sched-deps.c,
sel-sched-dump.c, sel-sched-ir.c, sel-sched-ir.h, sel-sched.c,
simplify-rtx.c, stmt.c, stor-layout.c, stor-layout.h, target.def,
targhooks.c, targhooks.h, tree-affine.c, tree-call-cdce.c,
tree-complex.c, tree-data-ref.c, tree-dfa.c, tree-if-conv.c,
tree-inline.c, tree-outof-ssa.c, tree-scalar-evolution.c,
tree-ssa-address.c, tree-ssa-ccp.c, tree-ssa-loop-ivopts.c,
tree-ssa-loop-ivopts.h, tree-ssa-loop-manip.c,
tree-ssa-loop-prefetch.c, tree-ssa-math-opts.c, tree-ssa-reassoc.c,
tree-ssa-sccvn.c, tree-streamer-in.c, tree-switch-conversion.c,
tree-vect-data-refs.c, tree-vect-generic.c, tree-vect-loop.c,
tree-vect-patterns.c, tree-vect-slp.c, tree-vect-stmts.c,
tree-vrp.c, tree.c, tree.h, tsan.c, ubsan.c, valtrack.c,
var-tracking.c, varasm.c: Remove redundant enum from
machine_mode.
gcc/
* gengtype.c (main): Treat machine_mode as a scalar typedef.
* genmodes.c (emit_insn_modes_h): Hide inline functions if
USED_FOR_TARGET.
From-SVN: r216834
Diffstat (limited to 'gcc/config')
131 files changed, 3219 insertions, 3219 deletions
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index c8c99f1..df65c85 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -119,7 +119,7 @@ enum aarch64_type_qualifiers typedef struct { const char *name; - enum machine_mode mode; + machine_mode mode; const enum insn_code code; unsigned int fcode; enum aarch64_type_qualifiers *qualifiers; @@ -316,7 +316,7 @@ static aarch64_simd_builtin_datum aarch64_simd_builtin_data[] = { typedef struct { const char *name; - enum machine_mode mode; + machine_mode mode; const enum insn_code icode; unsigned int fcode; } aarch64_crc_builtin_datum; @@ -365,7 +365,7 @@ static GTY(()) tree aarch64_builtin_decls[AARCH64_BUILTIN_MAX]; /* Return a tree for a signed or unsigned argument of either the mode specified by MODE, or the inner mode of MODE. */ tree -aarch64_build_scalar_type (enum machine_mode mode, +aarch64_build_scalar_type (machine_mode mode, bool unsigned_p, bool poly_p) { @@ -444,7 +444,7 @@ aarch64_build_scalar_type (enum machine_mode mode, } tree -aarch64_build_vector_type (enum machine_mode mode, +aarch64_build_vector_type (machine_mode mode, bool unsigned_p, bool poly_p) { @@ -511,7 +511,7 @@ aarch64_build_vector_type (enum machine_mode mode, } tree -aarch64_build_type (enum machine_mode mode, bool unsigned_p, bool poly_p) +aarch64_build_type (machine_mode mode, bool unsigned_p, bool poly_p) { if (VECTOR_MODE_P (mode)) return aarch64_build_vector_type (mode, unsigned_p, poly_p); @@ -520,19 +520,19 @@ aarch64_build_type (enum machine_mode mode, bool unsigned_p, bool poly_p) } tree -aarch64_build_signed_type (enum machine_mode mode) +aarch64_build_signed_type (machine_mode mode) { return aarch64_build_type (mode, false, false); } tree -aarch64_build_unsigned_type (enum machine_mode mode) +aarch64_build_unsigned_type (machine_mode mode) { return aarch64_build_type (mode, true, false); } tree -aarch64_build_poly_type (enum machine_mode mode) +aarch64_build_poly_type (machine_mode mode) { return aarch64_build_type (mode, false, true); } @@ -646,7 +646,7 @@ aarch64_init_simd_builtins (void) removing duplicates for us. */ for (; op_num >= 0; arg_num--, op_num--) { - enum machine_mode op_mode = insn_data[d->code].operand[op_num].mode; + machine_mode op_mode = insn_data[d->code].operand[op_num].mode; enum aarch64_type_qualifiers qualifiers = d->qualifiers[arg_num]; if (qualifiers & qualifier_unsigned) @@ -781,8 +781,8 @@ aarch64_simd_expand_args (rtx target, int icode, int have_retval, rtx pat; tree arg[SIMD_MAX_BUILTIN_ARGS]; rtx op[SIMD_MAX_BUILTIN_ARGS]; - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode[SIMD_MAX_BUILTIN_ARGS]; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode[SIMD_MAX_BUILTIN_ARGS]; int argc = 0; if (have_retval @@ -959,9 +959,9 @@ aarch64_crc32_expand_builtin (int fcode, tree exp, rtx target) tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; if (! target || GET_MODE (target) != tmode @@ -990,7 +990,7 @@ rtx aarch64_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -1037,7 +1037,7 @@ aarch64_expand_builtin (tree exp, tree aarch64_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) { - enum machine_mode in_mode, out_mode; + machine_mode in_mode, out_mode; int in_n, out_n; if (TREE_CODE (type_out) != VECTOR_TYPE diff --git a/gcc/config/aarch64/aarch64-protos.h b/gcc/config/aarch64/aarch64-protos.h index c57a467..810644c 100644 --- a/gcc/config/aarch64/aarch64-protos.h +++ b/gcc/config/aarch64/aarch64-protos.h @@ -174,9 +174,9 @@ struct tune_params HOST_WIDE_INT aarch64_initial_elimination_offset (unsigned, unsigned); int aarch64_get_condition_code (rtx); -bool aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode); -bool aarch64_cannot_change_mode_class (enum machine_mode, - enum machine_mode, +bool aarch64_bitmask_imm (HOST_WIDE_INT val, machine_mode); +bool aarch64_cannot_change_mode_class (machine_mode, + machine_mode, enum reg_class); enum aarch64_symbol_type aarch64_classify_symbolic_expression (rtx, enum aarch64_symbol_context); @@ -187,29 +187,29 @@ bool aarch64_float_const_zero_rtx_p (rtx); bool aarch64_function_arg_regno_p (unsigned); bool aarch64_gen_movmemqi (rtx *); bool aarch64_gimple_fold_builtin (gimple_stmt_iterator *); -bool aarch64_is_extend_from_extract (enum machine_mode, rtx, rtx); +bool aarch64_is_extend_from_extract (machine_mode, rtx, rtx); bool aarch64_is_long_call_p (rtx); bool aarch64_label_mentioned_p (rtx); bool aarch64_legitimate_pic_operand_p (rtx); -bool aarch64_modes_tieable_p (enum machine_mode mode1, - enum machine_mode mode2); -bool aarch64_move_imm (HOST_WIDE_INT, enum machine_mode); +bool aarch64_modes_tieable_p (machine_mode mode1, + machine_mode mode2); +bool aarch64_move_imm (HOST_WIDE_INT, machine_mode); bool aarch64_mov_operand_p (rtx, enum aarch64_symbol_context, - enum machine_mode); -bool aarch64_offset_7bit_signed_scaled_p (enum machine_mode, HOST_WIDE_INT); -char *aarch64_output_scalar_simd_mov_immediate (rtx, enum machine_mode); -char *aarch64_output_simd_mov_immediate (rtx, enum machine_mode, unsigned); -bool aarch64_pad_arg_upward (enum machine_mode, const_tree); -bool aarch64_pad_reg_upward (enum machine_mode, const_tree, bool); + machine_mode); +bool aarch64_offset_7bit_signed_scaled_p (machine_mode, HOST_WIDE_INT); +char *aarch64_output_scalar_simd_mov_immediate (rtx, machine_mode); +char *aarch64_output_simd_mov_immediate (rtx, machine_mode, unsigned); +bool aarch64_pad_arg_upward (machine_mode, const_tree); +bool aarch64_pad_reg_upward (machine_mode, const_tree, bool); bool aarch64_regno_ok_for_base_p (int, bool); bool aarch64_regno_ok_for_index_p (int, bool); -bool aarch64_simd_check_vect_par_cnst_half (rtx op, enum machine_mode mode, +bool aarch64_simd_check_vect_par_cnst_half (rtx op, machine_mode mode, bool high); -bool aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode); -bool aarch64_simd_imm_zero_p (rtx, enum machine_mode); -bool aarch64_simd_scalar_immediate_valid_for_move (rtx, enum machine_mode); -bool aarch64_simd_shift_imm_p (rtx, enum machine_mode, bool); -bool aarch64_simd_valid_immediate (rtx, enum machine_mode, bool, +bool aarch64_simd_imm_scalar_p (rtx x, machine_mode mode); +bool aarch64_simd_imm_zero_p (rtx, machine_mode); +bool aarch64_simd_scalar_immediate_valid_for_move (rtx, machine_mode); +bool aarch64_simd_shift_imm_p (rtx, machine_mode, bool); +bool aarch64_simd_valid_immediate (rtx, machine_mode, bool, struct simd_immediate_info *); bool aarch64_symbolic_address_p (rtx); bool aarch64_uimm12_shift (HOST_WIDE_INT); @@ -222,19 +222,19 @@ enum aarch64_symbol_type aarch64_classify_symbol (rtx, enum aarch64_symbol_type aarch64_classify_tls_symbol (rtx); enum reg_class aarch64_regno_regclass (unsigned); int aarch64_asm_preferred_eh_data_format (int, int); -enum machine_mode aarch64_hard_regno_caller_save_mode (unsigned, unsigned, - enum machine_mode); -int aarch64_hard_regno_mode_ok (unsigned, enum machine_mode); -int aarch64_hard_regno_nregs (unsigned, enum machine_mode); +machine_mode aarch64_hard_regno_caller_save_mode (unsigned, unsigned, + machine_mode); +int aarch64_hard_regno_mode_ok (unsigned, machine_mode); +int aarch64_hard_regno_nregs (unsigned, machine_mode); int aarch64_simd_attr_length_move (rtx_insn *); int aarch64_uxt_size (int, HOST_WIDE_INT); rtx aarch64_final_eh_return_addr (void); -rtx aarch64_legitimize_reload_address (rtx *, enum machine_mode, int, int, int); +rtx aarch64_legitimize_reload_address (rtx *, machine_mode, int, int, int); const char *aarch64_output_move_struct (rtx *operands); rtx aarch64_return_addr (int, rtx); -rtx aarch64_simd_gen_const_vector_dup (enum machine_mode, int); +rtx aarch64_simd_gen_const_vector_dup (machine_mode, int); bool aarch64_simd_mem_operand_p (rtx); -rtx aarch64_simd_vect_par_cnst_half (enum machine_mode, bool); +rtx aarch64_simd_vect_par_cnst_half (machine_mode, bool); rtx aarch64_tls_get_addr (void); tree aarch64_fold_builtin (tree, int, tree *, bool); unsigned aarch64_dbx_register_number (unsigned); @@ -260,7 +260,7 @@ void aarch64_simd_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int); /* Emit code to place a AdvSIMD pair result in memory locations (with equal registers). */ -void aarch64_simd_emit_pair_result_insn (enum machine_mode, +void aarch64_simd_emit_pair_result_insn (machine_mode, rtx (*intfn) (rtx, rtx, rtx), rtx, rtx); @@ -282,8 +282,8 @@ bool aarch64_float_const_representable_p (rtx); #if defined (RTX_CODE) -bool aarch64_legitimate_address_p (enum machine_mode, rtx, RTX_CODE, bool); -enum machine_mode aarch64_select_cc_mode (RTX_CODE, rtx, rtx); +bool aarch64_legitimate_address_p (machine_mode, rtx, RTX_CODE, bool); +machine_mode aarch64_select_cc_mode (RTX_CODE, rtx, rtx); rtx aarch64_gen_compare_reg (RTX_CODE, rtx, rtx); rtx aarch64_load_tp (rtx); @@ -297,7 +297,7 @@ void aarch64_init_builtins (void); rtx aarch64_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED); tree aarch64_builtin_decl (unsigned, bool ATTRIBUTE_UNUSED); diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md index 578760a..ef196e4 100644 --- a/gcc/config/aarch64/aarch64-simd.md +++ b/gcc/config/aarch64/aarch64-simd.md @@ -3807,7 +3807,7 @@ if (GP_REGNUM_P (REGNO (operands[0])) && GP_REGNUM_P (REGNO (operands[1]))) { - enum machine_mode mode = SELECT_CC_MODE (<CMP>, operands[1], operands[2]); + machine_mode mode = SELECT_CC_MODE (<CMP>, operands[1], operands[2]); rtx cc_reg = aarch64_gen_compare_reg (<CMP>, operands[1], operands[2]); rtx comparison = gen_rtx_<CMP> (mode, operands[1], operands[2]); emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg)); @@ -3870,7 +3870,7 @@ if (GP_REGNUM_P (REGNO (operands[0])) && GP_REGNUM_P (REGNO (operands[1]))) { - enum machine_mode mode = CCmode; + machine_mode mode = CCmode; rtx cc_reg = aarch64_gen_compare_reg (<CMP>, operands[1], operands[2]); rtx comparison = gen_rtx_<CMP> (mode, operands[1], operands[2]); emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg)); @@ -3943,7 +3943,7 @@ && GP_REGNUM_P (REGNO (operands[1]))) { rtx and_tree = gen_rtx_AND (DImode, operands[1], operands[2]); - enum machine_mode mode = SELECT_CC_MODE (NE, and_tree, const0_rtx); + machine_mode mode = SELECT_CC_MODE (NE, and_tree, const0_rtx); rtx cc_reg = aarch64_gen_compare_reg (NE, and_tree, const0_rtx); rtx comparison = gen_rtx_NE (mode, and_tree, const0_rtx); emit_insn (gen_cstoredi_neg (operands[0], comparison, cc_reg)); @@ -4319,7 +4319,7 @@ (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <V_TWO_ELEM>mode; + machine_mode mode = <V_TWO_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); emit_insn (gen_aarch64_simd_ld2r<mode> (operands[0], mem)); @@ -4332,7 +4332,7 @@ (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <V_THREE_ELEM>mode; + machine_mode mode = <V_THREE_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); emit_insn (gen_aarch64_simd_ld3r<mode> (operands[0], mem)); @@ -4345,7 +4345,7 @@ (unspec:VALLDIF [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <V_FOUR_ELEM>mode; + machine_mode mode = <V_FOUR_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); emit_insn (gen_aarch64_simd_ld4r<mode> (operands[0],mem)); @@ -4490,7 +4490,7 @@ (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <VSTRUCT:VSTRUCT_DREG>mode; + machine_mode mode = <VSTRUCT:VSTRUCT_DREG>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); emit_insn (gen_aarch64_ld<VSTRUCT:nregs><VDC:mode>_dreg (operands[0], mem)); @@ -4502,7 +4502,7 @@ (match_operand:DI 1 "register_operand")] "TARGET_SIMD" { - enum machine_mode mode = <VALL:MODE>mode; + machine_mode mode = <VALL:MODE>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); if (BYTES_BIG_ENDIAN) @@ -4518,7 +4518,7 @@ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <VSTRUCT:MODE>mode; + machine_mode mode = <VSTRUCT:MODE>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); emit_insn (gen_vec_load_lanes<VSTRUCT:mode><VQ:mode> (operands[0], mem)); @@ -4533,7 +4533,7 @@ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <V_TWO_ELEM>mode; + machine_mode mode = <V_TWO_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode)); @@ -4552,7 +4552,7 @@ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <V_THREE_ELEM>mode; + machine_mode mode = <V_THREE_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode)); @@ -4571,7 +4571,7 @@ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <V_FOUR_ELEM>mode; + machine_mode mode = <V_FOUR_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[1]); aarch64_simd_lane_bounds (operands[3], 0, GET_MODE_NUNITS (<VCONQ>mode)); @@ -4804,7 +4804,7 @@ (unspec:VDC [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <VSTRUCT:VSTRUCT_DREG>mode; + machine_mode mode = <VSTRUCT:VSTRUCT_DREG>mode; rtx mem = gen_rtx_MEM (mode, operands[0]); emit_insn (gen_aarch64_st<VSTRUCT:nregs><VDC:mode>_dreg (mem, operands[1])); @@ -4817,7 +4817,7 @@ (unspec:VQ [(const_int 0)] UNSPEC_VSTRUCTDUMMY)] "TARGET_SIMD" { - enum machine_mode mode = <VSTRUCT:MODE>mode; + machine_mode mode = <VSTRUCT:MODE>mode; rtx mem = gen_rtx_MEM (mode, operands[0]); emit_insn (gen_vec_store_lanes<VSTRUCT:mode><VQ:mode> (mem, operands[1])); @@ -4831,7 +4831,7 @@ (match_operand:SI 2 "immediate_operand")] "TARGET_SIMD" { - enum machine_mode mode = <V_TWO_ELEM>mode; + machine_mode mode = <V_TWO_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[0]); operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2]))); @@ -4848,7 +4848,7 @@ (match_operand:SI 2 "immediate_operand")] "TARGET_SIMD" { - enum machine_mode mode = <V_THREE_ELEM>mode; + machine_mode mode = <V_THREE_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[0]); operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2]))); @@ -4865,7 +4865,7 @@ (match_operand:SI 2 "immediate_operand")] "TARGET_SIMD" { - enum machine_mode mode = <V_FOUR_ELEM>mode; + machine_mode mode = <V_FOUR_ELEM>mode; rtx mem = gen_rtx_MEM (mode, operands[0]); operands[2] = GEN_INT (ENDIAN_LANE_N (<MODE>mode, INTVAL (operands[2]))); @@ -4880,7 +4880,7 @@ (match_operand:VALL 1 "register_operand")] "TARGET_SIMD" { - enum machine_mode mode = <VALL:MODE>mode; + machine_mode mode = <VALL:MODE>mode; rtx mem = gen_rtx_MEM (mode, operands[0]); if (BYTES_BIG_ENDIAN) diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index bd82d1c..e222ee3 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -140,19 +140,19 @@ enum aarch64_code_model aarch64_cmodel; #endif static bool aarch64_lra_p (void); -static bool aarch64_composite_type_p (const_tree, enum machine_mode); -static bool aarch64_vfp_is_call_or_return_candidate (enum machine_mode, +static bool aarch64_composite_type_p (const_tree, machine_mode); +static bool aarch64_vfp_is_call_or_return_candidate (machine_mode, const_tree, - enum machine_mode *, int *, + machine_mode *, int *, bool *); static void aarch64_elf_asm_constructor (rtx, int) ATTRIBUTE_UNUSED; static void aarch64_elf_asm_destructor (rtx, int) ATTRIBUTE_UNUSED; static void aarch64_override_options_after_change (void); -static bool aarch64_vector_mode_supported_p (enum machine_mode); +static bool aarch64_vector_mode_supported_p (machine_mode); static unsigned bit_count (unsigned HOST_WIDE_INT); -static bool aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode, +static bool aarch64_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel); -static int aarch64_address_cost (rtx, enum machine_mode, addr_space_t, bool); +static int aarch64_address_cost (rtx, machine_mode, addr_space_t, bool); /* The processor for which instructions should be scheduled. */ enum aarch64_processor aarch64_tune = cortexa53; @@ -401,7 +401,7 @@ static const struct aarch64_option_extension all_extensions[] = /* Used to track the size of an address when generating a pre/post increment address. */ -static enum machine_mode aarch64_memory_reference_mode; +static machine_mode aarch64_memory_reference_mode; /* Used to force GTY into this file. */ static GTY(()) int gty_dummy; @@ -447,14 +447,14 @@ aarch64_dbx_register_number (unsigned regno) /* Return TRUE if MODE is any of the large INT modes. */ static bool -aarch64_vect_struct_mode_p (enum machine_mode mode) +aarch64_vect_struct_mode_p (machine_mode mode) { return mode == OImode || mode == CImode || mode == XImode; } /* Return TRUE if MODE is any of the vector modes. */ static bool -aarch64_vector_mode_p (enum machine_mode mode) +aarch64_vector_mode_p (machine_mode mode) { return aarch64_vector_mode_supported_p (mode) || aarch64_vect_struct_mode_p (mode); @@ -462,7 +462,7 @@ aarch64_vector_mode_p (enum machine_mode mode) /* Implement target hook TARGET_ARRAY_MODE_SUPPORTED_P. */ static bool -aarch64_array_mode_supported_p (enum machine_mode mode, +aarch64_array_mode_supported_p (machine_mode mode, unsigned HOST_WIDE_INT nelems) { if (TARGET_SIMD @@ -476,7 +476,7 @@ aarch64_array_mode_supported_p (enum machine_mode mode, /* Implement HARD_REGNO_NREGS. */ int -aarch64_hard_regno_nregs (unsigned regno, enum machine_mode mode) +aarch64_hard_regno_nregs (unsigned regno, machine_mode mode) { switch (aarch64_regno_regclass (regno)) { @@ -492,7 +492,7 @@ aarch64_hard_regno_nregs (unsigned regno, enum machine_mode mode) /* Implement HARD_REGNO_MODE_OK. */ int -aarch64_hard_regno_mode_ok (unsigned regno, enum machine_mode mode) +aarch64_hard_regno_mode_ok (unsigned regno, machine_mode mode) { if (GET_MODE_CLASS (mode) == MODE_CC) return regno == CC_REGNUM; @@ -522,9 +522,9 @@ aarch64_hard_regno_mode_ok (unsigned regno, enum machine_mode mode) } /* Implement HARD_REGNO_CALLER_SAVE_MODE. */ -enum machine_mode +machine_mode aarch64_hard_regno_caller_save_mode (unsigned regno, unsigned nregs, - enum machine_mode mode) + machine_mode mode) { /* Handle modes that fit within single registers. */ if (nregs == 1 && GET_MODE_SIZE (mode) <= 16) @@ -561,7 +561,7 @@ aarch64_is_long_call_p (rtx sym) (extract:MODE (mult (reg) (MULT_IMM)) (EXTRACT_IMM) (const_int 0)). */ bool -aarch64_is_extend_from_extract (enum machine_mode mode, rtx mult_imm, +aarch64_is_extend_from_extract (machine_mode mode, rtx mult_imm, rtx extract_imm) { HOST_WIDE_INT mult_val, extract_val; @@ -595,7 +595,7 @@ emit_set_insn (rtx x, rtx y) rtx aarch64_gen_compare_reg (RTX_CODE code, rtx x, rtx y) { - enum machine_mode mode = SELECT_CC_MODE (code, x, y); + machine_mode mode = SELECT_CC_MODE (code, x, y); rtx cc_reg = gen_rtx_REG (mode, CC_REGNUM); emit_set_insn (cc_reg, gen_rtx_COMPARE (mode, x, y)); @@ -686,7 +686,7 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm, { /* In ILP32, the mode of dest can be either SImode or DImode. */ rtx tmp_reg = dest; - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); gcc_assert (mode == Pmode || mode == ptr_mode); @@ -712,7 +712,7 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm, This is why we have to handle three different ldr_got_small patterns here (two patterns for ILP32). */ rtx tmp_reg = dest; - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); if (can_create_pseudo_p ()) tmp_reg = gen_reg_rtx (mode); @@ -751,7 +751,7 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm, case SYMBOL_SMALL_TLSDESC: { - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); rtx x0 = gen_rtx_REG (mode, R0_REGNUM); rtx tp; @@ -782,7 +782,7 @@ aarch64_load_symref_appropriately (rtx dest, rtx imm, DImode if dest is dereferenced to access the memeory. This is why we have to handle three different tlsie_small patterns here (two patterns for ILP32). */ - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); rtx tmp_reg = gen_reg_rtx (mode); rtx tp = aarch64_load_tp (NULL); @@ -849,7 +849,7 @@ aarch64_split_128bit_move (rtx dst, rtx src) rtx dst_lo, dst_hi; rtx src_lo, src_hi; - enum machine_mode mode = GET_MODE (dst); + machine_mode mode = GET_MODE (dst); gcc_assert (mode == TImode || mode == TFmode); gcc_assert (!(side_effects_p (src) || side_effects_p (dst))); @@ -927,8 +927,8 @@ aarch64_split_128bit_move_p (rtx dst, rtx src) void aarch64_split_simd_combine (rtx dst, rtx src1, rtx src2) { - enum machine_mode src_mode = GET_MODE (src1); - enum machine_mode dst_mode = GET_MODE (dst); + machine_mode src_mode = GET_MODE (src1); + machine_mode dst_mode = GET_MODE (dst); gcc_assert (VECTOR_MODE_P (dst_mode)); @@ -970,8 +970,8 @@ aarch64_split_simd_combine (rtx dst, rtx src1, rtx src2) void aarch64_split_simd_move (rtx dst, rtx src) { - enum machine_mode src_mode = GET_MODE (src); - enum machine_mode dst_mode = GET_MODE (dst); + machine_mode src_mode = GET_MODE (src); + machine_mode dst_mode = GET_MODE (dst); gcc_assert (VECTOR_MODE_P (dst_mode)); @@ -1011,7 +1011,7 @@ aarch64_split_simd_move (rtx dst, rtx src) } static rtx -aarch64_force_temporary (enum machine_mode mode, rtx x, rtx value) +aarch64_force_temporary (machine_mode mode, rtx x, rtx value) { if (can_create_pseudo_p ()) return force_reg (mode, value); @@ -1024,7 +1024,7 @@ aarch64_force_temporary (enum machine_mode mode, rtx x, rtx value) static rtx -aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT offset) +aarch64_add_offset (machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT offset) { if (!aarch64_plus_immediate (GEN_INT (offset), mode)) { @@ -1043,7 +1043,7 @@ aarch64_add_offset (enum machine_mode mode, rtx temp, rtx reg, HOST_WIDE_INT off void aarch64_expand_mov_immediate (rtx dest, rtx imm) { - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); unsigned HOST_WIDE_INT mask; int i; bool first; @@ -1343,12 +1343,12 @@ aarch64_function_ok_for_sibcall (tree decl ATTRIBUTE_UNUSED, static bool aarch64_pass_by_reference (cumulative_args_t pcum ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { HOST_WIDE_INT size; - enum machine_mode dummymode; + machine_mode dummymode; int nregs; /* GET_MODE_SIZE (BLKmode) is useless since it is 0. */ @@ -1381,7 +1381,7 @@ aarch64_pass_by_reference (cumulative_args_t pcum ATTRIBUTE_UNUSED, static bool aarch64_return_in_msb (const_tree valtype) { - enum machine_mode dummy_mode; + machine_mode dummy_mode; int dummy_int; /* Never happens in little-endian mode. */ @@ -1413,10 +1413,10 @@ static rtx aarch64_function_value (const_tree type, const_tree func, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; int unsignedp; int count; - enum machine_mode ag_mode; + machine_mode ag_mode; mode = TYPE_MODE (type); if (INTEGRAL_TYPE_P (type)) @@ -1495,7 +1495,7 @@ static bool aarch64_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) { HOST_WIDE_INT size; - enum machine_mode ag_mode; + machine_mode ag_mode; int count; if (!AGGREGATE_TYPE_P (type) @@ -1517,7 +1517,7 @@ aarch64_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) } static bool -aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, enum machine_mode mode, +aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, machine_mode mode, const_tree type, int *nregs) { CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); @@ -1534,7 +1534,7 @@ aarch64_vfp_is_call_candidate (cumulative_args_t pcum_v, enum machine_mode mode, This is a helper function for local use only. */ static unsigned int -aarch64_function_arg_alignment (enum machine_mode mode, const_tree type) +aarch64_function_arg_alignment (machine_mode mode, const_tree type) { unsigned int alignment; @@ -1560,7 +1560,7 @@ aarch64_function_arg_alignment (enum machine_mode mode, const_tree type) numbers refer to the rule numbers in the AAPCS64. */ static void -aarch64_layout_arg (cumulative_args_t pcum_v, enum machine_mode mode, +aarch64_layout_arg (cumulative_args_t pcum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { @@ -1691,7 +1691,7 @@ on_stack: /* Implement TARGET_FUNCTION_ARG. */ static rtx -aarch64_function_arg (cumulative_args_t pcum_v, enum machine_mode mode, +aarch64_function_arg (cumulative_args_t pcum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); @@ -1726,7 +1726,7 @@ aarch64_init_cumulative_args (CUMULATIVE_ARGS *pcum, static void aarch64_function_arg_advance (cumulative_args_t pcum_v, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named) { @@ -1760,7 +1760,7 @@ aarch64_function_arg_regno_p (unsigned regno) 8 bytes. */ static unsigned int -aarch64_function_arg_boundary (enum machine_mode mode, const_tree type) +aarch64_function_arg_boundary (machine_mode mode, const_tree type) { unsigned int alignment = aarch64_function_arg_alignment (mode, type); @@ -1781,7 +1781,7 @@ aarch64_function_arg_boundary (enum machine_mode mode, const_tree type) The related parameter passing rules are B.4, C.3, C.5 and C.14. */ bool -aarch64_pad_arg_upward (enum machine_mode mode, const_tree type) +aarch64_pad_arg_upward (machine_mode mode, const_tree type) { /* On little-endian targets, the least significant byte of every stack argument is passed at the lowest byte address of the stack slot. */ @@ -1824,7 +1824,7 @@ aarch64_pad_arg_upward (enum machine_mode mode, const_tree type) significant byte does. */ bool -aarch64_pad_reg_upward (enum machine_mode mode, const_tree type, +aarch64_pad_reg_upward (machine_mode mode, const_tree type, bool first ATTRIBUTE_UNUSED) { @@ -1841,7 +1841,7 @@ aarch64_pad_reg_upward (enum machine_mode mode, const_tree type, return !BYTES_BIG_ENDIAN; } -static enum machine_mode +static machine_mode aarch64_libgcc_cmp_return_mode (void) { return SImode; @@ -1973,7 +1973,7 @@ aarch64_next_callee_save (unsigned regno, unsigned limit) } static void -aarch64_pushwb_single_reg (enum machine_mode mode, unsigned regno, +aarch64_pushwb_single_reg (machine_mode mode, unsigned regno, HOST_WIDE_INT adjustment) { rtx base_rtx = stack_pointer_rtx; @@ -1989,7 +1989,7 @@ aarch64_pushwb_single_reg (enum machine_mode mode, unsigned regno, } static rtx -aarch64_gen_storewb_pair (enum machine_mode mode, rtx base, rtx reg, rtx reg2, +aarch64_gen_storewb_pair (machine_mode mode, rtx base, rtx reg, rtx reg2, HOST_WIDE_INT adjustment) { switch (mode) @@ -2008,7 +2008,7 @@ aarch64_gen_storewb_pair (enum machine_mode mode, rtx base, rtx reg, rtx reg2, } static void -aarch64_pushwb_pair_reg (enum machine_mode mode, unsigned regno1, +aarch64_pushwb_pair_reg (machine_mode mode, unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment) { rtx_insn *insn; @@ -2023,7 +2023,7 @@ aarch64_pushwb_pair_reg (enum machine_mode mode, unsigned regno1, } static rtx -aarch64_gen_loadwb_pair (enum machine_mode mode, rtx base, rtx reg, rtx reg2, +aarch64_gen_loadwb_pair (machine_mode mode, rtx base, rtx reg, rtx reg2, HOST_WIDE_INT adjustment) { switch (mode) @@ -2040,7 +2040,7 @@ aarch64_gen_loadwb_pair (enum machine_mode mode, rtx base, rtx reg, rtx reg2, } static rtx -aarch64_gen_store_pair (enum machine_mode mode, rtx mem1, rtx reg1, rtx mem2, +aarch64_gen_store_pair (machine_mode mode, rtx mem1, rtx reg1, rtx mem2, rtx reg2) { switch (mode) @@ -2057,7 +2057,7 @@ aarch64_gen_store_pair (enum machine_mode mode, rtx mem1, rtx reg1, rtx mem2, } static rtx -aarch64_gen_load_pair (enum machine_mode mode, rtx reg1, rtx mem1, rtx reg2, +aarch64_gen_load_pair (machine_mode mode, rtx reg1, rtx mem1, rtx reg2, rtx mem2) { switch (mode) @@ -2075,11 +2075,11 @@ aarch64_gen_load_pair (enum machine_mode mode, rtx reg1, rtx mem1, rtx reg2, static void -aarch64_save_callee_saves (enum machine_mode mode, HOST_WIDE_INT start_offset, +aarch64_save_callee_saves (machine_mode mode, HOST_WIDE_INT start_offset, unsigned start, unsigned limit, bool skip_wb) { rtx_insn *insn; - rtx (*gen_mem_ref) (enum machine_mode, rtx) = (frame_pointer_needed + rtx (*gen_mem_ref) (machine_mode, rtx) = (frame_pointer_needed ? gen_frame_mem : gen_rtx_MEM); unsigned regno; unsigned regno2; @@ -2132,12 +2132,12 @@ aarch64_save_callee_saves (enum machine_mode mode, HOST_WIDE_INT start_offset, } static void -aarch64_restore_callee_saves (enum machine_mode mode, +aarch64_restore_callee_saves (machine_mode mode, HOST_WIDE_INT start_offset, unsigned start, unsigned limit, bool skip_wb, rtx *cfi_ops) { rtx base_rtx = stack_pointer_rtx; - rtx (*gen_mem_ref) (enum machine_mode, rtx) = (frame_pointer_needed + rtx (*gen_mem_ref) (machine_mode, rtx) = (frame_pointer_needed ? gen_frame_mem : gen_rtx_MEM); unsigned regno; unsigned regno2; @@ -2340,7 +2340,7 @@ aarch64_expand_prologue (void) } else { - enum machine_mode mode1 = (reg1 <= R30_REGNUM) ? DImode : DFmode; + machine_mode mode1 = (reg1 <= R30_REGNUM) ? DImode : DFmode; skip_wb = true; @@ -2461,7 +2461,7 @@ aarch64_expand_epilogue (bool for_sibcall) if (skip_wb) { - enum machine_mode mode1 = (reg1 <= R30_REGNUM) ? DImode : DFmode; + machine_mode mode1 = (reg1 <= R30_REGNUM) ? DImode : DFmode; rtx rreg1 = gen_rtx_REG (mode1, reg1); cfi_ops = alloc_reg_note (REG_CFA_RESTORE, rreg1, cfi_ops); @@ -2891,7 +2891,7 @@ aarch64_uimm12_shift (HOST_WIDE_INT val) /* Return true if val is an immediate that can be loaded into a register by a MOVZ instruction. */ static bool -aarch64_movw_imm (HOST_WIDE_INT val, enum machine_mode mode) +aarch64_movw_imm (HOST_WIDE_INT val, machine_mode mode) { if (GET_MODE_SIZE (mode) > 4) { @@ -2911,7 +2911,7 @@ aarch64_movw_imm (HOST_WIDE_INT val, enum machine_mode mode) /* Return true if val is a valid bitmask immediate. */ bool -aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode mode) +aarch64_bitmask_imm (HOST_WIDE_INT val, machine_mode mode) { if (GET_MODE_SIZE (mode) < 8) { @@ -2927,7 +2927,7 @@ aarch64_bitmask_imm (HOST_WIDE_INT val, enum machine_mode mode) /* Return true if val is an immediate that can be loaded into a register in a single instruction. */ bool -aarch64_move_imm (HOST_WIDE_INT val, enum machine_mode mode) +aarch64_move_imm (HOST_WIDE_INT val, machine_mode mode) { if (aarch64_movw_imm (val, mode) || aarch64_movw_imm (~val, mode)) return 1; @@ -2935,7 +2935,7 @@ aarch64_move_imm (HOST_WIDE_INT val, enum machine_mode mode) } static bool -aarch64_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +aarch64_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { rtx base, offset; @@ -3019,7 +3019,7 @@ aarch64_base_register_rtx_p (rtx x, bool strict_p) static bool aarch64_classify_index (struct aarch64_address_info *info, rtx x, - enum machine_mode mode, bool strict_p) + machine_mode mode, bool strict_p) { enum aarch64_address_type type; rtx index; @@ -3174,7 +3174,7 @@ aarch64_classify_index (struct aarch64_address_info *info, rtx x, } bool -aarch64_offset_7bit_signed_scaled_p (enum machine_mode mode, HOST_WIDE_INT offset) +aarch64_offset_7bit_signed_scaled_p (machine_mode mode, HOST_WIDE_INT offset) { return (offset >= -64 * GET_MODE_SIZE (mode) && offset < 64 * GET_MODE_SIZE (mode) @@ -3182,14 +3182,14 @@ aarch64_offset_7bit_signed_scaled_p (enum machine_mode mode, HOST_WIDE_INT offse } static inline bool -offset_9bit_signed_unscaled_p (enum machine_mode mode ATTRIBUTE_UNUSED, +offset_9bit_signed_unscaled_p (machine_mode mode ATTRIBUTE_UNUSED, HOST_WIDE_INT offset) { return offset >= -256 && offset < 256; } static inline bool -offset_12bit_unsigned_scaled_p (enum machine_mode mode, HOST_WIDE_INT offset) +offset_12bit_unsigned_scaled_p (machine_mode mode, HOST_WIDE_INT offset) { return (offset >= 0 && offset < 4096 * GET_MODE_SIZE (mode) @@ -3202,7 +3202,7 @@ offset_12bit_unsigned_scaled_p (enum machine_mode mode, HOST_WIDE_INT offset) static bool aarch64_classify_address (struct aarch64_address_info *info, - rtx x, enum machine_mode mode, + rtx x, machine_mode mode, RTX_CODE outer_code, bool strict_p) { enum rtx_code code = GET_CODE (x); @@ -3423,7 +3423,7 @@ aarch64_classify_symbolic_expression (rtx x, /* Return TRUE if X is a legitimate address for accessing memory in mode MODE. */ static bool -aarch64_legitimate_address_hook_p (enum machine_mode mode, rtx x, bool strict_p) +aarch64_legitimate_address_hook_p (machine_mode mode, rtx x, bool strict_p) { struct aarch64_address_info addr; @@ -3434,7 +3434,7 @@ aarch64_legitimate_address_hook_p (enum machine_mode mode, rtx x, bool strict_p) mode MODE. OUTER_CODE will be PARALLEL if this is a load/store pair operation. */ bool -aarch64_legitimate_address_p (enum machine_mode mode, rtx x, +aarch64_legitimate_address_p (machine_mode mode, rtx x, RTX_CODE outer_code, bool strict_p) { struct aarch64_address_info addr; @@ -3479,7 +3479,7 @@ aarch64_emit_call_insn (rtx pat) clobber_reg (fusage, gen_rtx_REG (word_mode, IP1_REGNUM)); } -enum machine_mode +machine_mode aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y) { /* All floating point compares return CCFP if it is an equality @@ -3551,7 +3551,7 @@ aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y) int aarch64_get_condition_code (rtx x) { - enum machine_mode mode = GET_MODE (XEXP (x, 0)); + machine_mode mode = GET_MODE (XEXP (x, 0)); enum rtx_code comp_code = GET_CODE (x); if (GET_MODE_CLASS (mode) != MODE_CC) @@ -4199,7 +4199,7 @@ aarch64_regno_regclass (unsigned regno) } static rtx -aarch64_legitimize_address (rtx x, rtx /* orig_x */, enum machine_mode mode) +aarch64_legitimize_address (rtx x, rtx /* orig_x */, machine_mode mode) { /* Try to split X+CONST into Y=X+(CONST & ~mask), Y+(CONST&mask), where mask is selected by alignment and size of the offset. @@ -4244,7 +4244,7 @@ aarch64_legitimize_address (rtx x, rtx /* orig_x */, enum machine_mode mode) rtx aarch64_legitimize_reload_address (rtx *x_p, - enum machine_mode mode, + machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -4294,7 +4294,7 @@ aarch64_legitimize_reload_address (rtx *x_p, HOST_WIDE_INT high = val - low; HOST_WIDE_INT offs; rtx cst; - enum machine_mode xmode = GET_MODE (x); + machine_mode xmode = GET_MODE (x); /* In ILP32, xmode can be either DImode or SImode. */ gcc_assert (xmode == DImode || xmode == SImode); @@ -4356,7 +4356,7 @@ aarch64_legitimize_reload_address (rtx *x_p, static reg_class_t aarch64_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x, reg_class_t rclass, - enum machine_mode mode, + machine_mode mode, secondary_reload_info *sri) { /* Without the TARGET_SIMD instructions we cannot move a Q register @@ -4493,7 +4493,7 @@ aarch64_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) } static unsigned char -aarch64_class_max_nregs (reg_class_t regclass, enum machine_mode mode) +aarch64_class_max_nregs (reg_class_t regclass, machine_mode mode) { switch (regclass) { @@ -4670,7 +4670,7 @@ aarch64_uxt_size (int shift, HOST_WIDE_INT mask) } static bool -aarch64_use_blocks_for_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, +aarch64_use_blocks_for_constant_p (machine_mode mode ATTRIBUTE_UNUSED, const_rtx x ATTRIBUTE_UNUSED) { /* We can't use blocks for constants when we're using a per-function @@ -4679,7 +4679,7 @@ aarch64_use_blocks_for_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, } static section * -aarch64_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED, +aarch64_select_rtx_section (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED, unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED) { @@ -4773,7 +4773,7 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed) = aarch64_tune_params->insn_extra_cost; int cost = 0; bool maybe_fma = (outer == PLUS || outer == MINUS); - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); gcc_checking_assert (code == MULT); @@ -4871,7 +4871,7 @@ aarch64_rtx_mult_cost (rtx x, int code, int outer, bool speed) static int aarch64_address_cost (rtx x, - enum machine_mode mode, + machine_mode mode, addr_space_t as ATTRIBUTE_UNUSED, bool speed) { @@ -4967,7 +4967,7 @@ aarch64_address_cost (rtx x, /* Return true if the RTX X in mode MODE is a zero or sign extract usable in an ADD or SUB (extended register) instruction. */ static bool -aarch64_rtx_arith_op_extract_p (rtx x, enum machine_mode mode) +aarch64_rtx_arith_op_extract_p (rtx x, machine_mode mode) { /* Catch add with a sign extract. This is add_<optab><mode>_multp2. */ @@ -5095,7 +5095,7 @@ aarch64_rtx_costs (rtx x, int code, int outer ATTRIBUTE_UNUSED, rtx op0, op1, op2; const struct cpu_cost_table *extra_cost = aarch64_tune_params->insn_extra_cost; - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); /* By default, assume that everything has equivalent cost to the cheapest instruction. Any additional costs are applied as a delta @@ -6033,7 +6033,7 @@ aarch64_rtx_costs_wrapper (rtx x, int code, int outer, } static int -aarch64_register_move_cost (enum machine_mode mode, +aarch64_register_move_cost (machine_mode mode, reg_class_t from_i, reg_class_t to_i) { enum reg_class from = (enum reg_class) from_i; @@ -6090,7 +6090,7 @@ aarch64_register_move_cost (enum machine_mode mode, } static int -aarch64_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +aarch64_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -6658,7 +6658,7 @@ aarch64_legitimate_pic_operand_p (rtx x) /* Return true if X holds either a quarter-precision or floating-point +0.0 constant. */ static bool -aarch64_valid_floating_const (enum machine_mode mode, rtx x) +aarch64_valid_floating_const (machine_mode mode, rtx x) { if (!CONST_DOUBLE_P (x)) return false; @@ -6677,7 +6677,7 @@ aarch64_valid_floating_const (enum machine_mode mode, rtx x) } static bool -aarch64_legitimate_constant_p (enum machine_mode mode, rtx x) +aarch64_legitimate_constant_p (machine_mode mode, rtx x) { /* Do not allow vector struct mode constants. We could support 0 and -1 easily, but they need support in aarch64-simd.md. */ @@ -6879,9 +6879,9 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p, bool indirect_p; bool is_ha; /* is HFA or HVA. */ bool dw_align; /* double-word align. */ - enum machine_mode ag_mode = VOIDmode; + machine_mode ag_mode = VOIDmode; int nregs; - enum machine_mode mode; + machine_mode mode; tree f_stack, f_grtop, f_vrtop, f_groff, f_vroff; tree stack, f_top, f_off, off, arg, roundup, on_stack; @@ -7133,7 +7133,7 @@ aarch64_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p, /* Implement TARGET_SETUP_INCOMING_VARARGS. */ static void -aarch64_setup_incoming_varargs (cumulative_args_t cum_v, enum machine_mode mode, +aarch64_setup_incoming_varargs (cumulative_args_t cum_v, machine_mode mode, tree type, int *pretend_size ATTRIBUTE_UNUSED, int no_rtl) { @@ -7178,7 +7178,7 @@ aarch64_setup_incoming_varargs (cumulative_args_t cum_v, enum machine_mode mode, { /* We can't use move_block_from_reg, because it will use the wrong mode, storing D regs only. */ - enum machine_mode mode = TImode; + machine_mode mode = TImode; int off, i; /* Set OFF to the offset from virtual_incoming_args_rtx of @@ -7229,9 +7229,9 @@ aarch64_conditional_register_usage (void) type that doesn't match a non-VOIDmode *MODEP is found, then return -1, otherwise return the count in the sub-tree. */ static int -aapcs_vfp_sub_candidate (const_tree type, enum machine_mode *modep) +aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep) { - enum machine_mode mode; + machine_mode mode; HOST_WIDE_INT size; switch (TREE_CODE (type)) @@ -7415,7 +7415,7 @@ aarch64_lra_p (void) static bool aarch64_composite_type_p (const_tree type, - enum machine_mode mode) + machine_mode mode) { if (type && (AGGREGATE_TYPE_P (type) || TREE_CODE (type) == COMPLEX_TYPE)) return true; @@ -7435,7 +7435,7 @@ aarch64_composite_type_p (const_tree type, static bool aarch64_short_vector_p (const_tree type, - enum machine_mode mode) + machine_mode mode) { HOST_WIDE_INT size = -1; @@ -7459,13 +7459,13 @@ aarch64_short_vector_p (const_tree type, floating-point aggregate or a homogeneous short-vector aggregate. */ static bool -aarch64_vfp_is_call_or_return_candidate (enum machine_mode mode, +aarch64_vfp_is_call_or_return_candidate (machine_mode mode, const_tree type, - enum machine_mode *base_mode, + machine_mode *base_mode, int *count, bool *is_ha) { - enum machine_mode new_mode = VOIDmode; + machine_mode new_mode = VOIDmode; bool composite_p = aarch64_composite_type_p (type, mode); if (is_ha != NULL) *is_ha = false; @@ -7512,7 +7512,7 @@ aarch64_struct_value_rtx (tree fndecl ATTRIBUTE_UNUSED, /* Implements target hook vector_mode_supported_p. */ static bool -aarch64_vector_mode_supported_p (enum machine_mode mode) +aarch64_vector_mode_supported_p (machine_mode mode) { if (TARGET_SIMD && (mode == V4SImode || mode == V8HImode @@ -7528,8 +7528,8 @@ aarch64_vector_mode_supported_p (enum machine_mode mode) /* Return appropriate SIMD container for MODE within a vector of WIDTH bits. */ -static enum machine_mode -aarch64_simd_container_mode (enum machine_mode mode, unsigned width) +static machine_mode +aarch64_simd_container_mode (machine_mode mode, unsigned width) { gcc_assert (width == 64 || width == 128); if (TARGET_SIMD) @@ -7571,8 +7571,8 @@ aarch64_simd_container_mode (enum machine_mode mode, unsigned width) } /* Return 128-bit container as the preferred SIMD mode for MODE. */ -static enum machine_mode -aarch64_preferred_simd_mode (enum machine_mode mode) +static machine_mode +aarch64_preferred_simd_mode (machine_mode mode) { return aarch64_simd_container_mode (mode, 128); } @@ -7597,7 +7597,7 @@ aarch64_autovectorize_vector_sizes (void) mangled names. */ typedef struct { - enum machine_mode mode; + machine_mode mode; const char *element_type_name; const char *mangled_name; } aarch64_simd_mangle_map_entry; @@ -7848,7 +7848,7 @@ aarch64_vect_float_const_representable_p (rtx x) /* Return true for valid and false for invalid. */ bool -aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, bool inverse, +aarch64_simd_valid_immediate (rtx op, machine_mode mode, bool inverse, struct simd_immediate_info *info) { #define CHECK(STRIDE, ELSIZE, CLASS, TEST, SHIFT, NEG) \ @@ -8031,7 +8031,7 @@ aarch64_simd_valid_immediate (rtx op, enum machine_mode mode, bool inverse, /* Check of immediate shift constants are within range. */ bool -aarch64_simd_shift_imm_p (rtx x, enum machine_mode mode, bool left) +aarch64_simd_shift_imm_p (rtx x, machine_mode mode, bool left) { int bit_width = GET_MODE_UNIT_SIZE (mode) * BITS_PER_UNIT; if (left) @@ -8044,13 +8044,13 @@ aarch64_simd_shift_imm_p (rtx x, enum machine_mode mode, bool left) are either the floating-point constant 0.0 or the integer constant 0. */ bool -aarch64_simd_imm_zero_p (rtx x, enum machine_mode mode) +aarch64_simd_imm_zero_p (rtx x, machine_mode mode) { return x == CONST0_RTX (mode); } bool -aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED) +aarch64_simd_imm_scalar_p (rtx x, machine_mode mode ATTRIBUTE_UNUSED) { HOST_WIDE_INT imm = INTVAL (x); int i; @@ -8069,7 +8069,7 @@ aarch64_simd_imm_scalar_p (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED) bool aarch64_mov_operand_p (rtx x, enum aarch64_symbol_context context, - enum machine_mode mode) + machine_mode mode) { if (GET_CODE (x) == HIGH && aarch64_valid_symref (XEXP (x, 0), GET_MODE (XEXP (x, 0)))) @@ -8087,7 +8087,7 @@ aarch64_mov_operand_p (rtx x, /* Return a const_int vector of VAL. */ rtx -aarch64_simd_gen_const_vector_dup (enum machine_mode mode, int val) +aarch64_simd_gen_const_vector_dup (machine_mode mode, int val) { int nunits = GET_MODE_NUNITS (mode); rtvec v = rtvec_alloc (nunits); @@ -8102,9 +8102,9 @@ aarch64_simd_gen_const_vector_dup (enum machine_mode mode, int val) /* Check OP is a legal scalar immediate for the MOVI instruction. */ bool -aarch64_simd_scalar_immediate_valid_for_move (rtx op, enum machine_mode mode) +aarch64_simd_scalar_immediate_valid_for_move (rtx op, machine_mode mode) { - enum machine_mode vmode; + machine_mode vmode; gcc_assert (!VECTOR_MODE_P (mode)); vmode = aarch64_preferred_simd_mode (mode); @@ -8133,7 +8133,7 @@ High Mask: { 0, 1 } { 2, 3 } */ rtx -aarch64_simd_vect_par_cnst_half (enum machine_mode mode, bool high) +aarch64_simd_vect_par_cnst_half (machine_mode mode, bool high) { int nunits = GET_MODE_NUNITS (mode); rtvec v = rtvec_alloc (nunits / 2); @@ -8161,7 +8161,7 @@ aarch64_simd_vect_par_cnst_half (enum machine_mode mode, bool high) aarch64_simd_vect_par_cnst_half for more details. */ bool -aarch64_simd_check_vect_par_cnst_half (rtx op, enum machine_mode mode, +aarch64_simd_check_vect_par_cnst_half (rtx op, machine_mode mode, bool high) { rtx ideal = aarch64_simd_vect_par_cnst_half (mode, high); @@ -8203,7 +8203,7 @@ aarch64_simd_lane_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high) /* Emit code to place a AdvSIMD pair result in memory locations (with equal registers). */ void -aarch64_simd_emit_pair_result_insn (enum machine_mode mode, +aarch64_simd_emit_pair_result_insn (machine_mode mode, rtx (*intfn) (rtx, rtx, rtx), rtx destaddr, rtx op1) { @@ -8262,7 +8262,7 @@ aarch64_simd_disambiguate_copy (rtx *operands, rtx *dest, int aarch64_simd_attr_length_move (rtx_insn *insn) { - enum machine_mode mode; + machine_mode mode; extract_insn_cached (insn); @@ -8315,8 +8315,8 @@ aarch64_simd_vector_alignment_reachable (const_tree type, bool is_packed) static rtx aarch64_simd_dup_constant (rtx vals) { - enum machine_mode mode = GET_MODE (vals); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (vals); + machine_mode inner_mode = GET_MODE_INNER (mode); int n_elts = GET_MODE_NUNITS (mode); bool all_same = true; rtx x; @@ -8350,7 +8350,7 @@ aarch64_simd_dup_constant (rtx vals) static rtx aarch64_simd_make_constant (rtx vals) { - enum machine_mode mode = GET_MODE (vals); + machine_mode mode = GET_MODE (vals); rtx const_dup; rtx const_vec = NULL_RTX; int n_elts = GET_MODE_NUNITS (mode); @@ -8396,8 +8396,8 @@ aarch64_simd_make_constant (rtx vals) void aarch64_expand_vector_init (rtx target, rtx vals) { - enum machine_mode mode = GET_MODE (target); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (target); + machine_mode inner_mode = GET_MODE_INNER (mode); int n_elts = GET_MODE_NUNITS (mode); int n_var = 0, one_var = -1; bool all_same = true; @@ -8469,7 +8469,7 @@ aarch64_expand_vector_init (rtx target, rtx vals) } static unsigned HOST_WIDE_INT -aarch64_shift_truncation_mask (enum machine_mode mode) +aarch64_shift_truncation_mask (machine_mode mode) { return (aarch64_vector_mode_supported_p (mode) @@ -8576,7 +8576,7 @@ aarch64_asm_preferred_eh_data_format (int code ATTRIBUTE_UNUSED, int global) /* Emit load exclusive. */ static void -aarch64_emit_load_exclusive (enum machine_mode mode, rtx rval, +aarch64_emit_load_exclusive (machine_mode mode, rtx rval, rtx mem, rtx model_rtx) { rtx (*gen) (rtx, rtx, rtx); @@ -8597,7 +8597,7 @@ aarch64_emit_load_exclusive (enum machine_mode mode, rtx rval, /* Emit store exclusive. */ static void -aarch64_emit_store_exclusive (enum machine_mode mode, rtx bval, +aarch64_emit_store_exclusive (machine_mode mode, rtx bval, rtx rval, rtx mem, rtx model_rtx) { rtx (*gen) (rtx, rtx, rtx, rtx); @@ -8632,7 +8632,7 @@ void aarch64_expand_compare_and_swap (rtx operands[]) { rtx bval, rval, mem, oldval, newval, is_weak, mod_s, mod_f, x; - enum machine_mode mode, cmp_mode; + machine_mode mode, cmp_mode; rtx (*gen) (rtx, rtx, rtx, rtx, rtx, rtx, rtx); bval = operands[0]; @@ -8702,7 +8702,7 @@ void aarch64_split_compare_and_swap (rtx operands[]) { rtx rval, mem, oldval, newval, scratch; - enum machine_mode mode; + machine_mode mode; bool is_weak; rtx_code_label *label1, *label2; rtx x, cond; @@ -8756,8 +8756,8 @@ void aarch64_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem, rtx value, rtx model_rtx, rtx cond) { - enum machine_mode mode = GET_MODE (mem); - enum machine_mode wmode = (mode == DImode ? DImode : SImode); + machine_mode mode = GET_MODE (mem); + machine_mode wmode = (mode == DImode ? DImode : SImode); rtx_code_label *label; rtx x; @@ -8841,7 +8841,7 @@ aarch64_start_file (void) } /* Target hook for c_mode_for_suffix. */ -static enum machine_mode +static machine_mode aarch64_c_mode_for_suffix (char suffix) { if (suffix == 'q') @@ -8943,7 +8943,7 @@ aarch64_float_const_representable_p (rtx x) char* aarch64_output_simd_mov_immediate (rtx const_vector, - enum machine_mode mode, + machine_mode mode, unsigned width) { bool is_valid; @@ -9006,9 +9006,9 @@ aarch64_output_simd_mov_immediate (rtx const_vector, char* aarch64_output_scalar_simd_mov_immediate (rtx immediate, - enum machine_mode mode) + machine_mode mode) { - enum machine_mode vmode; + machine_mode vmode; gcc_assert (!VECTOR_MODE_P (mode)); vmode = aarch64_simd_container_mode (mode, 64); @@ -9024,7 +9024,7 @@ aarch64_split_combinev16qi (rtx operands[3]) unsigned int dest = REGNO (operands[0]); unsigned int src1 = REGNO (operands[1]); unsigned int src2 = REGNO (operands[2]); - enum machine_mode halfmode = GET_MODE (operands[1]); + machine_mode halfmode = GET_MODE (operands[1]); unsigned int halfregs = HARD_REGNO_NREGS (src1, halfmode); rtx destlo, desthi; @@ -9076,7 +9076,7 @@ struct expand_vec_perm_d { rtx target, op0, op1; unsigned char perm[MAX_VECT_LEN]; - enum machine_mode vmode; + machine_mode vmode; unsigned char nelt; bool one_vector_p; bool testing_p; @@ -9087,7 +9087,7 @@ struct expand_vec_perm_d static void aarch64_expand_vec_perm_1 (rtx target, rtx op0, rtx op1, rtx sel) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); bool one_vector_p = rtx_equal_p (op0, op1); gcc_checking_assert (vmode == V8QImode || vmode == V16QImode); @@ -9132,7 +9132,7 @@ aarch64_expand_vec_perm_1 (rtx target, rtx op0, rtx op1, rtx sel) void aarch64_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); unsigned int nelt = GET_MODE_NUNITS (vmode); bool one_vector_p = rtx_equal_p (op0, op1); rtx mask; @@ -9163,7 +9163,7 @@ aarch64_evpc_trn (struct expand_vec_perm_d *d) unsigned int i, odd, mask, nelt = d->nelt; rtx out, in0, in1, x; rtx (*gen) (rtx, rtx, rtx); - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; if (GET_MODE_UNIT_SIZE (vmode) > 8) return false; @@ -9247,7 +9247,7 @@ aarch64_evpc_uzp (struct expand_vec_perm_d *d) unsigned int i, odd, mask, nelt = d->nelt; rtx out, in0, in1, x; rtx (*gen) (rtx, rtx, rtx); - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; if (GET_MODE_UNIT_SIZE (vmode) > 8) return false; @@ -9330,7 +9330,7 @@ aarch64_evpc_zip (struct expand_vec_perm_d *d) unsigned int i, high, mask, nelt = d->nelt; rtx out, in0, in1, x; rtx (*gen) (rtx, rtx, rtx); - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; if (GET_MODE_UNIT_SIZE (vmode) > 8) return false; @@ -9555,7 +9555,7 @@ aarch64_evpc_dup (struct expand_vec_perm_d *d) rtx (*gen) (rtx, rtx, rtx); rtx out = d->target; rtx in0; - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; unsigned int i, elt, nelt = d->nelt; rtx lane; @@ -9598,7 +9598,7 @@ static bool aarch64_evpc_tbl (struct expand_vec_perm_d *d) { rtx rperm[MAX_VECT_LEN], sel; - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; unsigned int i, nelt = d->nelt; if (d->testing_p) @@ -9723,7 +9723,7 @@ aarch64_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel) } static bool -aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode, +aarch64_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel) { struct expand_vec_perm_d d; @@ -9766,8 +9766,8 @@ aarch64_vectorize_vec_perm_const_ok (enum machine_mode vmode, /* Implement target hook CANNOT_CHANGE_MODE_CLASS. */ bool -aarch64_cannot_change_mode_class (enum machine_mode from, - enum machine_mode to, +aarch64_cannot_change_mode_class (machine_mode from, + machine_mode to, enum reg_class rclass) { /* Full-reg subregs are allowed on general regs or any class if they are @@ -9815,7 +9815,7 @@ aarch64_cannot_change_mode_class (enum machine_mode from, /* Implement MODES_TIEABLE_P. */ bool -aarch64_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) +aarch64_modes_tieable_p (machine_mode mode1, machine_mode mode2) { if (GET_MODE_CLASS (mode1) == GET_MODE_CLASS (mode2)) return true; @@ -9859,7 +9859,7 @@ aarch64_progress_pointer (rtx pointer) static void aarch64_copy_one_block_and_progress_pointers (rtx *src, rtx *dst, - enum machine_mode mode) + machine_mode mode) { rtx reg = gen_reg_rtx (mode); diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h index 749c19d..5fca078 100644 --- a/gcc/config/aarch64/aarch64.h +++ b/gcc/config/aarch64/aarch64.h @@ -604,14 +604,14 @@ enum arm_pcs -/* We can't use enum machine_mode inside a generator file because it +/* We can't use machine_mode inside a generator file because it hasn't been created yet; we shouldn't be using any code that needs the real definition though, so this ought to be safe. */ #ifdef GENERATOR_FILE #define MACHMODE int #else #include "insn-modes.h" -#define MACHMODE enum machine_mode +#define MACHMODE machine_mode #endif diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 341c26f..17570ba 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -3831,7 +3831,7 @@ (match_operand 2 "aarch64_valid_symref" "S")))] "" { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); emit_insn ((mode == DImode ? gen_add_losym_di @@ -3942,7 +3942,7 @@ UNSPEC_GOTSMALLTLS))] "" { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); emit_insn ((mode == DImode ? gen_tlsle_small_di : gen_tlsle_small_si) (operands[0], @@ -4001,7 +4001,7 @@ (match_operand 1 "memory_operand")] "" { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); emit_insn ((mode == DImode ? gen_stack_protect_set_di @@ -4026,7 +4026,7 @@ "" { rtx result; - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); result = gen_reg_rtx(mode); diff --git a/gcc/config/alpha/alpha-protos.h b/gcc/config/alpha/alpha-protos.h index 304a668..8ce9c29 100644 --- a/gcc/config/alpha/alpha-protos.h +++ b/gcc/config/alpha/alpha-protos.h @@ -30,8 +30,8 @@ extern void alpha_expand_prologue (void); extern void alpha_expand_epilogue (void); extern void alpha_output_filename (FILE *, const char *); -extern bool alpha_legitimate_constant_p (enum machine_mode, rtx); -extern rtx alpha_legitimize_reload_address (rtx, enum machine_mode, +extern bool alpha_legitimate_constant_p (machine_mode, rtx); +extern rtx alpha_legitimize_reload_address (rtx, machine_mode, int, int, int); extern rtx split_small_symbolic_operand (rtx); @@ -42,13 +42,13 @@ extern rtx get_unaligned_offset (rtx, HOST_WIDE_INT); extern enum reg_class alpha_preferred_reload_class (rtx, enum reg_class); extern void alpha_set_memflags (rtx, rtx); -extern bool alpha_split_const_mov (enum machine_mode, rtx *); -extern bool alpha_expand_mov (enum machine_mode, rtx *); -extern bool alpha_expand_mov_nobwx (enum machine_mode, rtx *); -extern void alpha_expand_movmisalign (enum machine_mode, rtx *); +extern bool alpha_split_const_mov (machine_mode, rtx *); +extern bool alpha_expand_mov (machine_mode, rtx *); +extern bool alpha_expand_mov_nobwx (machine_mode, rtx *); +extern void alpha_expand_movmisalign (machine_mode, rtx *); extern void alpha_emit_floatuns (rtx[]); -extern rtx alpha_emit_conditional_move (rtx, enum machine_mode); -extern void alpha_split_tmode_pair (rtx[], enum machine_mode, bool); +extern rtx alpha_emit_conditional_move (rtx, machine_mode); +extern void alpha_split_tmode_pair (rtx[], machine_mode, bool); extern void alpha_split_tfmode_frobsign (rtx[], rtx (*)(rtx, rtx, rtx)); extern void alpha_expand_unaligned_load (rtx, rtx, HOST_WIDE_INT, HOST_WIDE_INT, int); @@ -58,7 +58,7 @@ extern int alpha_expand_block_move (rtx []); extern int alpha_expand_block_clear (rtx []); extern rtx alpha_expand_zap_mask (HOST_WIDE_INT); extern void alpha_expand_builtin_vector_binop (rtx (*)(rtx, rtx, rtx), - enum machine_mode, + machine_mode, rtx, rtx, rtx); extern void alpha_expand_builtin_establish_vms_condition_handler (rtx, rtx); extern void alpha_expand_builtin_revert_vms_condition_handler (rtx); @@ -70,7 +70,7 @@ extern void print_operand_address (FILE *, rtx); extern void alpha_initialize_trampoline (rtx, rtx, rtx, int, int, int); extern rtx alpha_va_arg (tree, tree); -extern rtx function_value (const_tree, const_tree, enum machine_mode); +extern rtx function_value (const_tree, const_tree, machine_mode); extern void alpha_start_function (FILE *, const char *, tree); extern void alpha_end_function (FILE *, const char *, tree); @@ -78,12 +78,12 @@ extern void alpha_end_function (FILE *, const char *, tree); extern bool alpha_find_lo_sum_using_gp (rtx); #ifdef REAL_VALUE_TYPE -extern int check_float_value (enum machine_mode, REAL_VALUE_TYPE *, int); +extern int check_float_value (machine_mode, REAL_VALUE_TYPE *, int); #endif #ifdef RTX_CODE -extern void alpha_emit_conditional_branch (rtx[], enum machine_mode); -extern bool alpha_emit_setcc (rtx[], enum machine_mode); +extern void alpha_emit_conditional_branch (rtx[], machine_mode); +extern bool alpha_emit_setcc (rtx[], machine_mode); extern int alpha_split_conditional_move (enum rtx_code, rtx, rtx, rtx, rtx); extern void alpha_emit_xfloating_arith (enum rtx_code, rtx[]); extern void alpha_emit_xfloating_cvt (enum rtx_code, rtx[]); @@ -100,7 +100,7 @@ extern void alpha_split_atomic_exchange_12 (rtx op[]); extern rtx alpha_use_linkage (rtx, bool, bool); #if TARGET_ABI_OPEN_VMS -extern enum avms_arg_type alpha_arg_type (enum machine_mode); +extern enum avms_arg_type alpha_arg_type (machine_mode); extern rtx alpha_arg_info_reg_val (CUMULATIVE_ARGS); extern void avms_asm_output_external (FILE *, tree, const char *); extern void vms_output_aligned_decl_common (FILE *, tree, const char *, diff --git a/gcc/config/alpha/alpha.c b/gcc/config/alpha/alpha.c index ba8b249..0c71965 100644 --- a/gcc/config/alpha/alpha.c +++ b/gcc/config/alpha/alpha.c @@ -229,7 +229,7 @@ static void alpha_align_insns (void); #if TARGET_ABI_OPEN_VMS static void alpha_write_linkage (FILE *, const char *); -static bool vms_valid_pointer_mode (enum machine_mode); +static bool vms_valid_pointer_mode (machine_mode); #else #define vms_patch_builtins() gcc_unreachable() #endif @@ -718,7 +718,7 @@ resolve_reload_operand (rtx op) indicates only DFmode. */ static bool -alpha_scalar_mode_supported_p (enum machine_mode mode) +alpha_scalar_mode_supported_p (machine_mode mode) { switch (mode) { @@ -747,7 +747,7 @@ alpha_scalar_mode_supported_p (enum machine_mode mode) or when expand_vector_operations can do something useful. */ static bool -alpha_vector_mode_supported_p (enum machine_mode mode) +alpha_vector_mode_supported_p (machine_mode mode) { return mode == V8QImode || mode == V4HImode || mode == V2SImode; } @@ -842,7 +842,7 @@ alpha_in_small_data_p (const_tree exp) #if TARGET_ABI_OPEN_VMS static bool -vms_valid_pointer_mode (enum machine_mode mode) +vms_valid_pointer_mode (machine_mode mode) { return (mode == SImode || mode == DImode); } @@ -877,7 +877,7 @@ alpha_linkage_symbol_p (const char *symname) low-order three bits; this is an "unaligned" access. */ static bool -alpha_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +alpha_legitimate_address_p (machine_mode mode, rtx x, bool strict) { /* If this is an ldq_u type address, discard the outer AND. */ if (mode == DImode @@ -988,7 +988,7 @@ get_tls_get_addr (void) to be legitimate. If we find one, return the new, valid address. */ static rtx -alpha_legitimize_address_1 (rtx x, rtx scratch, enum machine_mode mode) +alpha_legitimize_address_1 (rtx x, rtx scratch, machine_mode mode) { HOST_WIDE_INT addend; @@ -1188,7 +1188,7 @@ alpha_legitimize_address_1 (rtx x, rtx scratch, enum machine_mode mode) static rtx alpha_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { rtx new_x = alpha_legitimize_address_1 (x, NULL_RTX, mode); return new_x ? new_x : x; @@ -1210,7 +1210,7 @@ alpha_mode_dependent_address_p (const_rtx addr, should never be spilling symbolic operands to the constant pool, ever. */ static bool -alpha_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +alpha_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { enum rtx_code code = GET_CODE (x); return code == SYMBOL_REF || code == LABEL_REF || code == CONST; @@ -1301,7 +1301,7 @@ alpha_cannot_copy_insn_p (rtx_insn *insn) rtx alpha_legitimize_reload_address (rtx x, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -1360,7 +1360,7 @@ static bool alpha_rtx_costs (rtx x, int code, int outer_code, int opno, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); bool float_mode_p = FLOAT_MODE_P (mode); const struct alpha_rtx_cost_data *cost_data; @@ -1645,7 +1645,7 @@ alpha_preferred_reload_class(rtx x, enum reg_class rclass) static reg_class_t alpha_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { enum reg_class rclass = (enum reg_class) rclass_i; @@ -1725,7 +1725,7 @@ alpha_set_memflags (rtx seq, rtx ref) gcc_unreachable (); } -static rtx alpha_emit_set_const (rtx, enum machine_mode, HOST_WIDE_INT, +static rtx alpha_emit_set_const (rtx, machine_mode, HOST_WIDE_INT, int, bool); /* Internal routine for alpha_emit_set_const to check for N or below insns. @@ -1733,7 +1733,7 @@ static rtx alpha_emit_set_const (rtx, enum machine_mode, HOST_WIDE_INT, and return pc_rtx if successful. */ static rtx -alpha_emit_set_const_1 (rtx target, enum machine_mode mode, +alpha_emit_set_const_1 (rtx target, machine_mode mode, HOST_WIDE_INT c, int n, bool no_output) { HOST_WIDE_INT new_const; @@ -1981,10 +1981,10 @@ alpha_emit_set_const_1 (rtx target, enum machine_mode mode, insns and emitted. */ static rtx -alpha_emit_set_const (rtx target, enum machine_mode mode, +alpha_emit_set_const (rtx target, machine_mode mode, HOST_WIDE_INT c, int n, bool no_output) { - enum machine_mode orig_mode = mode; + machine_mode orig_mode = mode; rtx orig_target = target; rtx result = 0; int i; @@ -2132,7 +2132,7 @@ alpha_extract_integer (rtx x, HOST_WIDE_INT *p0, HOST_WIDE_INT *p1) take three or fewer instructions, and floating-point zero. */ bool -alpha_legitimate_constant_p (enum machine_mode mode, rtx x) +alpha_legitimate_constant_p (machine_mode mode, rtx x) { HOST_WIDE_INT i0, i1; @@ -2192,7 +2192,7 @@ alpha_legitimate_constant_p (enum machine_mode mode, rtx x) instruction to load. Emit that multi-part load. */ bool -alpha_split_const_mov (enum machine_mode mode, rtx *operands) +alpha_split_const_mov (machine_mode mode, rtx *operands) { HOST_WIDE_INT i0, i1; rtx temp = NULL_RTX; @@ -2219,7 +2219,7 @@ alpha_split_const_mov (enum machine_mode mode, rtx *operands) We don't handle non-bwx subword loads here. */ bool -alpha_expand_mov (enum machine_mode mode, rtx *operands) +alpha_expand_mov (machine_mode mode, rtx *operands) { rtx tmp; @@ -2274,7 +2274,7 @@ alpha_expand_mov (enum machine_mode mode, rtx *operands) return true if all work is done. */ bool -alpha_expand_mov_nobwx (enum machine_mode mode, rtx *operands) +alpha_expand_mov_nobwx (machine_mode mode, rtx *operands) { rtx seq; @@ -2396,7 +2396,7 @@ alpha_expand_mov_nobwx (enum machine_mode mode, rtx *operands) that is not naturally aligned. Emit instructions to load it. */ void -alpha_expand_movmisalign (enum machine_mode mode, rtx *operands) +alpha_expand_movmisalign (machine_mode mode, rtx *operands) { /* Honor misaligned loads, for those we promised to do so. */ if (MEM_P (operands[1])) @@ -2476,7 +2476,7 @@ void alpha_emit_floatuns (rtx operands[2]) { rtx neglab, donelab, i0, i1, f0, in, out; - enum machine_mode mode; + machine_mode mode; out = operands[0]; in = force_reg (DImode, operands[1]); @@ -2507,10 +2507,10 @@ alpha_emit_floatuns (rtx operands[2]) /* Generate the comparison for a conditional branch. */ void -alpha_emit_conditional_branch (rtx operands[], enum machine_mode cmp_mode) +alpha_emit_conditional_branch (rtx operands[], machine_mode cmp_mode) { enum rtx_code cmp_code, branch_code; - enum machine_mode branch_mode = VOIDmode; + machine_mode branch_mode = VOIDmode; enum rtx_code code = GET_CODE (operands[0]); rtx op0 = operands[1], op1 = operands[2]; rtx tem; @@ -2640,7 +2640,7 @@ alpha_emit_conditional_branch (rtx operands[], enum machine_mode cmp_mode) valid. Return the final comparison, or NULL if we can't work. */ bool -alpha_emit_setcc (rtx operands[], enum machine_mode cmp_mode) +alpha_emit_setcc (rtx operands[], machine_mode cmp_mode) { enum rtx_code cmp_code; enum rtx_code code = GET_CODE (operands[1]); @@ -2729,15 +2729,15 @@ alpha_emit_setcc (rtx operands[], enum machine_mode cmp_mode) the conditional move). */ rtx -alpha_emit_conditional_move (rtx cmp, enum machine_mode mode) +alpha_emit_conditional_move (rtx cmp, machine_mode mode) { enum rtx_code code = GET_CODE (cmp); enum rtx_code cmov_code = NE; rtx op0 = XEXP (cmp, 0); rtx op1 = XEXP (cmp, 1); - enum machine_mode cmp_mode + machine_mode cmp_mode = (GET_MODE (op0) == VOIDmode ? DImode : GET_MODE (op0)); - enum machine_mode cmov_mode = VOIDmode; + machine_mode cmov_mode = VOIDmode; int local_fast_math = flag_unsafe_math_optimizations; rtx tem; @@ -2892,7 +2892,7 @@ alpha_split_conditional_move (enum rtx_code code, rtx dest, rtx cond, rtx t_rtx, rtx f_rtx) { HOST_WIDE_INT t, f, diff; - enum machine_mode mode; + machine_mode mode; rtx target, subtarget, tmp; mode = GET_MODE (dest); @@ -3274,7 +3274,7 @@ alpha_emit_xfloating_cvt (enum rtx_code orig_code, rtx operands[]) This is used by *movtf_internal and *movti_internal. */ void -alpha_split_tmode_pair (rtx operands[4], enum machine_mode mode, +alpha_split_tmode_pair (rtx operands[4], machine_mode mode, bool fixup_overlap) { switch (GET_CODE (operands[1])) @@ -3399,7 +3399,7 @@ alpha_expand_unaligned_load (rtx tgt, rtx mem, HOST_WIDE_INT size, HOST_WIDE_INT ofs, int sign) { rtx meml, memh, addr, extl, exth, tmp, mema; - enum machine_mode mode; + machine_mode mode; if (TARGET_BWX && size == 2) { @@ -4082,7 +4082,7 @@ alpha_expand_block_clear (rtx operands[]) && align >= 32 && !(alignofs == 4 && bytes >= 4)) { - enum machine_mode mode = (align >= 64 ? DImode : SImode); + machine_mode mode = (align >= 64 ? DImode : SImode); int inv_alignofs = (align >= 64 ? 8 : 4) - alignofs; rtx mem, tmp; HOST_WIDE_INT mask; @@ -4353,7 +4353,7 @@ alpha_expand_zap_mask (HOST_WIDE_INT value) void alpha_expand_builtin_vector_binop (rtx (*gen) (rtx, rtx, rtx), - enum machine_mode mode, + machine_mode mode, rtx op0, rtx op1, rtx op2) { op0 = gen_lowpart (mode, op0); @@ -4389,7 +4389,7 @@ emit_unlikely_jump (rtx cond, rtx label) instruction in MODE. */ static void -emit_load_locked (enum machine_mode mode, rtx reg, rtx mem) +emit_load_locked (machine_mode mode, rtx reg, rtx mem) { rtx (*fn) (rtx, rtx) = NULL; if (mode == SImode) @@ -4403,7 +4403,7 @@ emit_load_locked (enum machine_mode mode, rtx reg, rtx mem) instruction in MODE. */ static void -emit_store_conditional (enum machine_mode mode, rtx res, rtx mem, rtx val) +emit_store_conditional (machine_mode mode, rtx res, rtx mem, rtx val) { rtx (*fn) (rtx, rtx, rtx) = NULL; if (mode == SImode) @@ -4434,7 +4434,7 @@ alpha_post_atomic_barrier (enum memmodel model) instruction in MODE. */ static rtx -emit_insxl (enum machine_mode mode, rtx op1, rtx op2) +emit_insxl (machine_mode mode, rtx op1, rtx op2) { rtx ret = gen_reg_rtx (DImode); rtx (*fn) (rtx, rtx, rtx); @@ -4473,7 +4473,7 @@ void alpha_split_atomic_op (enum rtx_code code, rtx mem, rtx val, rtx before, rtx after, rtx scratch, enum memmodel model) { - enum machine_mode mode = GET_MODE (mem); + machine_mode mode = GET_MODE (mem); rtx label, x, cond = gen_rtx_REG (DImode, REGNO (scratch)); alpha_pre_atomic_barrier (model); @@ -4515,7 +4515,7 @@ alpha_split_compare_and_swap (rtx operands[]) rtx cond, retval, mem, oldval, newval; bool is_weak; enum memmodel mod_s, mod_f; - enum machine_mode mode; + machine_mode mode; rtx label1, label2, x; cond = operands[0]; @@ -4576,7 +4576,7 @@ void alpha_expand_compare_and_swap_12 (rtx operands[]) { rtx cond, dst, mem, oldval, newval, is_weak, mod_s, mod_f; - enum machine_mode mode; + machine_mode mode; rtx addr, align, wdst; rtx (*gen) (rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx, rtx); @@ -4617,7 +4617,7 @@ void alpha_split_compare_and_swap_12 (rtx operands[]) { rtx cond, dest, orig_mem, oldval, newval, align, scratch; - enum machine_mode mode; + machine_mode mode; bool is_weak; enum memmodel mod_s, mod_f; rtx label1, label2, mem, addr, width, mask, x; @@ -4698,7 +4698,7 @@ alpha_split_atomic_exchange (rtx operands[]) { rtx retval, mem, val, scratch; enum memmodel model; - enum machine_mode mode; + machine_mode mode; rtx label, x, cond; retval = operands[0]; @@ -4728,7 +4728,7 @@ void alpha_expand_atomic_exchange_12 (rtx operands[]) { rtx dst, mem, val, model; - enum machine_mode mode; + machine_mode mode; rtx addr, align, wdst; rtx (*gen) (rtx, rtx, rtx, rtx, rtx); @@ -4764,7 +4764,7 @@ alpha_split_atomic_exchange_12 (rtx operands[]) { rtx dest, orig_mem, addr, val, align, scratch; rtx label, mem, width, mask, x; - enum machine_mode mode; + machine_mode mode; enum memmodel model; dest = operands[0]; @@ -5662,7 +5662,7 @@ alpha_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) and the rest are pushed. */ static rtx -alpha_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +alpha_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -5724,7 +5724,7 @@ alpha_function_arg (cumulative_args_t cum_v, enum machine_mode mode, (TYPE is null for libcalls where that information may not be available.) */ static void -alpha_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +alpha_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -5742,7 +5742,7 @@ alpha_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, static int alpha_arg_partial_bytes (cumulative_args_t cum_v, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -5769,7 +5769,7 @@ alpha_arg_partial_bytes (cumulative_args_t cum_v, static bool alpha_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) { - enum machine_mode mode = VOIDmode; + machine_mode mode = VOIDmode; int size; if (type) @@ -5823,7 +5823,7 @@ alpha_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) static bool alpha_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -5840,7 +5840,7 @@ alpha_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, rtx function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { unsigned int regnum, dummy ATTRIBUTE_UNUSED; enum mode_class mclass; @@ -5871,7 +5871,7 @@ function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, case MODE_COMPLEX_FLOAT: { - enum machine_mode cmode = GET_MODE_INNER (mode); + machine_mode cmode = GET_MODE_INNER (mode); return gen_rtx_PARALLEL (VOIDmode, @@ -6160,7 +6160,7 @@ escapes: variable number of arguments. */ static void -alpha_setup_incoming_varargs (cumulative_args_t pcum, enum machine_mode mode, +alpha_setup_incoming_varargs (cumulative_args_t pcum, machine_mode mode, tree type, int *pretend_size, int no_rtl) { CUMULATIVE_ARGS cum = *get_cumulative_args (pcum); @@ -6683,7 +6683,7 @@ alpha_init_builtins (void) static rtx alpha_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { #define MAX_ARGS 2 @@ -6726,7 +6726,7 @@ alpha_expand_builtin (tree exp, rtx target, if (nonvoid) { - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; if (!target || GET_MODE (target) != tmode || !(*insn_data[icode].operand[0].predicate) (target, tmode)) @@ -9551,7 +9551,7 @@ alpha_elf_reloc_rw_mask (void) honor small data. */ static section * -alpha_elf_select_rtx_section (enum machine_mode mode, rtx x, +alpha_elf_select_rtx_section (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align) { if (TARGET_SMALL_DATA && GET_MODE_SIZE (mode) <= g_switch_value) @@ -9599,7 +9599,7 @@ struct GTY(()) alpha_links /* Return the VMS argument type corresponding to MODE. */ enum avms_arg_type -alpha_arg_type (enum machine_mode mode) +alpha_arg_type (machine_mode mode) { switch (mode) { diff --git a/gcc/config/arc/arc-protos.h b/gcc/config/arc/arc-protos.h index 8fd746f..bbf0d55 100644 --- a/gcc/config/arc/arc-protos.h +++ b/gcc/config/arc/arc-protos.h @@ -19,15 +19,15 @@ along with GCC; see the file COPYING3. If not see #ifdef RTX_CODE -extern enum machine_mode arc_select_cc_mode (enum rtx_code, rtx, rtx); +extern machine_mode arc_select_cc_mode (enum rtx_code, rtx, rtx); /* Define the function that build the compare insn for scc, bcc and mov*cc. */ -extern struct rtx_def *gen_compare_reg (rtx, enum machine_mode); +extern struct rtx_def *gen_compare_reg (rtx, machine_mode); /* Declarations for various fns used in the .md file. */ extern void arc_output_function_epilogue (FILE *, HOST_WIDE_INT, int); extern const char *output_shift (rtx *); -extern bool compact_sda_memory_operand (rtx op,enum machine_mode mode); +extern bool compact_sda_memory_operand (rtx op,machine_mode mode); extern bool arc_double_limm_p (rtx); extern void arc_print_operand (FILE *, rtx, int); extern void arc_print_operand_address (FILE *, rtx); @@ -35,11 +35,11 @@ extern void arc_final_prescan_insn (rtx_insn *, rtx *, int); extern void arc_set_default_type_attributes(tree type); extern const char *arc_output_libcall (const char *); extern bool prepare_extend_operands (rtx *operands, enum rtx_code code, - enum machine_mode omode); + machine_mode omode); extern int arc_output_addsi (rtx *operands, bool, bool); extern int arc_output_commutative_cond_exec (rtx *operands, bool); extern bool arc_expand_movmem (rtx *operands); -extern bool prepare_move_operands (rtx *operands, enum machine_mode mode); +extern bool prepare_move_operands (rtx *operands, machine_mode mode); extern void emit_shift (enum rtx_code, rtx, rtx, rtx); #endif /* RTX_CODE */ @@ -61,21 +61,21 @@ void arc_asm_output_aligned_decl_local (FILE *, tree, const char *, extern rtx arc_return_addr_rtx (int , rtx); extern bool check_if_valid_regno_const (rtx *, int); extern bool check_if_valid_sleep_operand (rtx *, int); -extern bool arc_legitimate_constant_p (enum machine_mode, rtx); +extern bool arc_legitimate_constant_p (machine_mode, rtx); extern bool arc_legitimate_pc_offset_p (rtx); extern bool arc_legitimate_pic_addr_p (rtx); -extern void emit_pic_move (rtx *, enum machine_mode); +extern void emit_pic_move (rtx *, machine_mode); extern bool arc_raw_symbolic_reference_mentioned_p (rtx, bool); extern bool arc_legitimate_pic_operand_p (rtx); extern bool arc_is_longcall_p (rtx); extern bool arc_is_shortcall_p (rtx); extern bool arc_profile_call (rtx callee); extern bool valid_brcc_with_delay_p (rtx *); -extern bool small_data_pattern (rtx , enum machine_mode); +extern bool small_data_pattern (rtx , machine_mode); extern rtx arc_rewrite_small_data (rtx); extern bool arc_ccfsm_cond_exec_p (void); struct secondary_reload_info; -extern int arc_register_move_cost (enum machine_mode, enum reg_class, +extern int arc_register_move_cost (machine_mode, enum reg_class, enum reg_class); extern rtx disi_highpart (rtx); extern int arc_adjust_insn_length (rtx_insn *, int, bool); @@ -115,6 +115,6 @@ extern int arc_decl_pretend_args (tree decl); extern bool arc_short_comparison_p (rtx, int); extern bool arc_epilogue_uses (int regno); /* insn-attrtab.c doesn't include reload.h, which declares regno_clobbered_p. */ -extern int regno_clobbered_p (unsigned int, rtx_insn *, enum machine_mode, int); +extern int regno_clobbered_p (unsigned int, rtx_insn *, machine_mode, int); extern int arc_return_slot_offset (void); -extern bool arc_legitimize_reload_address (rtx *, enum machine_mode, int, int); +extern bool arc_legitimize_reload_address (rtx *, machine_mode, int, int); diff --git a/gcc/config/arc/arc.c b/gcc/config/arc/arc.c index 8bfebfd..d04be01 100644 --- a/gcc/config/arc/arc.c +++ b/gcc/config/arc/arc.c @@ -385,16 +385,16 @@ static void arc_file_start (void); static void arc_internal_label (FILE *, const char *, unsigned long); static void arc_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); -static int arc_address_cost (rtx, enum machine_mode, addr_space_t, bool); +static int arc_address_cost (rtx, machine_mode, addr_space_t, bool); static void arc_encode_section_info (tree decl, rtx rtl, int first); static void arc_init_builtins (void); -static rtx arc_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx arc_expand_builtin (tree, rtx, rtx, machine_mode, int); static int branch_dest (rtx); static void arc_output_pic_addr_const (FILE *, rtx, int); -void emit_pic_move (rtx *, enum machine_mode); +void emit_pic_move (rtx *, machine_mode); bool arc_legitimate_pic_operand_p (rtx); static bool arc_function_ok_for_sibcall (tree, tree); static rtx arc_function_value (const_tree, const_tree, bool); @@ -405,7 +405,7 @@ static bool arc_in_small_data_p (const_tree); static void arc_init_reg_tables (void); static bool arc_return_in_memory (const_tree, const_tree); static void arc_init_simd_builtins (void); -static bool arc_vector_mode_supported_p (enum machine_mode); +static bool arc_vector_mode_supported_p (machine_mode); static bool arc_can_use_doloop_p (const widest_int &, const widest_int &, unsigned int, bool); @@ -418,7 +418,7 @@ static bool arc_frame_pointer_required (void); /* Implements target hook vector_mode_supported_p. */ static bool -arc_vector_mode_supported_p (enum machine_mode mode) +arc_vector_mode_supported_p (machine_mode mode) { if (!TARGET_SIMD_SET) return false; @@ -438,9 +438,9 @@ static bool arc_can_follow_jump (const rtx_insn *follower, const rtx_insn *followee); static rtx frame_insn (rtx); -static void arc_function_arg_advance (cumulative_args_t, enum machine_mode, +static void arc_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static rtx arc_legitimize_address_0 (rtx, rtx, enum machine_mode mode); +static rtx arc_legitimize_address_0 (rtx, rtx, machine_mode mode); static void arc_finalize_pic (void); @@ -602,7 +602,7 @@ arc_sched_adjust_priority (rtx_insn *insn, int priority) } static reg_class_t -arc_secondary_reload (bool in_p, rtx x, reg_class_t cl, enum machine_mode, +arc_secondary_reload (bool in_p, rtx x, reg_class_t cl, machine_mode, secondary_reload_info *) { if (cl == DOUBLE_REGS) @@ -996,10 +996,10 @@ arc_short_comparison_p (rtx comparison, int offset) /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, return the mode to be used for the comparison. */ -enum machine_mode +machine_mode arc_select_cc_mode (enum rtx_code op, rtx x, rtx y) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); rtx x1; /* For an operation that sets the condition codes as a side-effect, the @@ -1150,7 +1150,7 @@ arc_init_reg_tables (void) for (i = 0; i < NUM_MACHINE_MODES; i++) { - enum machine_mode m = (enum machine_mode) i; + machine_mode m = (machine_mode) i; switch (GET_MODE_CLASS (m)) { @@ -1490,13 +1490,13 @@ arc_set_default_type_attributes (tree type ATTRIBUTE_UNUSED) return the rtx for the cc reg in the proper mode. */ rtx -gen_compare_reg (rtx comparison, enum machine_mode omode) +gen_compare_reg (rtx comparison, machine_mode omode) { enum rtx_code code = GET_CODE (comparison); rtx x = XEXP (comparison, 0); rtx y = XEXP (comparison, 1); rtx tmp, cc_reg; - enum machine_mode mode, cmode; + machine_mode mode, cmode; cmode = GET_MODE (x); @@ -1641,7 +1641,7 @@ arc_double_limm_p (rtx value) static void arc_setup_incoming_varargs (cumulative_args_t args_so_far, - enum machine_mode mode, tree type, + machine_mode mode, tree type, int *pretend_size, int no_rtl) { int first_anon_arg; @@ -1680,7 +1680,7 @@ arc_setup_incoming_varargs (cumulative_args_t args_so_far, If ADDR is not a valid address, its cost is irrelevant. */ int -arc_address_cost (rtx addr, enum machine_mode, addr_space_t, bool speed) +arc_address_cost (rtx addr, machine_mode, addr_space_t, bool speed) { switch (GET_CODE (addr)) { @@ -2564,7 +2564,7 @@ output_shift (rtx *operands) { /* static int loopend_lab;*/ rtx shift = operands[3]; - enum machine_mode mode = GET_MODE (shift); + machine_mode mode = GET_MODE (shift); enum rtx_code code = GET_CODE (shift); const char *shift_one; @@ -4712,7 +4712,7 @@ arc_output_pic_addr_const (FILE * file, rtx x, int code) /* Emit insns to move operands[1] into operands[0]. */ void -emit_pic_move (rtx *operands, enum machine_mode) +emit_pic_move (rtx *operands, machine_mode) { rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode); @@ -4754,7 +4754,7 @@ emit_pic_move (rtx *operands, enum machine_mode) /* Implement TARGET_ARG_PARTIAL_BYTES. */ static int -arc_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +arc_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -4812,7 +4812,7 @@ arc_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, and the rest are pushed. */ static rtx -arc_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +arc_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -4859,7 +4859,7 @@ arc_function_arg (cumulative_args_t cum_v, enum machine_mode mode, course function_arg_partial_nregs will come into play. */ static void -arc_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +arc_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -4885,7 +4885,7 @@ arc_function_value (const_tree valtype, const_tree fn_decl_or_type ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode = TYPE_MODE (valtype); + machine_mode mode = TYPE_MODE (valtype); int unsignedp ATTRIBUTE_UNUSED; unsignedp = TYPE_UNSIGNED (valtype); @@ -4919,7 +4919,7 @@ arc_legitimate_pic_operand_p (rtx x) satisfies CONSTANT_P. */ bool -arc_legitimate_constant_p (enum machine_mode, rtx x) +arc_legitimate_constant_p (machine_mode, rtx x) { if (!flag_pic) return true; @@ -4970,7 +4970,7 @@ arc_legitimate_constant_p (enum machine_mode, rtx x) } static bool -arc_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +arc_legitimate_address_p (machine_mode mode, rtx x, bool strict) { if (RTX_OK_FOR_BASE_P (x, strict)) return true; @@ -5026,7 +5026,7 @@ arc_mode_dependent_address_p (const_rtx addr, addr_space_t) /* Determine if it's legal to put X into the constant pool. */ static bool -arc_cannot_force_const_mem (enum machine_mode mode, rtx x) +arc_cannot_force_const_mem (machine_mode mode, rtx x) { return !arc_legitimate_constant_p (mode, x); } @@ -5115,7 +5115,7 @@ arc_init_builtins (void) arc_init_simd_builtins (); } -static rtx arc_expand_simd_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx arc_expand_simd_builtin (tree, rtx, rtx, machine_mode, int); /* Expand an expression EXP that calls a built-in function, with result going to TARGET if that's convenient @@ -5127,7 +5127,7 @@ static rtx arc_expand_builtin (tree exp, rtx target, rtx subtarget, - enum machine_mode mode, + machine_mode mode, int ignore) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -5137,8 +5137,8 @@ arc_expand_builtin (tree exp, rtx op1; int fcode = DECL_FUNCTION_CODE (fndecl); int icode; - enum machine_mode mode0; - enum machine_mode mode1; + machine_mode mode0; + machine_mode mode1; if (fcode > ARC_SIMD_BUILTIN_BEGIN && fcode < ARC_SIMD_BUILTIN_END) return arc_expand_simd_builtin (exp, target, subtarget, mode, ignore); @@ -5705,7 +5705,7 @@ walk_stores (rtx x, void (*fun) (rtx, rtx, void *), void *data) static bool arc_pass_by_reference (cumulative_args_t ca_v ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type, bool named ATTRIBUTE_UNUSED) { @@ -6419,7 +6419,7 @@ small_data_pattern_1 (rtx *loc, void *data ATTRIBUTE_UNUSED) a PLUS. */ bool -small_data_pattern (rtx op, enum machine_mode) +small_data_pattern (rtx op, machine_mode) { return (GET_CODE (op) != SEQUENCE && for_each_rtx (&op, small_data_pattern_1, 0)); @@ -6433,7 +6433,7 @@ small_data_pattern (rtx op, enum machine_mode) /* volatile cache option still to be handled. */ bool -compact_sda_memory_operand (rtx op, enum machine_mode mode) +compact_sda_memory_operand (rtx op, machine_mode mode) { rtx addr; int size; @@ -6837,7 +6837,7 @@ static rtx arc_expand_simd_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -6854,11 +6854,11 @@ arc_expand_simd_builtin (tree exp, unsigned int i; int fcode = DECL_FUNCTION_CODE (fndecl); int icode; - enum machine_mode mode0; - enum machine_mode mode1; - enum machine_mode mode2; - enum machine_mode mode3; - enum machine_mode mode4; + machine_mode mode0; + machine_mode mode1; + machine_mode mode2; + machine_mode mode3; + machine_mode mode4; const struct builtin_description * d; for (i = 0, d = arc_simd_builtin_desc_list; @@ -7298,7 +7298,7 @@ arc_preserve_reload_p (rtx in) } int -arc_register_move_cost (enum machine_mode, +arc_register_move_cost (machine_mode, enum reg_class from_class, enum reg_class to_class) { /* The ARC600 has no bypass for extension registers, hence a nop might be @@ -7545,7 +7545,7 @@ arc_expand_movmem (rtx *operands) for (i = 0; size > 0; i ^= 1, size -= piece) { rtx tmp; - enum machine_mode mode; + machine_mode mode; if (piece > size) piece = size & -size; @@ -7576,7 +7576,7 @@ arc_expand_movmem (rtx *operands) been emitted. */ bool -prepare_move_operands (rtx *operands, enum machine_mode mode) +prepare_move_operands (rtx *operands, machine_mode mode) { /* We used to do this only for MODE_INT Modes, but addresses to floating point variables may well be in the small data section. */ @@ -7664,7 +7664,7 @@ prepare_move_operands (rtx *operands, enum machine_mode mode) bool prepare_extend_operands (rtx *operands, enum rtx_code code, - enum machine_mode omode) + machine_mode omode) { if (!TARGET_NO_SDATA_SET && small_data_pattern (operands[1], Pmode)) { @@ -8187,7 +8187,7 @@ arc_get_ccfsm_cond (struct arc_ccfsm *statep, bool reverse) gcc_assert (ARC_INVERSE_CONDITION_CODE (raw_cc) == statep->cc); - enum machine_mode ccm = GET_MODE (XEXP (cond, 0)); + machine_mode ccm = GET_MODE (XEXP (cond, 0)); enum rtx_code code = reverse_condition (GET_CODE (cond)); if (code == UNKNOWN || ccm == CC_FP_GTmode || ccm == CC_FP_GEmode) code = reverse_condition_maybe_unordered (GET_CODE (cond)); @@ -8420,7 +8420,7 @@ arc_predicate_delay_insns (void) gcc_unreachable (); if (reverse != !INSN_FROM_TARGET_P (dlay)) { - enum machine_mode ccm = GET_MODE (XEXP (cond, 0)); + machine_mode ccm = GET_MODE (XEXP (cond, 0)); enum rtx_code code = reverse_condition (GET_CODE (cond)); if (code == UNKNOWN || ccm == CC_FP_GTmode || ccm == CC_FP_GEmode) code = reverse_condition_maybe_unordered (GET_CODE (cond)); @@ -8484,7 +8484,7 @@ arc_write_ext_corereg (rtx insn) static rtx arc_legitimize_address_0 (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { rtx addr, inner; @@ -8515,13 +8515,13 @@ arc_legitimize_address_0 (rtx x, rtx oldx ATTRIBUTE_UNUSED, } else if (GET_CODE (addr) == SYMBOL_REF && !SYMBOL_REF_FUNCTION_P (addr)) x = force_reg (Pmode, x); - if (memory_address_p ((enum machine_mode) mode, x)) + if (memory_address_p ((machine_mode) mode, x)) return x; return NULL_RTX; } static rtx -arc_legitimize_address (rtx orig_x, rtx oldx, enum machine_mode mode) +arc_legitimize_address (rtx orig_x, rtx oldx, machine_mode mode) { rtx new_x = arc_legitimize_address_0 (orig_x, oldx, mode); @@ -8975,7 +8975,7 @@ arc_process_double_reg_moves (rtx *operands) rtx arc_split_move (rtx *operands) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); int i; int swap = 0; rtx xop[4]; @@ -9310,13 +9310,13 @@ arc_register_priority (int r) } static reg_class_t -arc_spill_class (reg_class_t /* orig_class */, enum machine_mode) +arc_spill_class (reg_class_t /* orig_class */, machine_mode) { return GENERAL_REGS; } bool -arc_legitimize_reload_address (rtx *p, enum machine_mode mode, int opnum, +arc_legitimize_reload_address (rtx *p, machine_mode mode, int opnum, int itype) { rtx x = *p; diff --git a/gcc/config/arc/arc.h b/gcc/config/arc/arc.h index 2b0a04c..d40f5c3 100644 --- a/gcc/config/arc/arc.h +++ b/gcc/config/arc/arc.h @@ -1057,7 +1057,7 @@ extern int arc_initial_elimination_offset(int from, int to); /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, return the mode to be used for the comparison. */ -/*extern enum machine_mode arc_select_cc_mode ();*/ +/*extern machine_mode arc_select_cc_mode ();*/ #define SELECT_CC_MODE(OP, X, Y) \ arc_select_cc_mode (OP, X, Y) diff --git a/gcc/config/arc/predicates.md b/gcc/config/arc/predicates.md index 81bf627..f7e045b 100644 --- a/gcc/config/arc/predicates.md +++ b/gcc/config/arc/predicates.md @@ -585,7 +585,7 @@ (define_special_predicate "cc_set_register" (match_code "reg") { - enum machine_mode rmode = GET_MODE (op); + machine_mode rmode = GET_MODE (op); if (mode == VOIDmode) { diff --git a/gcc/config/arm/aarch-common-protos.h b/gcc/config/arm/aarch-common-protos.h index ba0ea9d..264bf01 100644 --- a/gcc/config/arm/aarch-common-protos.h +++ b/gcc/config/arm/aarch-common-protos.h @@ -25,8 +25,8 @@ extern int aarch_crypto_can_dual_issue (rtx_insn *, rtx_insn *); extern bool aarch_rev16_p (rtx); -extern bool aarch_rev16_shleft_mask_imm_p (rtx, enum machine_mode); -extern bool aarch_rev16_shright_mask_imm_p (rtx, enum machine_mode); +extern bool aarch_rev16_shleft_mask_imm_p (rtx, machine_mode); +extern bool aarch_rev16_shright_mask_imm_p (rtx, machine_mode); extern int arm_early_load_addr_dep (rtx, rtx); extern int arm_early_store_addr_dep (rtx, rtx); extern int arm_mac_accumulator_is_mul_result (rtx, rtx); diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c index 1c35264..e4727cb 100644 --- a/gcc/config/arm/aarch-common.c +++ b/gcc/config/arm/aarch-common.c @@ -193,7 +193,7 @@ arm_get_set_operands (rtx producer, rtx consumer, } bool -aarch_rev16_shright_mask_imm_p (rtx val, enum machine_mode mode) +aarch_rev16_shright_mask_imm_p (rtx val, machine_mode mode) { return CONST_INT_P (val) && INTVAL (val) @@ -202,7 +202,7 @@ aarch_rev16_shright_mask_imm_p (rtx val, enum machine_mode mode) } bool -aarch_rev16_shleft_mask_imm_p (rtx val, enum machine_mode mode) +aarch_rev16_shleft_mask_imm_p (rtx val, machine_mode mode) { return CONST_INT_P (val) && INTVAL (val) @@ -212,7 +212,7 @@ aarch_rev16_shleft_mask_imm_p (rtx val, enum machine_mode mode) static bool -aarch_rev16_p_1 (rtx lhs, rtx rhs, enum machine_mode mode) +aarch_rev16_p_1 (rtx lhs, rtx rhs, machine_mode mode) { if (GET_CODE (lhs) == AND && GET_CODE (XEXP (lhs, 0)) == ASHIFT diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index f5a9bf3..a37aa80 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -44,54 +44,54 @@ extern void arm_output_fn_unwind (FILE *, bool); #ifdef RTX_CODE -extern bool arm_vector_mode_supported_p (enum machine_mode); -extern bool arm_small_register_classes_for_mode_p (enum machine_mode); -extern int arm_hard_regno_mode_ok (unsigned int, enum machine_mode); -extern bool arm_modes_tieable_p (enum machine_mode, enum machine_mode); +extern bool arm_vector_mode_supported_p (machine_mode); +extern bool arm_small_register_classes_for_mode_p (machine_mode); +extern int arm_hard_regno_mode_ok (unsigned int, machine_mode); +extern bool arm_modes_tieable_p (machine_mode, machine_mode); extern int const_ok_for_arm (HOST_WIDE_INT); extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code); extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code); -extern int arm_split_constant (RTX_CODE, enum machine_mode, rtx, +extern int arm_split_constant (RTX_CODE, machine_mode, rtx, HOST_WIDE_INT, rtx, rtx, int); extern int legitimate_pic_operand_p (rtx); -extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); +extern rtx legitimize_pic_address (rtx, machine_mode, rtx); extern rtx legitimize_tls_address (rtx, rtx); -extern bool arm_legitimate_address_p (enum machine_mode, rtx, bool); -extern int arm_legitimate_address_outer_p (enum machine_mode, rtx, RTX_CODE, int); -extern int thumb_legitimate_offset_p (enum machine_mode, HOST_WIDE_INT); -extern bool arm_legitimize_reload_address (rtx *, enum machine_mode, int, int, +extern bool arm_legitimate_address_p (machine_mode, rtx, bool); +extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int); +extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT); +extern bool arm_legitimize_reload_address (rtx *, machine_mode, int, int, int); -extern rtx thumb_legitimize_reload_address (rtx *, enum machine_mode, int, int, +extern rtx thumb_legitimize_reload_address (rtx *, machine_mode, int, int, int); -extern int thumb1_legitimate_address_p (enum machine_mode, rtx, int); -extern bool ldm_stm_operation_p (rtx, bool, enum machine_mode mode, +extern int thumb1_legitimate_address_p (machine_mode, rtx, int); +extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode, bool, bool); extern int arm_const_double_rtx (rtx); extern int vfp3_const_double_rtx (rtx); -extern int neon_immediate_valid_for_move (rtx, enum machine_mode, rtx *, int *); -extern int neon_immediate_valid_for_logic (rtx, enum machine_mode, int, rtx *, +extern int neon_immediate_valid_for_move (rtx, machine_mode, rtx *, int *); +extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *, int *); -extern int neon_immediate_valid_for_shift (rtx, enum machine_mode, rtx *, +extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *, int *, bool); extern char *neon_output_logic_immediate (const char *, rtx *, - enum machine_mode, int, int); + machine_mode, int, int); extern char *neon_output_shift_immediate (const char *, char, rtx *, - enum machine_mode, int, bool); -extern void neon_pairwise_reduce (rtx, rtx, enum machine_mode, + machine_mode, int, bool); +extern void neon_pairwise_reduce (rtx, rtx, machine_mode, rtx (*) (rtx, rtx, rtx)); extern rtx neon_make_constant (rtx); extern tree arm_builtin_vectorized_function (tree, tree, tree); extern void neon_expand_vector_init (rtx, rtx); extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); extern void neon_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT); -extern HOST_WIDE_INT neon_element_bits (enum machine_mode); +extern HOST_WIDE_INT neon_element_bits (machine_mode); extern void neon_reinterpret (rtx, rtx); -extern void neon_emit_pair_result_insn (enum machine_mode, +extern void neon_emit_pair_result_insn (machine_mode, rtx (*) (rtx, rtx, rtx, rtx), rtx, rtx, rtx); extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int); extern void neon_split_vcombine (rtx op[3]); -extern enum reg_class coproc_secondary_reload_class (enum machine_mode, rtx, +extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx, bool); extern bool arm_tls_referenced_p (rtx); @@ -115,8 +115,8 @@ extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool); extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool); extern int arm_gen_movmemqi (rtx *); extern bool gen_movmem_ldrd_strd (rtx *); -extern enum machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx); -extern enum machine_mode arm_select_dominance_cc_mode (rtx, rtx, +extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx); +extern machine_mode arm_select_dominance_cc_mode (rtx, rtx, HOST_WIDE_INT); extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx); extern rtx arm_gen_return_addr_mask (void); @@ -165,8 +165,8 @@ extern rtx arm_load_tp (rtx); #if defined TREE_CODE extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); -extern bool arm_pad_arg_upward (enum machine_mode, const_tree); -extern bool arm_pad_reg_upward (enum machine_mode, tree, int); +extern bool arm_pad_arg_upward (machine_mode, const_tree); +extern bool arm_pad_reg_upward (machine_mode, tree, int); #endif extern int arm_apply_result_size (void); @@ -297,7 +297,7 @@ extern bool arm_gen_setmem (rtx *); extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel); extern bool arm_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel); -extern bool arm_autoinc_modes_ok_p (enum machine_mode, enum arm_auto_incmodes); +extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes); extern void arm_emit_eabi_attribute (const char *, int, int); diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b424d92..f4c4ebd 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -96,20 +96,20 @@ struct four_ints /* Forward function declarations. */ static bool arm_const_not_ok_for_debug_p (rtx); static bool arm_lra_p (void); -static bool arm_needs_doubleword_align (enum machine_mode, const_tree); +static bool arm_needs_doubleword_align (machine_mode, const_tree); static int arm_compute_static_chain_stack_bytes (void); static arm_stack_offsets *arm_get_frame_offsets (void); static void arm_add_gc_roots (void); -static int arm_gen_constant (enum rtx_code, enum machine_mode, rtx, +static int arm_gen_constant (enum rtx_code, machine_mode, rtx, HOST_WIDE_INT, rtx, rtx, int, int); static unsigned bit_count (unsigned long); static int arm_address_register_rtx_p (rtx, int); -static int arm_legitimate_index_p (enum machine_mode, rtx, RTX_CODE, int); -static int thumb2_legitimate_index_p (enum machine_mode, rtx, int); -static int thumb1_base_register_rtx_p (rtx, enum machine_mode, int); -static rtx arm_legitimize_address (rtx, rtx, enum machine_mode); +static int arm_legitimate_index_p (machine_mode, rtx, RTX_CODE, int); +static int thumb2_legitimate_index_p (machine_mode, rtx, int); +static int thumb1_base_register_rtx_p (rtx, machine_mode, int); +static rtx arm_legitimize_address (rtx, rtx, machine_mode); static reg_class_t arm_preferred_reload_class (rtx, reg_class_t); -static rtx thumb_legitimize_address (rtx, rtx, enum machine_mode); +static rtx thumb_legitimize_address (rtx, rtx, machine_mode); inline static int thumb1_index_register_rtx_p (rtx, int); static int thumb_far_jump_used_p (void); static bool thumb_force_lr_save (void); @@ -139,7 +139,7 @@ static int arm_barrier_cost (rtx); static Mfix *create_fix_barrier (Mfix *, HOST_WIDE_INT); static void push_minipool_barrier (rtx_insn *, HOST_WIDE_INT); static void push_minipool_fix (rtx_insn *, HOST_WIDE_INT, rtx *, - enum machine_mode, rtx); + machine_mode, rtx); static void arm_reorg (void); static void note_invalid_constants (rtx_insn *, HOST_WIDE_INT, int); static unsigned long arm_compute_save_reg0_reg12_mask (void); @@ -167,20 +167,20 @@ static int optimal_immediate_sequence_1 (enum rtx_code code, int i); static int arm_get_strip_length (int); static bool arm_function_ok_for_sibcall (tree, tree); -static enum machine_mode arm_promote_function_mode (const_tree, - enum machine_mode, int *, +static machine_mode arm_promote_function_mode (const_tree, + machine_mode, int *, const_tree, int); static bool arm_return_in_memory (const_tree, const_tree); static rtx arm_function_value (const_tree, const_tree, bool); -static rtx arm_libcall_value_1 (enum machine_mode); -static rtx arm_libcall_value (enum machine_mode, const_rtx); +static rtx arm_libcall_value_1 (machine_mode); +static rtx arm_libcall_value (machine_mode, const_rtx); static bool arm_function_value_regno_p (const unsigned int); static void arm_internal_label (FILE *, const char *, unsigned long); static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static bool arm_have_conditional_execution (void); -static bool arm_cannot_force_const_mem (enum machine_mode, rtx); -static bool arm_legitimate_constant_p (enum machine_mode, rtx); +static bool arm_cannot_force_const_mem (machine_mode, rtx); +static bool arm_legitimate_constant_p (machine_mode, rtx); static bool arm_rtx_costs_1 (rtx, enum rtx_code, int*, bool); static bool arm_size_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *); static bool arm_slowmul_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool); @@ -188,29 +188,29 @@ static bool arm_fastmul_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, boo static bool arm_xscale_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool); static bool arm_9e_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool); static bool arm_rtx_costs (rtx, int, int, int, int *, bool); -static int arm_address_cost (rtx, enum machine_mode, addr_space_t, bool); -static int arm_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); -static int arm_memory_move_cost (enum machine_mode, reg_class_t, bool); +static int arm_address_cost (rtx, machine_mode, addr_space_t, bool); +static int arm_register_move_cost (machine_mode, reg_class_t, reg_class_t); +static int arm_memory_move_cost (machine_mode, reg_class_t, bool); static void arm_init_builtins (void); static void arm_init_iwmmxt_builtins (void); -static rtx safe_vector_operand (rtx, enum machine_mode); +static rtx safe_vector_operand (rtx, machine_mode); static rtx arm_expand_binop_builtin (enum insn_code, tree, rtx); static rtx arm_expand_unop_builtin (enum insn_code, tree, rtx, int); -static rtx arm_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx arm_expand_builtin (tree, rtx, rtx, machine_mode, int); static tree arm_builtin_decl (unsigned, bool); static void emit_constant_insn (rtx cond, rtx pattern); static rtx_insn *emit_set_insn (rtx, rtx); static rtx emit_multi_reg_push (unsigned long, unsigned long); -static int arm_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static int arm_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static rtx arm_function_arg (cumulative_args_t, enum machine_mode, +static rtx arm_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static void arm_function_arg_advance (cumulative_args_t, enum machine_mode, +static void arm_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static unsigned int arm_function_arg_boundary (enum machine_mode, const_tree); -static rtx aapcs_allocate_return_reg (enum machine_mode, const_tree, +static unsigned int arm_function_arg_boundary (machine_mode, const_tree); +static rtx aapcs_allocate_return_reg (machine_mode, const_tree, const_tree); -static rtx aapcs_libcall_value (enum machine_mode); +static rtx aapcs_libcall_value (machine_mode); static int aapcs_select_return_coproc (const_tree, const_tree); #ifdef OBJECT_FORMAT_ELF @@ -224,15 +224,15 @@ static void arm_encode_section_info (tree, rtx, int); static void arm_file_end (void); static void arm_file_start (void); -static void arm_setup_incoming_varargs (cumulative_args_t, enum machine_mode, +static void arm_setup_incoming_varargs (cumulative_args_t, machine_mode, tree, int *, int); static bool arm_pass_by_reference (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static bool arm_promote_prototypes (const_tree); static bool arm_default_short_enums (void); static bool arm_align_anon_bitfield (void); static bool arm_return_in_msb (const_tree); -static bool arm_must_pass_in_stack (enum machine_mode, const_tree); +static bool arm_must_pass_in_stack (machine_mode, const_tree); static bool arm_return_in_memory (const_tree, const_tree); #if ARM_UNWIND_INFO static void arm_unwind_emit (FILE *, rtx_insn *); @@ -256,7 +256,7 @@ static tree arm_build_builtin_va_list (void); static void arm_expand_builtin_va_start (tree, rtx); static tree arm_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *); static void arm_option_override (void); -static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode); +static unsigned HOST_WIDE_INT arm_shift_truncation_mask (machine_mode); static bool arm_cannot_copy_insn_p (rtx_insn *); static int arm_issue_rate (void); static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; @@ -267,7 +267,7 @@ static const char *arm_invalid_parameter_type (const_tree t); static const char *arm_invalid_return_type (const_tree t); static tree arm_promoted_type (const_tree t); static tree arm_convert_to_type (tree type, tree expr); -static bool arm_scalar_mode_supported_p (enum machine_mode); +static bool arm_scalar_mode_supported_p (machine_mode); static bool arm_frame_pointer_required (void); static bool arm_can_eliminate (const int, const int); static void arm_asm_trampoline_template (FILE *); @@ -277,13 +277,13 @@ static rtx arm_pic_static_addr (rtx orig, rtx reg); static bool cortex_a9_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *); static bool xscale_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *); static bool fa726te_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *); -static bool arm_array_mode_supported_p (enum machine_mode, +static bool arm_array_mode_supported_p (machine_mode, unsigned HOST_WIDE_INT); -static enum machine_mode arm_preferred_simd_mode (enum machine_mode); +static machine_mode arm_preferred_simd_mode (machine_mode); static bool arm_class_likely_spilled_p (reg_class_t); static HOST_WIDE_INT arm_vector_alignment (const_tree type); static bool arm_vector_alignment_reachable (const_tree type, bool is_packed); -static bool arm_builtin_support_vector_misalignment (enum machine_mode mode, +static bool arm_builtin_support_vector_misalignment (machine_mode mode, const_tree type, int misalignment, bool is_packed); @@ -294,7 +294,7 @@ static int arm_default_branch_cost (bool, bool); static int arm_cortex_a5_branch_cost (bool, bool); static int arm_cortex_m_branch_cost (bool, bool); -static bool arm_vectorize_vec_perm_const_ok (enum machine_mode vmode, +static bool arm_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel); static int arm_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost, @@ -907,7 +907,7 @@ bool arm_disable_literal_pool = false; /* In case of a PRE_INC, POST_INC, PRE_DEC, POST_DEC memory reference, we must report the mode of the memory reference from TARGET_PRINT_OPERAND to TARGET_PRINT_OPERAND_ADDRESS. */ -enum machine_mode output_memory_reference_mode; +machine_mode output_memory_reference_mode; /* The register number to be used for the PIC offset register. */ unsigned arm_pic_register = INVALID_REGNUM; @@ -2153,14 +2153,14 @@ bit_count (unsigned long value) typedef struct { - enum machine_mode mode; + machine_mode mode; const char *name; } arm_fixed_mode_set; /* A small helper for setting fixed-point library libfuncs. */ static void -arm_set_fixed_optab_libfunc (optab optable, enum machine_mode mode, +arm_set_fixed_optab_libfunc (optab optable, machine_mode mode, const char *funcname, const char *modename, int num_suffix) { @@ -2175,8 +2175,8 @@ arm_set_fixed_optab_libfunc (optab optable, enum machine_mode mode, } static void -arm_set_fixed_conv_libfunc (convert_optab optable, enum machine_mode to, - enum machine_mode from, const char *funcname, +arm_set_fixed_conv_libfunc (convert_optab optable, machine_mode to, + machine_mode from, const char *funcname, const char *toname, const char *fromname) { char buffer[50]; @@ -3658,7 +3658,7 @@ const_ok_for_dimode_op (HOST_WIDE_INT i, enum rtx_code code) /* ??? Tweak this for thumb2. */ int -arm_split_constant (enum rtx_code code, enum machine_mode mode, rtx insn, +arm_split_constant (enum rtx_code code, machine_mode mode, rtx insn, HOST_WIDE_INT val, rtx target, rtx source, int subtargets) { rtx cond; @@ -3958,7 +3958,7 @@ emit_constant_insn (rtx cond, rtx pattern) RTL generation. */ static int -arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, +arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, HOST_WIDE_INT val, rtx target, rtx source, int subtargets, int generate) { @@ -4620,7 +4620,7 @@ static void arm_canonicalize_comparison (int *code, rtx *op0, rtx *op1, bool op0_preserve_value) { - enum machine_mode mode; + machine_mode mode; unsigned HOST_WIDE_INT i, maxval; mode = GET_MODE (*op0); @@ -4768,7 +4768,7 @@ static rtx arm_function_value(const_tree type, const_tree func, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; int unsignedp ATTRIBUTE_UNUSED; rtx r ATTRIBUTE_UNUSED; @@ -4900,7 +4900,7 @@ arm_libcall_uses_aapcs_base (const_rtx libcall) } static rtx -arm_libcall_value_1 (enum machine_mode mode) +arm_libcall_value_1 (machine_mode mode) { if (TARGET_AAPCS_BASED) return aapcs_libcall_value (mode); @@ -4915,7 +4915,7 @@ arm_libcall_value_1 (enum machine_mode mode) assuming the value has mode MODE. */ static rtx -arm_libcall_value (enum machine_mode mode, const_rtx libcall) +arm_libcall_value (machine_mode mode, const_rtx libcall) { if (TARGET_AAPCS_BASED && arm_pcs_default != ARM_PCS_AAPCS && GET_MODE_CLASS (mode) == MODE_FLOAT) @@ -5223,9 +5223,9 @@ aapcs_vfp_cum_init (CUMULATIVE_ARGS *pcum ATTRIBUTE_UNUSED, type that doesn't match a non-VOIDmode *MODEP is found, then return -1, otherwise return the count in the sub-tree. */ static int -aapcs_vfp_sub_candidate (const_tree type, enum machine_mode *modep) +aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep) { - enum machine_mode mode; + machine_mode mode; HOST_WIDE_INT size; switch (TREE_CODE (type)) @@ -5416,10 +5416,10 @@ use_vfp_abi (enum arm_pcs pcs_variant, bool is_double) *COUNT to hold the number of such elements. */ static bool aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant, - enum machine_mode mode, const_tree type, - enum machine_mode *base_mode, int *count) + machine_mode mode, const_tree type, + machine_mode *base_mode, int *count) { - enum machine_mode new_mode = VOIDmode; + machine_mode new_mode = VOIDmode; /* If we have the type information, prefer that to working things out from the mode. */ @@ -5457,10 +5457,10 @@ aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant, static bool aapcs_vfp_is_return_candidate (enum arm_pcs pcs_variant, - enum machine_mode mode, const_tree type) + machine_mode mode, const_tree type) { int count ATTRIBUTE_UNUSED; - enum machine_mode ag_mode ATTRIBUTE_UNUSED; + machine_mode ag_mode ATTRIBUTE_UNUSED; if (!use_vfp_abi (pcs_variant, false)) return false; @@ -5469,7 +5469,7 @@ aapcs_vfp_is_return_candidate (enum arm_pcs pcs_variant, } static bool -aapcs_vfp_is_call_candidate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, +aapcs_vfp_is_call_candidate (CUMULATIVE_ARGS *pcum, machine_mode mode, const_tree type) { if (!use_vfp_abi (pcum->pcs_variant, false)) @@ -5481,7 +5481,7 @@ aapcs_vfp_is_call_candidate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, } static bool -aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, +aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, machine_mode mode, const_tree type ATTRIBUTE_UNUSED) { int shift = GET_MODE_SIZE (pcum->aapcs_vfp_rmode) / GET_MODE_SIZE (SFmode); @@ -5499,7 +5499,7 @@ aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, int i; int rcount = pcum->aapcs_vfp_rcount; int rshift = shift; - enum machine_mode rmode = pcum->aapcs_vfp_rmode; + machine_mode rmode = pcum->aapcs_vfp_rmode; rtx par; if (!TARGET_NEON) { @@ -5535,7 +5535,7 @@ aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, static rtx aapcs_vfp_allocate_return_reg (enum arm_pcs pcs_variant ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, const_tree type ATTRIBUTE_UNUSED) { if (!use_vfp_abi (pcs_variant, false)) @@ -5544,7 +5544,7 @@ aapcs_vfp_allocate_return_reg (enum arm_pcs pcs_variant ATTRIBUTE_UNUSED, if (mode == BLKmode || (mode == TImode && !TARGET_NEON)) { int count; - enum machine_mode ag_mode; + machine_mode ag_mode; int i; rtx par; int shift; @@ -5580,7 +5580,7 @@ aapcs_vfp_allocate_return_reg (enum arm_pcs pcs_variant ATTRIBUTE_UNUSED, static void aapcs_vfp_advance (CUMULATIVE_ARGS *pcum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED) { pcum->aapcs_vfp_regs_free &= ~pcum->aapcs_vfp_reg_alloc; @@ -5613,25 +5613,25 @@ static struct BLKmode) is a candidate for this co-processor's registers; this function should ignore any position-dependent state in CUMULATIVE_ARGS and only use call-type dependent information. */ - bool (*is_call_candidate) (CUMULATIVE_ARGS *, enum machine_mode, const_tree); + bool (*is_call_candidate) (CUMULATIVE_ARGS *, machine_mode, const_tree); /* Return true if the argument does get a co-processor register; it should set aapcs_reg to an RTX of the register allocated as is required for a return from FUNCTION_ARG. */ - bool (*allocate) (CUMULATIVE_ARGS *, enum machine_mode, const_tree); + bool (*allocate) (CUMULATIVE_ARGS *, machine_mode, const_tree); /* Return true if a result of mode MODE (or type TYPE if MODE is BLKmode) is can be returned in this co-processor's registers. */ - bool (*is_return_candidate) (enum arm_pcs, enum machine_mode, const_tree); + bool (*is_return_candidate) (enum arm_pcs, machine_mode, const_tree); /* Allocate and return an RTX element to hold the return type of a call, this routine must not fail and will only be called if is_return_candidate returned true with the same parameters. */ - rtx (*allocate_return_reg) (enum arm_pcs, enum machine_mode, const_tree); + rtx (*allocate_return_reg) (enum arm_pcs, machine_mode, const_tree); /* Finish processing this argument and prepare to start processing the next one. */ - void (*advance) (CUMULATIVE_ARGS *, enum machine_mode, const_tree); + void (*advance) (CUMULATIVE_ARGS *, machine_mode, const_tree); } aapcs_cp_arg_layout[ARM_NUM_COPROC_SLOTS] = { AAPCS_CP(vfp) @@ -5640,7 +5640,7 @@ static struct #undef AAPCS_CP static int -aapcs_select_call_coproc (CUMULATIVE_ARGS *pcum, enum machine_mode mode, +aapcs_select_call_coproc (CUMULATIVE_ARGS *pcum, machine_mode mode, const_tree type) { int i; @@ -5689,7 +5689,7 @@ aapcs_select_return_coproc (const_tree type, const_tree fntype) } static rtx -aapcs_allocate_return_reg (enum machine_mode mode, const_tree type, +aapcs_allocate_return_reg (machine_mode mode, const_tree type, const_tree fntype) { /* We aren't passed a decl, so we can't check that a call is local. @@ -5744,7 +5744,7 @@ aapcs_allocate_return_reg (enum machine_mode mode, const_tree type, } static rtx -aapcs_libcall_value (enum machine_mode mode) +aapcs_libcall_value (machine_mode mode) { if (BYTES_BIG_ENDIAN && ALL_FIXED_POINT_MODE_P (mode) && GET_MODE_SIZE (mode) <= 4) @@ -5756,7 +5756,7 @@ aapcs_libcall_value (enum machine_mode mode) /* Lay out a function argument using the AAPCS rules. The rule numbers referred to here are those in the AAPCS. */ static void -aapcs_layout_arg (CUMULATIVE_ARGS *pcum, enum machine_mode mode, +aapcs_layout_arg (CUMULATIVE_ARGS *pcum, machine_mode mode, const_tree type, bool named) { int nregs, nregs2; @@ -5928,7 +5928,7 @@ arm_lra_p (void) /* Return true if mode/type need doubleword alignment. */ static bool -arm_needs_doubleword_align (enum machine_mode mode, const_tree type) +arm_needs_doubleword_align (machine_mode mode, const_tree type) { return (GET_MODE_ALIGNMENT (mode) > PARM_BOUNDARY || (type && TYPE_ALIGN (type) > PARM_BOUNDARY)); @@ -5955,7 +5955,7 @@ arm_needs_doubleword_align (enum machine_mode mode, const_tree type) indeed make it pass in the stack if necessary). */ static rtx -arm_function_arg (cumulative_args_t pcum_v, enum machine_mode mode, +arm_function_arg (cumulative_args_t pcum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); @@ -6008,7 +6008,7 @@ arm_function_arg (cumulative_args_t pcum_v, enum machine_mode mode, } static unsigned int -arm_function_arg_boundary (enum machine_mode mode, const_tree type) +arm_function_arg_boundary (machine_mode mode, const_tree type) { return (ARM_DOUBLEWORD_ALIGN && arm_needs_doubleword_align (mode, type) ? DOUBLEWORD_ALIGNMENT @@ -6016,7 +6016,7 @@ arm_function_arg_boundary (enum machine_mode mode, const_tree type) } static int -arm_arg_partial_bytes (cumulative_args_t pcum_v, enum machine_mode mode, +arm_arg_partial_bytes (cumulative_args_t pcum_v, machine_mode mode, tree type, bool named) { CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); @@ -6044,7 +6044,7 @@ arm_arg_partial_bytes (cumulative_args_t pcum_v, enum machine_mode mode, (TYPE is null for libcalls where that information may not be available.) */ static void -arm_function_arg_advance (cumulative_args_t pcum_v, enum machine_mode mode, +arm_function_arg_advance (cumulative_args_t pcum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); @@ -6083,7 +6083,7 @@ arm_function_arg_advance (cumulative_args_t pcum_v, enum machine_mode mode, static bool arm_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type, bool named ATTRIBUTE_UNUSED) { return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST; @@ -6513,7 +6513,7 @@ require_pic_register (void) } rtx -legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) +legitimize_pic_address (rtx orig, machine_mode mode, rtx reg) { if (GET_CODE (orig) == SYMBOL_REF || GET_CODE (orig) == LABEL_REF) @@ -6838,7 +6838,7 @@ will_be_in_index_register (const_rtx x) /* Return nonzero if X is a valid ARM state address operand. */ int -arm_legitimate_address_outer_p (enum machine_mode mode, rtx x, RTX_CODE outer, +arm_legitimate_address_outer_p (machine_mode mode, rtx x, RTX_CODE outer, int strict_p) { bool use_ldrd; @@ -6925,7 +6925,7 @@ arm_legitimate_address_outer_p (enum machine_mode mode, rtx x, RTX_CODE outer, /* Return nonzero if X is a valid Thumb-2 address operand. */ static int -thumb2_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) +thumb2_legitimate_address_p (machine_mode mode, rtx x, int strict_p) { bool use_ldrd; enum rtx_code code = GET_CODE (x); @@ -7020,7 +7020,7 @@ thumb2_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) /* Return nonzero if INDEX is valid for an address index operand in ARM state. */ static int -arm_legitimate_index_p (enum machine_mode mode, rtx index, RTX_CODE outer, +arm_legitimate_index_p (machine_mode mode, rtx index, RTX_CODE outer, int strict_p) { HOST_WIDE_INT range; @@ -7141,7 +7141,7 @@ thumb2_index_mul_operand (rtx op) /* Return nonzero if INDEX is a valid Thumb-2 address index operand. */ static int -thumb2_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p) +thumb2_legitimate_index_p (machine_mode mode, rtx index, int strict_p) { enum rtx_code code = GET_CODE (index); @@ -7234,7 +7234,7 @@ thumb2_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p) /* Return nonzero if X is valid as a 16-bit Thumb state base register. */ static int -thumb1_base_register_rtx_p (rtx x, enum machine_mode mode, int strict_p) +thumb1_base_register_rtx_p (rtx x, machine_mode mode, int strict_p) { int regno; @@ -7282,7 +7282,7 @@ thumb1_index_register_rtx_p (rtx x, int strict_p) reload pass starts. This is so that eliminating such addresses into stack based ones won't produce impossible code. */ int -thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) +thumb1_legitimate_address_p (machine_mode mode, rtx x, int strict_p) { /* ??? Not clear if this is right. Experiment. */ if (GET_MODE_SIZE (mode) < 4 @@ -7381,7 +7381,7 @@ thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) /* Return nonzero if VAL can be used as an offset in a Thumb-state address instruction of mode MODE. */ int -thumb_legitimate_offset_p (enum machine_mode mode, HOST_WIDE_INT val) +thumb_legitimate_offset_p (machine_mode mode, HOST_WIDE_INT val) { switch (GET_MODE_SIZE (mode)) { @@ -7399,7 +7399,7 @@ thumb_legitimate_offset_p (enum machine_mode mode, HOST_WIDE_INT val) } bool -arm_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) +arm_legitimate_address_p (machine_mode mode, rtx x, bool strict_p) { if (TARGET_ARM) return arm_legitimate_address_outer_p (mode, x, SET, strict_p); @@ -7637,7 +7637,7 @@ legitimize_tls_address (rtx x, rtx reg) /* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. */ rtx -arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) +arm_legitimize_address (rtx x, rtx orig_x, machine_mode mode) { if (arm_tls_referenced_p (x)) { @@ -7783,7 +7783,7 @@ arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) /* Try machine-dependent ways of modifying an illegitimate Thumb address to be legitimate. If we find one, return the new, valid address. */ rtx -thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) +thumb_legitimize_address (rtx x, rtx orig_x, machine_mode mode) { if (GET_CODE (x) == PLUS && CONST_INT_P (XEXP (x, 1)) @@ -7849,7 +7849,7 @@ thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) bool arm_legitimize_reload_address (rtx *p, - enum machine_mode mode, + machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -8036,7 +8036,7 @@ arm_legitimize_reload_address (rtx *p, rtx thumb_legitimize_reload_address (rtx *x_p, - enum machine_mode mode, + machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -8116,7 +8116,7 @@ arm_tls_referenced_p (rtx x) When generating pic allow anything. */ static bool -arm_legitimate_constant_p_1 (enum machine_mode mode, rtx x) +arm_legitimate_constant_p_1 (machine_mode mode, rtx x) { /* At present, we have no support for Neon structure constants, so forbid them here. It might be possible to handle simple cases like 0 and -1 @@ -8128,7 +8128,7 @@ arm_legitimate_constant_p_1 (enum machine_mode mode, rtx x) } static bool -thumb_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +thumb_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return (CONST_INT_P (x) || CONST_DOUBLE_P (x) @@ -8137,7 +8137,7 @@ thumb_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) } static bool -arm_legitimate_constant_p (enum machine_mode mode, rtx x) +arm_legitimate_constant_p (machine_mode mode, rtx x) { return (!arm_cannot_force_const_mem (mode, x) && (TARGET_32BIT @@ -8148,7 +8148,7 @@ arm_legitimate_constant_p (enum machine_mode mode, rtx x) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -arm_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +arm_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { rtx base, offset; @@ -8172,7 +8172,7 @@ arm_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) static inline int thumb1_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int total, words; switch (code) @@ -8300,7 +8300,7 @@ thumb1_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) static inline bool arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); enum rtx_code subcode; rtx operand; enum rtx_code code = GET_CODE (x); @@ -8762,7 +8762,7 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed) if (GET_MODE_CLASS (mode) == MODE_INT) { rtx op = XEXP (x, 0); - enum machine_mode opmode = GET_MODE (op); + machine_mode opmode = GET_MODE (op); if (mode == DImode) *total += COSTS_N_INSNS (1); @@ -8905,7 +8905,7 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed) static inline int thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int words; switch (code) @@ -9047,7 +9047,7 @@ static bool arm_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB1) { *total = thumb1_size_rtx_costs (x, code, outer_code); @@ -9402,7 +9402,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, const struct cpu_cost_table *extra_cost, int *cost, bool speed_p) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB1) { @@ -10398,7 +10398,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, *cost = 0; else { - enum machine_mode op0mode; + machine_mode op0mode; /* We'll mostly assume that the cost of a compare is the cost of the LHS. However, there are some notable exceptions. */ @@ -11122,7 +11122,7 @@ static bool arm_slowmul_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB) { @@ -11176,7 +11176,7 @@ static bool arm_fastmul_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB1) { @@ -11260,7 +11260,7 @@ static bool arm_xscale_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB) { @@ -11349,7 +11349,7 @@ static bool arm_9e_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB1) { @@ -11454,7 +11454,7 @@ arm_thumb_address_cost (rtx x) } static int -arm_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, +arm_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { return TARGET_32BIT ? arm_arm_address_cost (x) : arm_thumb_address_cost (x); @@ -11632,7 +11632,7 @@ fa726te_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost) point to integer conversion does not go through memory. */ int -arm_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +arm_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { if (TARGET_32BIT) @@ -11660,7 +11660,7 @@ arm_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, /* Implement TARGET_MEMORY_MOVE_COST. */ int -arm_memory_move_cost (enum machine_mode mode, reg_class_t rclass, +arm_memory_move_cost (machine_mode mode, reg_class_t rclass, bool in ATTRIBUTE_UNUSED) { if (TARGET_32BIT) @@ -12219,7 +12219,7 @@ vfp3_const_double_rtx (rtx x) -1 if the given value doesn't match any of the listed patterns. */ static int -neon_valid_immediate (rtx op, enum machine_mode mode, int inverse, +neon_valid_immediate (rtx op, machine_mode mode, int inverse, rtx *modconst, int *elementwidth) { #define CHECK(STRIDE, ELSIZE, CLASS, TEST) \ @@ -12424,7 +12424,7 @@ neon_valid_immediate (rtx op, enum machine_mode mode, int inverse, VMOV) in *MODCONST. */ int -neon_immediate_valid_for_move (rtx op, enum machine_mode mode, +neon_immediate_valid_for_move (rtx op, machine_mode mode, rtx *modconst, int *elementwidth) { rtx tmpconst; @@ -12449,7 +12449,7 @@ neon_immediate_valid_for_move (rtx op, enum machine_mode mode, *ELEMENTWIDTH. See neon_valid_immediate for description of INVERSE. */ int -neon_immediate_valid_for_logic (rtx op, enum machine_mode mode, int inverse, +neon_immediate_valid_for_logic (rtx op, machine_mode mode, int inverse, rtx *modconst, int *elementwidth) { rtx tmpconst; @@ -12475,7 +12475,7 @@ neon_immediate_valid_for_logic (rtx op, enum machine_mode mode, int inverse, because they have different limitations. */ int -neon_immediate_valid_for_shift (rtx op, enum machine_mode mode, +neon_immediate_valid_for_shift (rtx op, machine_mode mode, rtx *modconst, int *elementwidth, bool isleftshift) { @@ -12532,7 +12532,7 @@ neon_immediate_valid_for_shift (rtx op, enum machine_mode mode, MNEM. */ char * -neon_output_logic_immediate (const char *mnem, rtx *op2, enum machine_mode mode, +neon_output_logic_immediate (const char *mnem, rtx *op2, machine_mode mode, int inverse, int quad) { int width, is_valid; @@ -12555,7 +12555,7 @@ neon_output_logic_immediate (const char *mnem, rtx *op2, enum machine_mode mode, char * neon_output_shift_immediate (const char *mnem, char sign, rtx *op2, - enum machine_mode mode, int quad, + machine_mode mode, int quad, bool isleftshift) { int width, is_valid; @@ -12583,10 +12583,10 @@ neon_output_shift_immediate (const char *mnem, char sign, rtx *op2, for no particular gain. */ void -neon_pairwise_reduce (rtx op0, rtx op1, enum machine_mode mode, +neon_pairwise_reduce (rtx op0, rtx op1, machine_mode mode, rtx (*reduc) (rtx, rtx, rtx)) { - enum machine_mode inner = GET_MODE_INNER (mode); + machine_mode inner = GET_MODE_INNER (mode); unsigned int i, parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (inner); rtx tmpsum = op1; @@ -12605,8 +12605,8 @@ neon_pairwise_reduce (rtx op0, rtx op1, enum machine_mode mode, static rtx neon_vdup_constant (rtx vals) { - enum machine_mode mode = GET_MODE (vals); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (vals); + machine_mode inner_mode = GET_MODE_INNER (mode); int n_elts = GET_MODE_NUNITS (mode); bool all_same = true; rtx x; @@ -12645,7 +12645,7 @@ neon_vdup_constant (rtx vals) rtx neon_make_constant (rtx vals) { - enum machine_mode mode = GET_MODE (vals); + machine_mode mode = GET_MODE (vals); rtx target; rtx const_vec = NULL_RTX; int n_elts = GET_MODE_NUNITS (mode); @@ -12697,8 +12697,8 @@ neon_make_constant (rtx vals) void neon_expand_vector_init (rtx target, rtx vals) { - enum machine_mode mode = GET_MODE (target); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (target); + machine_mode inner_mode = GET_MODE_INNER (mode); int n_elts = GET_MODE_NUNITS (mode); int n_var = 0, one_var = -1; bool all_same = true; @@ -12828,7 +12828,7 @@ neon_const_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high) } HOST_WIDE_INT -neon_element_bits (enum machine_mode mode) +neon_element_bits (machine_mode mode) { if (mode == DImode) return GET_MODE_BITSIZE (mode); @@ -13037,7 +13037,7 @@ arm_eliminable_register (rtx x) coprocessor registers. Otherwise return NO_REGS. */ enum reg_class -coproc_secondary_reload_class (enum machine_mode mode, rtx x, bool wb) +coproc_secondary_reload_class (machine_mode mode, rtx x, bool wb) { if (mode == HFmode) { @@ -13322,7 +13322,7 @@ adjacent_mem_locations (rtx a, rtx b) REGNO (R_dk) = REGNO (R_d0) + k. The pattern for store is similar. */ bool -ldm_stm_operation_p (rtx op, bool load, enum machine_mode mode, +ldm_stm_operation_p (rtx op, bool load, machine_mode mode, bool consecutive, bool return_pc) { HOST_WIDE_INT count = XVECLEN (op, 0); @@ -14780,7 +14780,7 @@ by mode size. */ inline static rtx next_consecutive_mem (rtx mem) { - enum machine_mode mode = GET_MODE (mem); + machine_mode mode = GET_MODE (mem); HOST_WIDE_INT offset = GET_MODE_SIZE (mode); rtx addr = plus_constant (Pmode, XEXP (mem, 0), offset); @@ -14920,7 +14920,7 @@ gen_movmem_ldrd_strd (rtx *operands) here. If we are unable to support a dominance comparison we return CC mode. This will then fail to match for the RTL expressions that generate this call. */ -enum machine_mode +machine_mode arm_select_dominance_cc_mode (rtx x, rtx y, HOST_WIDE_INT cond_or) { enum rtx_code cond1, cond2; @@ -15062,7 +15062,7 @@ arm_select_dominance_cc_mode (rtx x, rtx y, HOST_WIDE_INT cond_or) } } -enum machine_mode +machine_mode arm_select_cc_mode (enum rtx_code op, rtx x, rtx y) { /* All floating point compares return CCFP if it is an equality @@ -15245,7 +15245,7 @@ arm_select_cc_mode (enum rtx_code op, rtx x, rtx y) rtx arm_gen_compare_reg (enum rtx_code code, rtx x, rtx y, rtx scratch) { - enum machine_mode mode; + machine_mode mode; rtx cc_reg; int dimode_comparison = GET_MODE (x) == DImode || GET_MODE (y) == DImode; @@ -15581,7 +15581,7 @@ arm_reload_out_hi (rtx *operands) (padded to the size of a word) should be passed in a register. */ static bool -arm_must_pass_in_stack (enum machine_mode mode, const_tree type) +arm_must_pass_in_stack (machine_mode mode, const_tree type) { if (TARGET_AAPCS_BASED) return must_pass_in_stack_var_size (mode, type); @@ -15597,7 +15597,7 @@ arm_must_pass_in_stack (enum machine_mode mode, const_tree type) aggregate types are placed in the lowest memory address. */ bool -arm_pad_arg_upward (enum machine_mode mode ATTRIBUTE_UNUSED, const_tree type) +arm_pad_arg_upward (machine_mode mode ATTRIBUTE_UNUSED, const_tree type) { if (!TARGET_AAPCS_BASED) return DEFAULT_FUNCTION_ARG_PADDING(mode, type) == upward; @@ -15615,7 +15615,7 @@ arm_pad_arg_upward (enum machine_mode mode ATTRIBUTE_UNUSED, const_tree type) significant byte does. */ bool -arm_pad_reg_upward (enum machine_mode mode, +arm_pad_reg_upward (machine_mode mode, tree type, int first ATTRIBUTE_UNUSED) { if (TARGET_AAPCS_BASED && BYTES_BIG_ENDIAN) @@ -16140,7 +16140,7 @@ struct minipool_node /* The value in table. */ rtx value; /* The mode of value. */ - enum machine_mode mode; + machine_mode mode; /* The size of the value. With iWMMXt enabled sizes > 4 also imply an alignment of 8-bytes. */ int fix_size; @@ -16152,7 +16152,7 @@ struct minipool_fixup rtx_insn * insn; HOST_WIDE_INT address; rtx * loc; - enum machine_mode mode; + machine_mode mode; int fix_size; rtx value; Mnode * minipool; @@ -16873,7 +16873,7 @@ push_minipool_barrier (rtx_insn *insn, HOST_WIDE_INT address) MODE. */ static void push_minipool_fix (rtx_insn *insn, HOST_WIDE_INT address, rtx *loc, - enum machine_mode mode, rtx value) + machine_mode mode, rtx value) { Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix)); @@ -16940,7 +16940,7 @@ int arm_const_double_inline_cost (rtx val) { rtx lowpart, highpart; - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (val); @@ -16976,7 +16976,7 @@ arm_const_inline_cost (enum rtx_code code, rtx val) bool arm_const_double_by_parts (rtx val) { - enum machine_mode mode = GET_MODE (val); + machine_mode mode = GET_MODE (val); rtx part; if (optimize_size || arm_ld_sched) @@ -17009,7 +17009,7 @@ arm_const_double_by_parts (rtx val) bool arm_const_double_by_immediates (rtx val) { - enum machine_mode mode = GET_MODE (val); + machine_mode mode = GET_MODE (val); rtx part; if (mode == VOIDmode) @@ -18461,7 +18461,7 @@ output_move_vfp (rtx *operands) int integer_p = GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_INT; const char *templ; char buff[50]; - enum machine_mode mode; + machine_mode mode; reg = operands[!load]; mem = operands[load]; @@ -18557,7 +18557,7 @@ output_move_neon (rtx *operands) int regno, nregs, load = REG_P (operands[0]); const char *templ; char buff[50]; - enum machine_mode mode; + machine_mode mode; reg = operands[!load]; mem = operands[load]; @@ -18672,7 +18672,7 @@ arm_attr_length_move_neon (rtx_insn *insn) { rtx reg, mem, addr; int load; - enum machine_mode mode; + machine_mode mode; extract_insn_cached (insn); @@ -20624,7 +20624,7 @@ arm_emit_ldrd_pop (unsigned long saved_regs_mask) static unsigned arm_size_return_regs (void) { - enum machine_mode mode; + machine_mode mode; if (crtl->return_rtx != 0) mode = GET_MODE (crtl->return_rtx); @@ -21718,7 +21718,7 @@ arm_print_operand (FILE *stream, rtx x, int code) case 'R': if (CONST_INT_P (x) || CONST_DOUBLE_P (x)) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); rtx part; if (mode == VOIDmode) @@ -21879,7 +21879,7 @@ arm_print_operand (FILE *stream, rtx x, int code) register. */ case 'p': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int regno; if (GET_MODE_SIZE (mode) != 8 || !REG_P (x)) @@ -21903,7 +21903,7 @@ arm_print_operand (FILE *stream, rtx x, int code) case 'P': case 'q': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int is_quad = (code == 'q'); int regno; @@ -21939,7 +21939,7 @@ arm_print_operand (FILE *stream, rtx x, int code) case 'e': case 'f': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int regno; if ((GET_MODE_SIZE (mode) != 16 @@ -22080,7 +22080,7 @@ arm_print_operand (FILE *stream, rtx x, int code) /* Translate an S register number into a D register number and element index. */ case 'y': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int regno; if (GET_MODE_SIZE (mode) != 4 || !REG_P (x)) @@ -22114,7 +22114,7 @@ arm_print_operand (FILE *stream, rtx x, int code) number into a D register number and element index. */ case 'z': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int regno; if (GET_MODE_SIZE (mode) != 2 || !REG_P (x)) @@ -22239,7 +22239,7 @@ arm_print_operand_address (FILE *stream, rtx x) else if (GET_CODE (x) == PRE_INC || GET_CODE (x) == POST_INC || GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_DEC) { - extern enum machine_mode output_memory_reference_mode; + extern machine_mode output_memory_reference_mode; gcc_assert (REG_P (XEXP (x, 0))); @@ -22316,7 +22316,7 @@ arm_print_operand_punct_valid_p (unsigned char code) static bool arm_assemble_integer (rtx x, unsigned int size, int aligned_p) { - enum machine_mode mode; + machine_mode mode; if (size == UNITS_PER_WORD && aligned_p) { @@ -22472,7 +22472,7 @@ arm_elf_asm_destructor (rtx symbol, int priority) enum arm_cond_code maybe_get_arm_condition_code (rtx comparison) { - enum machine_mode mode = GET_MODE (XEXP (comparison, 0)); + machine_mode mode = GET_MODE (XEXP (comparison, 0)); enum arm_cond_code code; enum rtx_code comp_code = GET_CODE (comparison); @@ -23021,7 +23021,7 @@ thumb2_asm_output_opcode (FILE * stream) /* Returns true if REGNO is a valid register for holding a quantity of type MODE. */ int -arm_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) +arm_hard_regno_mode_ok (unsigned int regno, machine_mode mode) { if (GET_MODE_CLASS (mode) == MODE_CC) return (regno == CC_REGNUM @@ -23101,7 +23101,7 @@ arm_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) /* Implement MODES_TIEABLE_P. */ bool -arm_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) +arm_modes_tieable_p (machine_mode mode1, machine_mode mode2) { if (GET_MODE_CLASS (mode1) == GET_MODE_CLASS (mode2)) return true; @@ -24741,7 +24741,7 @@ arm_init_iwmmxt_builtins (void) { /* Use one of the operands; the target can have a different mode for mask-generating compares. */ - enum machine_mode mode; + machine_mode mode; tree type; if (d->name == 0 || !(d->mask == FL_IWMMXT || d->mask == FL_IWMMXT2)) @@ -25070,7 +25070,7 @@ arm_convert_to_type (tree type, tree expr) special-cased in the default hook. */ static bool -arm_scalar_mode_supported_p (enum machine_mode mode) +arm_scalar_mode_supported_p (machine_mode mode) { if (mode == HFmode) return (arm_fp16_format != ARM_FP16_FORMAT_NONE); @@ -25085,7 +25085,7 @@ arm_scalar_mode_supported_p (enum machine_mode mode) clear instructions. */ static rtx -safe_vector_operand (rtx x, enum machine_mode mode) +safe_vector_operand (rtx x, machine_mode mode) { if (x != const0_rtx) return x; @@ -25122,10 +25122,10 @@ arm_expand_ternop_builtin (enum insn_code icode, || icode == CODE_FOR_crypto_sha1m); builtin_sha1cpm_p = true; } - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; - enum machine_mode mode2 = insn_data[icode].operand[3].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode mode2 = insn_data[icode].operand[3].mode; if (VECTOR_MODE_P (mode0)) @@ -25174,9 +25174,9 @@ arm_expand_binop_builtin (enum insn_code icode, tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; if (VECTOR_MODE_P (mode0)) op0 = safe_vector_operand (op0, mode0); @@ -25213,8 +25213,8 @@ arm_expand_unop_builtin (enum insn_code icode, tree arg0 = CALL_EXPR_ARG (exp, 0); rtx op0 = expand_normal (arg0); rtx op1 = NULL_RTX; - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; bool builtin_sha1h_p = false; if (insn_data[icode].n_operands == 3) @@ -25269,8 +25269,8 @@ typedef enum { available. */ static tree -neon_dereference_pointer (tree exp, tree type, enum machine_mode mem_mode, - enum machine_mode reg_mode, +neon_dereference_pointer (tree exp, tree type, machine_mode mem_mode, + machine_mode reg_mode, neon_builtin_type_mode type_mode) { HOST_WIDE_INT reg_size, vector_size, nvectors, nelems; @@ -25320,9 +25320,9 @@ arm_expand_neon_args (rtx target, int icode, int have_retval, rtx op[NEON_MAX_BUILTIN_ARGS]; tree arg_type; tree formals; - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode[NEON_MAX_BUILTIN_ARGS]; - enum machine_mode other_mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode[NEON_MAX_BUILTIN_ARGS]; + machine_mode other_mode; int argc = 0; int opno; @@ -25627,7 +25627,7 @@ neon_split_vcombine (rtx operands[3]) unsigned int dest = REGNO (operands[0]); unsigned int src1 = REGNO (operands[1]); unsigned int src2 = REGNO (operands[2]); - enum machine_mode halfmode = GET_MODE (operands[1]); + machine_mode halfmode = GET_MODE (operands[1]); unsigned int halfregs = HARD_REGNO_NREGS (src1, halfmode); rtx destlo, desthi; @@ -25680,7 +25680,7 @@ static rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { const struct builtin_description * d; @@ -25695,10 +25695,10 @@ arm_expand_builtin (tree exp, rtx pat; unsigned int fcode = DECL_FUNCTION_CODE (fndecl); size_t i; - enum machine_mode tmode; - enum machine_mode mode0; - enum machine_mode mode1; - enum machine_mode mode2; + machine_mode tmode; + machine_mode mode0; + machine_mode mode1; + machine_mode mode2; int opint; int selector; int mask; @@ -26362,7 +26362,7 @@ thumb_exit (FILE *f, int reg_containing_return_addr) int pops_needed; unsigned available; unsigned required; - enum machine_mode mode; + machine_mode mode; int size; int restore_a4 = FALSE; @@ -28773,7 +28773,7 @@ arm_output_load_gr (rtx *operands) static void arm_setup_incoming_varargs (cumulative_args_t pcum_v, - enum machine_mode mode, + machine_mode mode, tree type, int *pretend_size, int second_time ATTRIBUTE_UNUSED) @@ -28804,9 +28804,9 @@ arm_promote_prototypes (const_tree t ATTRIBUTE_UNUSED) return !TARGET_AAPCS_BASED; } -static enum machine_mode +static machine_mode arm_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, int *punsignedp ATTRIBUTE_UNUSED, const_tree fntype ATTRIBUTE_UNUSED, int for_return ATTRIBUTE_UNUSED) @@ -29027,7 +29027,7 @@ thumb_set_return_address (rtx source, rtx scratch) /* Implements target hook vector_mode_supported_p. */ bool -arm_vector_mode_supported_p (enum machine_mode mode) +arm_vector_mode_supported_p (machine_mode mode) { /* Neon also supports V2SImode, etc. listed in the clause below. */ if (TARGET_NEON && (mode == V2SFmode || mode == V4SImode || mode == V8HImode @@ -29051,7 +29051,7 @@ arm_vector_mode_supported_p (enum machine_mode mode) /* Implements target hook array_mode_supported_p. */ static bool -arm_array_mode_supported_p (enum machine_mode mode, +arm_array_mode_supported_p (machine_mode mode, unsigned HOST_WIDE_INT nelems) { if (TARGET_NEON @@ -29066,8 +29066,8 @@ arm_array_mode_supported_p (enum machine_mode mode, registers when autovectorizing for Neon, at least until multiple vector widths are supported properly by the middle-end. */ -static enum machine_mode -arm_preferred_simd_mode (enum machine_mode mode) +static machine_mode +arm_preferred_simd_mode (machine_mode mode) { if (TARGET_NEON) switch (mode) @@ -29124,7 +29124,7 @@ arm_class_likely_spilled_p (reg_class_t rclass) /* Implements target hook small_register_classes_for_mode_p. */ bool -arm_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED) +arm_small_register_classes_for_mode_p (machine_mode mode ATTRIBUTE_UNUSED) { return TARGET_THUMB1; } @@ -29135,7 +29135,7 @@ arm_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED) guarantee no particular behavior for out-of-range counts. */ static unsigned HOST_WIDE_INT -arm_shift_truncation_mask (enum machine_mode mode) +arm_shift_truncation_mask (machine_mode mode) { return mode == SImode ? 255 : 0; } @@ -29173,7 +29173,7 @@ arm_dbx_register_number (unsigned int regno) static rtx arm_dwarf_register_span (rtx rtl) { - enum machine_mode mode; + machine_mode mode; unsigned regno; rtx parts[16]; int nregs; @@ -29728,7 +29728,7 @@ arm_output_iwmmxt_shift_immediate (const char *insn_name, rtx *operands, bool wr { int shift = INTVAL (operands[2]); char templ[50]; - enum machine_mode opmode = GET_MODE (operands[0]); + machine_mode opmode = GET_MODE (operands[0]); gcc_assert (shift >= 0); @@ -29906,7 +29906,7 @@ arm_issue_rate (void) composed of NEON vector element types (e.g. __builtin_neon_qi). */ typedef struct { - enum machine_mode mode; + machine_mode mode; const char *element_type_name; const char *aapcs_name; } arm_mangle_map_entry; @@ -30020,7 +30020,7 @@ arm_have_conditional_execution (void) tree arm_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) { - enum machine_mode in_mode, out_mode; + machine_mode in_mode, out_mode; int in_n, out_n; bool out_unsigned_p = TYPE_UNSIGNED (type_out); @@ -30171,7 +30171,7 @@ arm_vector_alignment_reachable (const_tree type, bool is_packed) } static bool -arm_builtin_support_vector_misalignment (enum machine_mode mode, +arm_builtin_support_vector_misalignment (machine_mode mode, const_tree type, int misalignment, bool is_packed) { @@ -30395,7 +30395,7 @@ arm_post_atomic_barrier (enum memmodel model) Use acquire and release versions if necessary. */ static void -arm_emit_load_exclusive (enum machine_mode mode, rtx rval, rtx mem, bool acq) +arm_emit_load_exclusive (machine_mode mode, rtx rval, rtx mem, bool acq) { rtx (*gen) (rtx, rtx); @@ -30428,7 +30428,7 @@ arm_emit_load_exclusive (enum machine_mode mode, rtx rval, rtx mem, bool acq) } static void -arm_emit_store_exclusive (enum machine_mode mode, rtx bval, rtx rval, +arm_emit_store_exclusive (machine_mode mode, rtx bval, rtx rval, rtx mem, bool rel) { rtx (*gen) (rtx, rtx, rtx); @@ -30478,7 +30478,7 @@ void arm_expand_compare_and_swap (rtx operands[]) { rtx bval, rval, mem, oldval, newval, is_weak, mod_s, mod_f, x; - enum machine_mode mode; + machine_mode mode; rtx (*gen) (rtx, rtx, rtx, rtx, rtx, rtx, rtx); bval = operands[0]; @@ -30559,7 +30559,7 @@ void arm_split_compare_and_swap (rtx operands[]) { rtx rval, mem, oldval, newval, scratch; - enum machine_mode mode; + machine_mode mode; enum memmodel mod_s, mod_f; bool is_weak; rtx_code_label *label1, *label2; @@ -30637,8 +30637,8 @@ arm_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem, rtx value, rtx model_rtx, rtx cond) { enum memmodel model = (enum memmodel) INTVAL (model_rtx); - enum machine_mode mode = GET_MODE (mem); - enum machine_mode wmode = (mode == DImode ? DImode : SImode); + machine_mode mode = GET_MODE (mem); + machine_mode wmode = (mode == DImode ? DImode : SImode); rtx_code_label *label; rtx x; @@ -30732,7 +30732,7 @@ struct expand_vec_perm_d { rtx target, op0, op1; unsigned char perm[MAX_VECT_LEN]; - enum machine_mode vmode; + machine_mode vmode; unsigned char nelt; bool one_vector_p; bool testing_p; @@ -30743,7 +30743,7 @@ struct expand_vec_perm_d static void arm_expand_vec_perm_1 (rtx target, rtx op0, rtx op1, rtx sel) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); bool one_vector_p = rtx_equal_p (op0, op1); gcc_checking_assert (vmode == V8QImode || vmode == V16QImode); @@ -30782,7 +30782,7 @@ arm_expand_vec_perm_1 (rtx target, rtx op0, rtx op1, rtx sel) void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); unsigned int i, nelt = GET_MODE_NUNITS (vmode); bool one_vector_p = rtx_equal_p (op0, op1); rtx rmask[MAX_VECT_LEN], mask; @@ -31150,7 +31150,7 @@ static bool arm_evpc_neon_vtbl (struct expand_vec_perm_d *d) { rtx rperm[MAX_VECT_LEN], sel; - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; unsigned int i, nelt = d->nelt; /* TODO: ARM's VTBL indexing is little-endian. In order to handle GCC's @@ -31275,7 +31275,7 @@ arm_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel) /* Implement TARGET_VECTORIZE_VEC_PERM_CONST_OK. */ static bool -arm_vectorize_vec_perm_const_ok (enum machine_mode vmode, +arm_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel) { struct expand_vec_perm_d d; @@ -31316,7 +31316,7 @@ arm_vectorize_vec_perm_const_ok (enum machine_mode vmode, } bool -arm_autoinc_modes_ok_p (enum machine_mode mode, enum arm_auto_incmodes code) +arm_autoinc_modes_ok_p (machine_mode mode, enum arm_auto_incmodes code) { /* If we are soft float and we do not have ldrd then all auto increment forms are ok. */ @@ -31620,7 +31620,7 @@ arm_validize_comparison (rtx *comparison, rtx * op1, rtx * op2) { enum rtx_code code = GET_CODE (*comparison); int code_int; - enum machine_mode mode = (GET_MODE (*op1) == VOIDmode) + machine_mode mode = (GET_MODE (*op1) == VOIDmode) ? GET_MODE (*op2) : GET_MODE (*op1); gcc_assert (GET_MODE (*op1) != VOIDmode || GET_MODE (*op2) != VOIDmode); @@ -31722,7 +31722,7 @@ arm_block_set_non_vect_profit_p (rtx val, static bool arm_block_set_vect_profit_p (unsigned HOST_WIDE_INT length, unsigned HOST_WIDE_INT align, - enum machine_mode mode) + machine_mode mode) { int num; bool unaligned_p = ((align & 3) != 0); @@ -31760,7 +31760,7 @@ arm_block_set_unaligned_vect (rtx dstbase, rtx val_elt, val_vec, reg; rtx rval[MAX_VECT_LEN]; rtx (*gen_func) (rtx, rtx); - enum machine_mode mode; + machine_mode mode; unsigned HOST_WIDE_INT v = value; gcc_assert ((align & 0x3) != 0); @@ -31851,7 +31851,7 @@ arm_block_set_aligned_vect (rtx dstbase, rtx dst, addr, mem; rtx val_elt, val_vec, reg; rtx rval[MAX_VECT_LEN]; - enum machine_mode mode; + machine_mode mode; unsigned HOST_WIDE_INT v = value; gcc_assert ((align & 0x3) == 0); @@ -31962,7 +31962,7 @@ arm_block_set_unaligned_non_vect (rtx dstbase, unsigned int i; rtx dst, addr, mem; rtx val_exp, val_reg, reg; - enum machine_mode mode; + machine_mode mode; HOST_WIDE_INT v = value; gcc_assert (align == 1 || align == 2); diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h index 5b54a65..02d0a93 100644 --- a/gcc/config/arm/arm.h +++ b/gcc/config/arm/arm.h @@ -29,14 +29,14 @@ #ifndef GCC_ARM_H #define GCC_ARM_H -/* We can't use enum machine_mode inside a generator file because it +/* We can't use machine_mode inside a generator file because it hasn't been created yet; we shouldn't be using any code that needs the real definition though, so this ought to be safe. */ #ifdef GENERATOR_FILE #define MACHMODE int #else #include "insn-modes.h" -#define MACHMODE enum machine_mode +#define MACHMODE machine_mode #endif #include "config/vxworks-dummy.h" @@ -1547,7 +1547,7 @@ typedef struct GTY(()) machine_function rtx thumb1_cc_op0; rtx thumb1_cc_op1; /* Also record the CC mode that is supported. */ - enum machine_mode thumb1_cc_mode; + machine_mode thumb1_cc_mode; /* Set to 1 after arm_reorg has started. */ int after_arm_reorg; } diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index 2e7b079..8106943 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3538,7 +3538,7 @@ (set (match_dup 0) (match_dup 6)))] { - enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), + machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2], operands[3]); enum rtx_code rc = minmax_code (operands[4]); operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, @@ -4876,7 +4876,7 @@ [(set (match_dup 0) (match_dup 1))] { rtx lo_part = gen_lowpart (SImode, operands[0]); - enum machine_mode src_mode = GET_MODE (operands[1]); + machine_mode src_mode = GET_MODE (operands[1]); if (REG_P (operands[0]) && !reg_overlap_mentioned_p (operands[0], operands[1])) @@ -4902,7 +4902,7 @@ [(set (match_dup 0) (ashiftrt:SI (match_dup 1) (const_int 31)))] { rtx lo_part = gen_lowpart (SImode, operands[0]); - enum machine_mode src_mode = GET_MODE (operands[1]); + machine_mode src_mode = GET_MODE (operands[1]); if (REG_P (operands[0]) && !reg_overlap_mentioned_p (operands[0], operands[1])) @@ -7453,7 +7453,7 @@ [(const_int 0)] { enum rtx_code rev_code; - enum machine_mode mode; + machine_mode mode; rtx rev_cond; emit_insn (gen_rtx_COND_EXEC (VOIDmode, @@ -8383,7 +8383,7 @@ (cond_exec (match_dup 4) (set (match_dup 0) (and:SI (match_dup 3) (const_int 1))))] { - enum machine_mode mode = GET_MODE (operands[2]); + machine_mode mode = GET_MODE (operands[2]); enum rtx_code rc = GET_CODE (operands[1]); /* Note that operands[4] is the same as operands[1], @@ -8417,7 +8417,7 @@ (cond_exec (match_dup 4) (set (match_dup 0) (ior:SI (match_dup 3) (const_int 1))))] { - enum machine_mode mode = GET_MODE (operands[2]); + machine_mode mode = GET_MODE (operands[2]); enum rtx_code rc = GET_CODE (operands[1]); /* Note that operands[4] is the same as operands[1], @@ -8521,7 +8521,7 @@ (cond_exec (match_dup 5) (set (match_dup 0) (const_int 1)))] { rtx tmp1; - enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), + machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2], operands[3]); enum rtx_code rc = GET_CODE (operands[1]); @@ -9325,7 +9325,7 @@ (set (match_dup 0) (match_dup 2)))] " { - enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[5]), + machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[5]), operands[3], operands[4]); enum rtx_code rc = GET_CODE (operands[5]); operands[6] = gen_rtx_REG (mode, CC_REGNUM); @@ -10221,7 +10221,7 @@ (set (match_dup 0) (match_dup 4)))] " { - enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), + machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2], operands[3]); enum rtx_code rc = GET_CODE (operands[1]); @@ -10249,7 +10249,7 @@ (set (match_dup 0) (match_dup 4)))] " { - enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), + machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2], operands[3]); operands[5] = gen_rtx_REG (mode, CC_REGNUM); @@ -10272,7 +10272,7 @@ (set (match_dup 0) (match_dup 5)))] " { - enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), + machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2], operands[3]); enum rtx_code rc = GET_CODE (operands[1]); @@ -10304,7 +10304,7 @@ (set (match_dup 0) (not:SI (match_dup 5))))] " { - enum machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), + machine_mode mode = SELECT_CC_MODE (GET_CODE (operands[1]), operands[2], operands[3]); enum rtx_code rc = GET_CODE (operands[1]); diff --git a/gcc/config/arm/neon.md b/gcc/config/arm/neon.md index 41cf913..a0ec446 100644 --- a/gcc/config/arm/neon.md +++ b/gcc/config/arm/neon.md @@ -1210,7 +1210,7 @@ rtx zero_reg; HOST_WIDE_INT num_bits = INTVAL (operands[2]); const int width = GET_MODE_BITSIZE (<MODE>mode); - const enum machine_mode bvecmode = (width == 128) ? V16QImode : V8QImode; + const machine_mode bvecmode = (width == 128) ? V16QImode : V8QImode; rtx (*gen_ext) (rtx, rtx, rtx, rtx) = (width == 128) ? gen_neon_vextv16qi : gen_neon_vextv8qi; @@ -1238,7 +1238,7 @@ rtx zero_reg; HOST_WIDE_INT num_bits = INTVAL (operands[2]); const int width = GET_MODE_BITSIZE (<MODE>mode); - const enum machine_mode bvecmode = (width == 128) ? V16QImode : V8QImode; + const machine_mode bvecmode = (width == 128) ? V16QImode : V8QImode; rtx (*gen_ext) (rtx, rtx, rtx, rtx) = (width == 128) ? gen_neon_vextv16qi : gen_neon_vextv8qi; diff --git a/gcc/config/arm/thumb2.md b/gcc/config/arm/thumb2.md index 983b59d..64acfea 100644 --- a/gcc/config/arm/thumb2.md +++ b/gcc/config/arm/thumb2.md @@ -416,7 +416,7 @@ (const_int 0)))] { operands[3] = GEN_INT (~0); - enum machine_mode mode = GET_MODE (operands[2]); + machine_mode mode = GET_MODE (operands[2]); enum rtx_code rc = GET_CODE (operands[1]); if (mode == CCFPmode || mode == CCFPEmode) @@ -503,7 +503,7 @@ [(const_int 0)] { enum rtx_code rev_code; - enum machine_mode mode; + machine_mode mode; rtx rev_cond; emit_insn (gen_rtx_COND_EXEC (VOIDmode, @@ -595,7 +595,7 @@ (and:SI (match_dup 3) (const_int 1))) (cond_exec (match_dup 4) (set (match_dup 0) (const_int 0)))] { - enum machine_mode mode = GET_MODE (operands[2]); + machine_mode mode = GET_MODE (operands[2]); enum rtx_code rc = GET_CODE (operands[1]); if (mode == CCFPmode || mode == CCFPEmode) @@ -627,7 +627,7 @@ (cond_exec (match_dup 4) (set (match_dup 0) (ior:SI (match_dup 3) (const_int 1))))] { - enum machine_mode mode = GET_MODE (operands[2]); + machine_mode mode = GET_MODE (operands[2]); enum rtx_code rc = GET_CODE (operands[1]); operands[4] = gen_rtx_fmt_ee (rc, VOIDmode, operands[2], const0_rtx); @@ -891,7 +891,7 @@ { /* Emit: cmp\\t%1, %2\;mvn\\t%0, #0\;it\\t%D3\;mov%D3\\t%0, #0\;*/ enum rtx_code rc = reverse_condition (GET_CODE (operands[3])); - enum machine_mode mode = SELECT_CC_MODE (rc, operands[1], operands[2]); + machine_mode mode = SELECT_CC_MODE (rc, operands[1], operands[2]); rtx tmp1 = gen_rtx_REG (mode, CC_REGNUM); emit_insn (gen_rtx_SET (VOIDmode, diff --git a/gcc/config/avr/avr-log.c b/gcc/config/avr/avr-log.c index 0b073d7..68d5cbe 100644 --- a/gcc/config/avr/avr-log.c +++ b/gcc/config/avr/avr-log.c @@ -53,7 +53,7 @@ t: tree T: tree (brief) C: enum rtx_code - m: enum machine_mode + m: machine_mode R: enum reg_class L: insn list H: location_t @@ -238,7 +238,7 @@ avr_log_vadump (FILE *file, const char *fmt, va_list ap) break; case 'm': - fputs (GET_MODE_NAME ((enum machine_mode) va_arg (ap, int)), + fputs (GET_MODE_NAME ((machine_mode) va_arg (ap, int)), file); break; diff --git a/gcc/config/avr/avr-protos.h b/gcc/config/avr/avr-protos.h index 62c2055..8a0e2bd 100644 --- a/gcc/config/avr/avr-protos.h +++ b/gcc/config/avr/avr-protos.h @@ -45,8 +45,8 @@ extern void avr_init_cumulative_args (CUMULATIVE_ARGS*, tree, rtx, tree); #endif /* TREE_CODE */ #ifdef RTX_CODE -extern int avr_hard_regno_call_part_clobbered (unsigned, enum machine_mode); -extern bool tiny_valid_direct_memory_access_range(rtx, enum machine_mode); +extern int avr_hard_regno_call_part_clobbered (unsigned, machine_mode); +extern bool tiny_valid_direct_memory_access_range(rtx, machine_mode); extern const char *output_movqi (rtx_insn *insn, rtx operands[], int *l); extern const char *output_movhi (rtx_insn *insn, rtx operands[], int *l); extern const char *output_movsisf (rtx_insn *insn, rtx operands[], int *l); @@ -111,22 +111,22 @@ extern int avr_jump_mode (rtx x, rtx_insn *insn); extern int test_hard_reg_class (enum reg_class rclass, rtx x); extern int jump_over_one_insn_p (rtx_insn *insn, rtx dest); -extern int avr_hard_regno_mode_ok (int regno, enum machine_mode mode); +extern int avr_hard_regno_mode_ok (int regno, machine_mode mode); extern void avr_final_prescan_insn (rtx_insn *insn, rtx *operand, int num_operands); -extern int avr_simplify_comparison_p (enum machine_mode mode, +extern int avr_simplify_comparison_p (machine_mode mode, RTX_CODE op, rtx x); extern RTX_CODE avr_normalize_condition (RTX_CODE condition); extern void out_shift_with_cnt (const char *templ, rtx_insn *insn, rtx operands[], int *len, int t_len); -extern enum reg_class avr_mode_code_base_reg_class (enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE); -extern bool avr_regno_mode_code_ok_for_base_p (int, enum machine_mode, addr_space_t, RTX_CODE, RTX_CODE); +extern enum reg_class avr_mode_code_base_reg_class (machine_mode, addr_space_t, RTX_CODE, RTX_CODE); +extern bool avr_regno_mode_code_ok_for_base_p (int, machine_mode, addr_space_t, RTX_CODE, RTX_CODE); extern rtx avr_incoming_return_addr_rtx (void); -extern rtx avr_legitimize_reload_address (rtx*, enum machine_mode, int, int, int, int, rtx (*)(rtx,int)); +extern rtx avr_legitimize_reload_address (rtx*, machine_mode, int, int, int, int, rtx (*)(rtx,int)); extern bool avr_mem_flash_p (rtx); extern bool avr_mem_memx_p (rtx); extern bool avr_load_libgcc_p (rtx); -extern bool avr_xload_libgcc_p (enum machine_mode); +extern bool avr_xload_libgcc_p (machine_mode); extern rtx avr_eval_addr_attrib (rtx x); extern rtx lpm_reg_rtx; diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 37c4551..bbd8644 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -161,8 +161,8 @@ static int get_sequence_length (rtx_insn *insns); static int sequent_regs_live (void); static const char *ptrreg_to_str (int); static const char *cond_string (enum rtx_code); -static int avr_num_arg_regs (enum machine_mode, const_tree); -static int avr_operand_rtx_cost (rtx, enum machine_mode, enum rtx_code, +static int avr_num_arg_regs (machine_mode, const_tree); +static int avr_operand_rtx_cost (rtx, machine_mode, enum rtx_code, int, bool); static void output_reload_in_const (rtx*, rtx, int*, bool); static struct machine_function * avr_init_machine_status (void); @@ -283,7 +283,7 @@ avr_popcount_each_byte (rtx xval, int n_bytes, int pop_mask) { int i; - enum machine_mode mode = GET_MODE (xval); + machine_mode mode = GET_MODE (xval); if (VOIDmode == mode) mode = SImode; @@ -307,7 +307,7 @@ avr_popcount_each_byte (rtx xval, int n_bytes, int pop_mask) rtx avr_to_int_mode (rtx x) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); return VOIDmode == mode ? x @@ -480,7 +480,7 @@ avr_regno_reg_class (int r) /* Implement `TARGET_SCALAR_MODE_SUPPORTED_P'. */ static bool -avr_scalar_mode_supported_p (enum machine_mode mode) +avr_scalar_mode_supported_p (machine_mode mode) { if (ALL_FIXED_POINT_MODE_P (mode)) return true; @@ -832,7 +832,7 @@ avr_initial_elimination_offset (int from, int to) /* Helper for the function below. */ static void -avr_adjust_type_node (tree *node, enum machine_mode mode, int sat_p) +avr_adjust_type_node (tree *node, machine_mode mode, int sat_p) { *node = make_node (FIXED_POINT_TYPE); TYPE_SATURATING (*node) = sat_p; @@ -1749,7 +1749,7 @@ avr_reg_ok_for_addr_p (rtx reg, addr_space_t as, machine for a memory operand of mode MODE. */ static bool -avr_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +avr_legitimate_address_p (machine_mode mode, rtx x, bool strict) { bool ok = CONSTANT_ADDRESS_P (x); @@ -1839,7 +1839,7 @@ avr_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) memory address for an operand of mode MODE */ static rtx -avr_legitimize_address (rtx x, rtx oldx, enum machine_mode mode) +avr_legitimize_address (rtx x, rtx oldx, machine_mode mode) { bool big_offset_p = false; @@ -1880,7 +1880,7 @@ avr_legitimize_address (rtx x, rtx oldx, enum machine_mode mode) than 63 bytes or for R++ or --R addressing. */ rtx -avr_legitimize_reload_address (rtx *px, enum machine_mode mode, +avr_legitimize_reload_address (rtx *px, machine_mode mode, int opnum, int type, int addr_type, int ind_levels ATTRIBUTE_UNUSED, rtx (*mk_memloc)(rtx,int)) @@ -1962,7 +1962,7 @@ avr_legitimize_reload_address (rtx *px, enum machine_mode mode, static reg_class_t avr_secondary_reload (bool in_p, rtx x, reg_class_t reload_class ATTRIBUTE_UNUSED, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { if (in_p && MEM_P (x) @@ -2621,7 +2621,7 @@ avr_final_prescan_insn (rtx_insn *insn, rtx *operand ATTRIBUTE_UNUSED, /* Return 0 if undefined, 1 if always true or always false. */ int -avr_simplify_comparison_p (enum machine_mode mode, RTX_CODE op, rtx x) +avr_simplify_comparison_p (machine_mode mode, RTX_CODE op, rtx x) { unsigned int max = (mode == QImode ? 0xff : mode == HImode ? 0xffff : @@ -2672,7 +2672,7 @@ avr_init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, rtx libname, /* Returns the number of registers to allocate for a function argument. */ static int -avr_num_arg_regs (enum machine_mode mode, const_tree type) +avr_num_arg_regs (machine_mode mode, const_tree type) { int size; @@ -2693,7 +2693,7 @@ avr_num_arg_regs (enum machine_mode mode, const_tree type) in a register, and which register. */ static rtx -avr_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +avr_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -2711,7 +2711,7 @@ avr_function_arg (cumulative_args_t cum_v, enum machine_mode mode, in the argument list. */ static void -avr_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +avr_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -2827,7 +2827,7 @@ avr_function_ok_for_sibcall (tree decl_callee, tree exp_callee) bool avr_load_libgcc_p (rtx op) { - enum machine_mode mode = GET_MODE (op); + machine_mode mode = GET_MODE (op); int n_bytes = GET_MODE_SIZE (mode); return (n_bytes > 2 @@ -2838,7 +2838,7 @@ avr_load_libgcc_p (rtx op) /* Return true if a value of mode MODE is read by __xload_* function. */ bool -avr_xload_libgcc_p (enum machine_mode mode) +avr_xload_libgcc_p (machine_mode mode) { int n_bytes = GET_MODE_SIZE (mode); @@ -3204,7 +3204,7 @@ avr_out_xload (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen) IN / OUT instruction will be generated. */ bool -tiny_valid_direct_memory_access_range (rtx op, enum machine_mode mode) +tiny_valid_direct_memory_access_range (rtx op, machine_mode mode) { rtx x; @@ -5218,7 +5218,7 @@ avr_out_compare (rtx_insn *insn, rtx *xop, int *plen) rtx xval = xop[1]; /* MODE of the comparison. */ - enum machine_mode mode; + machine_mode mode; /* Number of bytes to operate on. */ int i, n_bytes = GET_MODE_SIZE (GET_MODE (xreg)); @@ -7007,10 +7007,10 @@ avr_out_plus_1 (rtx *xop, int *plen, enum rtx_code code, int *pcc, enum rtx_code code_sat, int sign, bool out_label) { /* MODE of the operation. */ - enum machine_mode mode = GET_MODE (xop[0]); + machine_mode mode = GET_MODE (xop[0]); /* INT_MODE of the same size. */ - enum machine_mode imode = int_mode_for_mode (mode); + machine_mode imode = int_mode_for_mode (mode); /* Number of bytes to operate on. */ int i, n_bytes = GET_MODE_SIZE (mode); @@ -7461,7 +7461,7 @@ avr_out_plus_1 (rtx *xop, int *plen, enum rtx_code code, int *pcc, static const char* avr_out_plus_symbol (rtx *xop, enum rtx_code code, int *plen, int *pcc) { - enum machine_mode mode = GET_MODE (xop[0]); + machine_mode mode = GET_MODE (xop[0]); /* Only pointer modes want to add symbols. */ @@ -7512,8 +7512,8 @@ avr_out_plus (rtx insn, rtx *xop, int *plen, int *pcc, bool out_label) rtx op[4]; rtx xpattern = INSN_P (insn) ? single_set (as_a <rtx_insn *> (insn)) : insn; rtx xdest = SET_DEST (xpattern); - enum machine_mode mode = GET_MODE (xdest); - enum machine_mode imode = int_mode_for_mode (mode); + machine_mode mode = GET_MODE (xdest); + machine_mode imode = int_mode_for_mode (mode); int n_bytes = GET_MODE_SIZE (mode); enum rtx_code code_sat = GET_CODE (SET_SRC (xpattern)); enum rtx_code code @@ -7607,7 +7607,7 @@ avr_out_bitop (rtx insn, rtx *xop, int *plen) /* CODE and MODE of the operation. */ rtx xpattern = INSN_P (insn) ? single_set (as_a <rtx_insn *> (insn)) : insn; enum rtx_code code = GET_CODE (SET_SRC (xpattern)); - enum machine_mode mode = GET_MODE (xop[0]); + machine_mode mode = GET_MODE (xop[0]); /* Number of bytes to operate on. */ int i, n_bytes = GET_MODE_SIZE (mode); @@ -7884,7 +7884,7 @@ avr_out_fract (rtx_insn *insn, rtx operands[], bool intsigned, int *plen) for (i = 0; i < sizeof (val) / sizeof (*val); i++) { - enum machine_mode mode; + machine_mode mode; xop[i] = operands[i]; @@ -8378,8 +8378,8 @@ avr_out_fract (rtx_insn *insn, rtx operands[], bool intsigned, int *plen) const char* avr_out_round (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *xop, int *plen) { - enum machine_mode mode = GET_MODE (xop[0]); - enum machine_mode imode = int_mode_for_mode (mode); + machine_mode mode = GET_MODE (xop[0]); + machine_mode imode = int_mode_for_mode (mode); // The smallest fractional bit not cleared by the rounding is 2^(-RP). int fbit = (int) GET_MODE_FBIT (mode); double_int i_add = double_int_zero.set_bit (fbit-1 - INTVAL (xop[2])); @@ -8440,14 +8440,14 @@ bool avr_rotate_bytes (rtx operands[]) { int i, j; - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); bool overlapped = reg_overlap_mentioned_p (operands[0], operands[1]); bool same_reg = rtx_equal_p (operands[0], operands[1]); int num = INTVAL (operands[2]); rtx scratch = operands[3]; /* Work out if byte or word move is needed. Odd byte rotates need QImode. Word move if no scratch is needed, otherwise use size of scratch. */ - enum machine_mode move_mode = QImode; + machine_mode move_mode = QImode; int move_size, offset, size; if (num & 0xf) @@ -9803,7 +9803,7 @@ avr_adjust_reg_alloc_order (void) /* Implement `TARGET_REGISTER_MOVE_COST' */ static int -avr_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +avr_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { return (from == STACK_REG ? 6 @@ -9815,7 +9815,7 @@ avr_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, /* Implement `TARGET_MEMORY_MOVE_COST' */ static int -avr_memory_move_cost (enum machine_mode mode, +avr_memory_move_cost (machine_mode mode, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -9833,7 +9833,7 @@ avr_memory_move_cost (enum machine_mode mode, operand's parent operator. */ static int -avr_operand_rtx_cost (rtx x, enum machine_mode mode, enum rtx_code outer, +avr_operand_rtx_cost (rtx x, machine_mode mode, enum rtx_code outer, int opno, bool speed) { enum rtx_code code = GET_CODE (x); @@ -9870,7 +9870,7 @@ avr_rtx_costs_1 (rtx x, int codearg, int outer_code ATTRIBUTE_UNUSED, int opno ATTRIBUTE_UNUSED, int *total, bool speed) { enum rtx_code code = (enum rtx_code) codearg; - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); HOST_WIDE_INT val; switch (code) @@ -10717,7 +10717,7 @@ avr_rtx_costs (rtx x, int codearg, int outer_code, /* Implement `TARGET_ADDRESS_COST'. */ static int -avr_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, +avr_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -10809,8 +10809,8 @@ avr_compare_pattern (rtx_insn *insn) && SET_DEST (pattern) == cc0_rtx && GET_CODE (SET_SRC (pattern)) == COMPARE) { - enum machine_mode mode0 = GET_MODE (XEXP (SET_SRC (pattern), 0)); - enum machine_mode mode1 = GET_MODE (XEXP (SET_SRC (pattern), 1)); + machine_mode mode0 = GET_MODE (XEXP (SET_SRC (pattern), 0)); + machine_mode mode1 = GET_MODE (XEXP (SET_SRC (pattern), 1)); /* The 64-bit comparisons have fixed operands ACC_A and ACC_B. They must not be swapped, thus skip them. */ @@ -11056,7 +11056,7 @@ avr_reorg (void) rtx x = XEXP (pattern, 1); rtx src = SET_SRC (pat); rtx t = XEXP (src,0); - enum machine_mode mode = GET_MODE (XEXP (pattern, 0)); + machine_mode mode = GET_MODE (XEXP (pattern, 0)); if (avr_simplify_comparison_p (mode, GET_CODE (t), x)) { @@ -11093,7 +11093,7 @@ avr_function_value_regno_p (const unsigned int regno) library function returns a value of mode MODE. */ static rtx -avr_libcall_value (enum machine_mode mode, +avr_libcall_value (machine_mode mode, const_rtx func ATTRIBUTE_UNUSED) { int offs = GET_MODE_SIZE (mode); @@ -11216,7 +11216,7 @@ jump_over_one_insn_p (rtx_insn *insn, rtx dest) (this way we don't have to check for odd registers everywhere). */ int -avr_hard_regno_mode_ok (int regno, enum machine_mode mode) +avr_hard_regno_mode_ok (int regno, machine_mode mode) { /* NOTE: 8-bit values must not be disallowed for R28 or R29. Disallowing QI et al. in these regs might lead to code like @@ -11249,7 +11249,7 @@ avr_hard_regno_mode_ok (int regno, enum machine_mode mode) /* Implement `HARD_REGNO_CALL_PART_CLOBBERED'. */ int -avr_hard_regno_call_part_clobbered (unsigned regno, enum machine_mode mode) +avr_hard_regno_call_part_clobbered (unsigned regno, machine_mode mode) { /* FIXME: This hook gets called with MODE:REGNO combinations that don't represent valid hard registers like, e.g. HI:29. Returning TRUE @@ -11271,7 +11271,7 @@ avr_hard_regno_call_part_clobbered (unsigned regno, enum machine_mode mode) /* Implement `MODE_CODE_BASE_REG_CLASS'. */ enum reg_class -avr_mode_code_base_reg_class (enum machine_mode mode ATTRIBUTE_UNUSED, +avr_mode_code_base_reg_class (machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as, RTX_CODE outer_code, RTX_CODE index_code ATTRIBUTE_UNUSED) { @@ -11291,7 +11291,7 @@ avr_mode_code_base_reg_class (enum machine_mode mode ATTRIBUTE_UNUSED, bool avr_regno_mode_code_ok_for_base_p (int regno, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, RTX_CODE outer_code, RTX_CODE index_code ATTRIBUTE_UNUSED) @@ -11376,7 +11376,7 @@ output_reload_in_const (rtx *op, rtx clobber_reg, int *len, bool clear_p) int clobber_val = 1234; bool cooked_clobber_p = false; bool set_p = false; - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); int n, n_bytes = GET_MODE_SIZE (mode); gcc_assert (REG_P (dest) @@ -11920,7 +11920,7 @@ avr_case_values_threshold (void) /* Implement `TARGET_ADDR_SPACE_ADDRESS_MODE'. */ -static enum machine_mode +static machine_mode avr_addr_space_address_mode (addr_space_t as) { return avr_addrspace[as].pointer_size == 3 ? PSImode : HImode; @@ -11929,7 +11929,7 @@ avr_addr_space_address_mode (addr_space_t as) /* Implement `TARGET_ADDR_SPACE_POINTER_MODE'. */ -static enum machine_mode +static machine_mode avr_addr_space_pointer_mode (addr_space_t as) { return avr_addr_space_address_mode (as); @@ -11963,7 +11963,7 @@ avr_reg_ok_for_pgm_addr (rtx reg, bool strict) /* Implement `TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P'. */ static bool -avr_addr_space_legitimate_address_p (enum machine_mode mode, rtx x, +avr_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool strict, addr_space_t as) { bool ok = false; @@ -12046,7 +12046,7 @@ avr_addr_space_legitimate_address_p (enum machine_mode mode, rtx x, static rtx avr_addr_space_legitimize_address (rtx x, rtx old_x, - enum machine_mode mode, addr_space_t as) + machine_mode mode, addr_space_t as) { if (ADDR_SPACE_GENERIC_P (as)) return avr_legitimize_address (x, old_x, mode); @@ -12213,7 +12213,7 @@ bool avr_emit_movmemhi (rtx *xop) { HOST_WIDE_INT count; - enum machine_mode loop_mode; + machine_mode loop_mode; addr_space_t as = MEM_ADDR_SPACE (xop[1]); rtx loop_reg, addr1, a_src, a_dest, insn, xas; rtx a_hi8 = NULL_RTX; @@ -12319,7 +12319,7 @@ const char* avr_out_movmem (rtx_insn *insn ATTRIBUTE_UNUSED, rtx *op, int *plen) { addr_space_t as = (addr_space_t) INTVAL (op[0]); - enum machine_mode loop_mode = GET_MODE (op[1]); + machine_mode loop_mode = GET_MODE (op[1]); bool sbiw_p = test_hard_reg_class (ADDW_REGS, op[1]); rtx xop[3]; @@ -13048,7 +13048,7 @@ avr_default_expand_builtin (enum insn_code icode, tree exp, rtx target) { rtx pat, xop[3]; int n, n_args = call_expr_nargs (exp); - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; gcc_assert (n_args >= 1 && n_args <= 3); @@ -13063,8 +13063,8 @@ avr_default_expand_builtin (enum insn_code icode, tree exp, rtx target) { tree arg = CALL_EXPR_ARG (exp, n); rtx op = expand_expr (arg, NULL_RTX, VOIDmode, EXPAND_NORMAL); - enum machine_mode opmode = GET_MODE (op); - enum machine_mode mode = insn_data[icode].operand[n+1].mode; + machine_mode opmode = GET_MODE (op); + machine_mode mode = insn_data[icode].operand[n+1].mode; if ((opmode == SImode || opmode == VOIDmode) && mode == HImode) { @@ -13112,7 +13112,7 @@ avr_default_expand_builtin (enum insn_code icode, tree exp, rtx target) static rtx avr_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); diff --git a/gcc/config/avr/avr.md b/gcc/config/avr/avr.md index c6c11cf..a2c3872 100644 --- a/gcc/config/avr/avr.md +++ b/gcc/config/avr/avr.md @@ -1075,7 +1075,7 @@ "" { rtx addr0; - enum machine_mode mode; + machine_mode mode; /* If value to set is not zero, use the library routine. */ if (operands[2] != const0_rtx) diff --git a/gcc/config/bfin/bfin-protos.h b/gcc/config/bfin/bfin-protos.h index f230a3a..14f5c36 100644 --- a/gcc/config/bfin/bfin-protos.h +++ b/gcc/config/bfin/bfin-protos.h @@ -71,24 +71,24 @@ extern char *bfin_asm_long (void); extern char *bfin_asm_short (void); extern int log2constp (unsigned HOST_WIDE_INT); -extern int hard_regno_mode_ok (int, enum machine_mode); +extern int hard_regno_mode_ok (int, machine_mode); extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx); extern HOST_WIDE_INT bfin_initial_elimination_offset (int, int); -extern int effective_address_32bit_p (rtx, enum machine_mode); +extern int effective_address_32bit_p (rtx, machine_mode); extern int symbolic_reference_mentioned_p (rtx); -extern rtx bfin_gen_compare (rtx, enum machine_mode); -extern bool expand_move (rtx *, enum machine_mode); +extern rtx bfin_gen_compare (rtx, machine_mode); +extern bool expand_move (rtx *, machine_mode); extern void bfin_expand_call (rtx, rtx, rtx, rtx, int); extern bool bfin_longcall_p (rtx, int); extern bool bfin_dsp_memref_p (rtx); extern bool bfin_expand_movmem (rtx, rtx, rtx, rtx); extern enum reg_class secondary_input_reload_class (enum reg_class, - enum machine_mode, + machine_mode, rtx); extern enum reg_class secondary_output_reload_class (enum reg_class, - enum machine_mode, + machine_mode, rtx); extern char *section_asm_op_1 (SECT_ENUM_T); extern char *section_asm_op (SECT_ENUM_T); @@ -96,9 +96,9 @@ extern void print_operand (FILE *, rtx, char); extern void print_address_operand (FILE *, rtx); extern void split_di (rtx [], int, rtx [], rtx []); extern int split_load_immediate (rtx []); -extern void emit_pic_move (rtx *, enum machine_mode); +extern void emit_pic_move (rtx *, machine_mode); extern void asm_conditional_branch (rtx_insn *, rtx *, int, int); -extern rtx bfin_gen_compare (rtx, enum machine_mode); +extern rtx bfin_gen_compare (rtx, machine_mode); extern unsigned bfin_local_alignment (tree, unsigned); extern rtx bfin_va_arg (tree, tree); diff --git a/gcc/config/bfin/bfin.c b/gcc/config/bfin/bfin.c index 2906644..4c9ce57 100644 --- a/gcc/config/bfin/bfin.c +++ b/gcc/config/bfin/bfin.c @@ -582,7 +582,7 @@ expand_epilogue_reg_restore (rtx spreg, bool saveall, bool is_inthandler) static void setup_incoming_varargs (cumulative_args_t cum, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, tree type ATTRIBUTE_UNUSED, int *pretend_size, int no_rtl) { @@ -1256,7 +1256,7 @@ bfin_delegitimize_address (rtx orig_x) 32-bit instruction. */ int -effective_address_32bit_p (rtx op, enum machine_mode mode) +effective_address_32bit_p (rtx op, machine_mode mode) { HOST_WIDE_INT offset; @@ -1310,7 +1310,7 @@ bfin_dsp_memref_p (rtx x) static int bfin_address_cost (rtx addr ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -1358,7 +1358,7 @@ print_address_operand (FILE *file, rtx x) void print_operand (FILE *file, rtx x, char code) { - enum machine_mode mode; + machine_mode mode; if (code == '!') { @@ -1673,7 +1673,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, (TYPE is null for libcalls where that information may not be available.) */ static void -bfin_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +bfin_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1713,7 +1713,7 @@ bfin_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, (otherwise it is an extra parameter matching an ellipsis). */ static rtx -bfin_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +bfin_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1743,7 +1743,7 @@ bfin_function_arg (cumulative_args_t cum_v, enum machine_mode mode, stack. */ static int -bfin_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode, +bfin_arg_partial_bytes (cumulative_args_t cum, machine_mode mode, tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1765,7 +1765,7 @@ bfin_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode, static bool bfin_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type, bool named ATTRIBUTE_UNUSED) { return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST; @@ -1930,7 +1930,7 @@ bfin_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) /* Emit insns to move operands[1] into operands[0]. */ void -emit_pic_move (rtx *operands, enum machine_mode mode ATTRIBUTE_UNUSED) +emit_pic_move (rtx *operands, machine_mode mode ATTRIBUTE_UNUSED) { rtx temp = reload_in_progress ? operands[0] : gen_reg_rtx (Pmode); @@ -1948,7 +1948,7 @@ emit_pic_move (rtx *operands, enum machine_mode mode ATTRIBUTE_UNUSED) should generate an insn to move OPERANDS[1] to OPERANDS[0]. */ bool -expand_move (rtx *operands, enum machine_mode mode) +expand_move (rtx *operands, machine_mode mode) { rtx op = operands[1]; if ((TARGET_ID_SHARED_LIBRARY || TARGET_FDPIC) @@ -2139,7 +2139,7 @@ bfin_expand_call (rtx retval, rtx fnaddr, rtx callarg1, rtx cookie, int sibcall) /* Return 1 if hard register REGNO can hold a value of machine-mode MODE. */ int -hard_regno_mode_ok (int regno, enum machine_mode mode) +hard_regno_mode_ok (int regno, machine_mode mode) { /* Allow only dregs to store value of mode HI or QI */ enum reg_class rclass = REGNO_REG_CLASS (regno); @@ -2169,7 +2169,7 @@ hard_regno_mode_ok (int regno, enum machine_mode mode) /* Implements target hook vector_mode_supported_p. */ static bool -bfin_vector_mode_supported_p (enum machine_mode mode) +bfin_vector_mode_supported_p (machine_mode mode) { return mode == V2HImode; } @@ -2177,7 +2177,7 @@ bfin_vector_mode_supported_p (enum machine_mode mode) /* Worker function for TARGET_REGISTER_MOVE_COST. */ static int -bfin_register_move_cost (enum machine_mode mode, +bfin_register_move_cost (machine_mode mode, reg_class_t class1, reg_class_t class2) { /* These need secondary reloads, so they're more expensive. */ @@ -2208,7 +2208,7 @@ bfin_register_move_cost (enum machine_mode mode, program; it'll make the costs more accurate. */ static int -bfin_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +bfin_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t rclass, bool in ATTRIBUTE_UNUSED) { @@ -2227,7 +2227,7 @@ bfin_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, static reg_class_t bfin_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { /* If we have HImode or QImode, we can only use DREGS as secondary registers; in most other cases we can also use PREGS. */ @@ -2511,7 +2511,7 @@ asm_conditional_branch (rtx_insn *insn, rtx *operands, int n_nops, int predict_t stored in bfin_compare_op0 and bfin_compare_op1 already. */ rtx -bfin_gen_compare (rtx cmp, enum machine_mode mode ATTRIBUTE_UNUSED) +bfin_gen_compare (rtx cmp, machine_mode mode ATTRIBUTE_UNUSED) { enum rtx_code code1, code2; rtx op0 = XEXP (cmp, 0), op1 = XEXP (cmp, 1); @@ -2681,7 +2681,7 @@ split_load_immediate (rtx operands[]) MODE. Return false if not. */ static bool -bfin_valid_add (enum machine_mode mode, HOST_WIDE_INT value) +bfin_valid_add (machine_mode mode, HOST_WIDE_INT value) { unsigned HOST_WIDE_INT v = value > 0 ? value : -value; int sz = GET_MODE_SIZE (mode); @@ -2694,7 +2694,7 @@ bfin_valid_add (enum machine_mode mode, HOST_WIDE_INT value) } static bool -bfin_valid_reg_p (unsigned int regno, int strict, enum machine_mode mode, +bfin_valid_reg_p (unsigned int regno, int strict, machine_mode mode, enum rtx_code outer_code) { if (strict) @@ -2722,7 +2722,7 @@ bfin_valid_reg_p (unsigned int regno, int strict, enum machine_mode mode, */ static bool -bfin_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +bfin_legitimate_address_p (machine_mode mode, rtx x, bool strict) { switch (GET_CODE (x)) { case REG: @@ -2761,7 +2761,7 @@ bfin_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) another way. */ static bool -bfin_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, +bfin_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED) { /* We have only one class of non-legitimate constants, and our movsi @@ -2777,7 +2777,7 @@ bfin_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, crossing section boundaries. */ static bool -bfin_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +bfin_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { rtx sym; HOST_WIDE_INT offset; @@ -3196,7 +3196,7 @@ output_pop_multiple (rtx insn, rtx *operands) /* Adjust DST and SRC by OFFSET bytes, and generate one move in mode MODE. */ static void -single_move_for_movmem (rtx dst, rtx src, enum machine_mode mode, HOST_WIDE_INT offset) +single_move_for_movmem (rtx dst, rtx src, machine_mode mode, HOST_WIDE_INT offset) { rtx scratch = gen_reg_rtx (mode); rtx srcmem, dstmem; @@ -5348,7 +5348,7 @@ static const struct builtin_description bdesc_1arg[] = where we expect a vector. To avoid crashing, use one of the vector clear instructions. */ static rtx -safe_vector_operand (rtx x, enum machine_mode mode) +safe_vector_operand (rtx x, machine_mode mode) { if (x != const0_rtx) return x; @@ -5370,11 +5370,11 @@ bfin_expand_binop_builtin (enum insn_code icode, tree exp, rtx target, tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode op0mode = GET_MODE (op0); - enum machine_mode op1mode = GET_MODE (op1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode op0mode = GET_MODE (op0); + machine_mode op1mode = GET_MODE (op1); + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; if (VECTOR_MODE_P (mode0)) op0 = safe_vector_operand (op0, mode0); @@ -5426,9 +5426,9 @@ bfin_expand_unop_builtin (enum insn_code icode, tree exp, rtx pat; tree arg0 = CALL_EXPR_ARG (exp, 0); rtx op0 = expand_normal (arg0); - enum machine_mode op0mode = GET_MODE (op0); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode op0mode = GET_MODE (op0); + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; if (! target || GET_MODE (target) != tmode @@ -5464,7 +5464,7 @@ bfin_expand_unop_builtin (enum insn_code icode, tree exp, static rtx bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { size_t i; @@ -5474,7 +5474,7 @@ bfin_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, unsigned int fcode = DECL_FUNCTION_CODE (fndecl); tree arg0, arg1, arg2; rtx op0, op1, op2, accvec, pat, tmp1, tmp2, a0reg, a1reg; - enum machine_mode tmode, mode0; + machine_mode tmode, mode0; switch (fcode) { diff --git a/gcc/config/c6x/c6x-protos.h b/gcc/config/c6x/c6x-protos.h index 78080da..5e58ee3 100644 --- a/gcc/config/c6x/c6x-protos.h +++ b/gcc/config/c6x/c6x-protos.h @@ -25,15 +25,15 @@ #ifdef RTX_CODE extern void c6x_init_cumulative_args (CUMULATIVE_ARGS *, const_tree, rtx, int); -extern bool c6x_block_reg_pad_upward (enum machine_mode, const_tree, bool); +extern bool c6x_block_reg_pad_upward (machine_mode, const_tree, bool); -extern bool c6x_legitimate_address_p_1 (enum machine_mode, rtx, bool, bool); +extern bool c6x_legitimate_address_p_1 (machine_mode, rtx, bool, bool); extern bool c6x_mem_operand (rtx, enum reg_class, bool); -extern bool expand_move (rtx *, enum machine_mode); +extern bool expand_move (rtx *, machine_mode); extern bool c6x_long_call_p (rtx); extern void c6x_expand_call (rtx, rtx, bool); -extern rtx c6x_expand_compare (rtx, enum machine_mode); +extern rtx c6x_expand_compare (rtx, machine_mode); extern bool c6x_force_op_for_comparison_p (enum rtx_code, rtx); extern bool c6x_expand_movmem (rtx, rtx, rtx, rtx, rtx, rtx); diff --git a/gcc/config/c6x/c6x.c b/gcc/config/c6x/c6x.c index 1b44baa..06319d0 100644 --- a/gcc/config/c6x/c6x.c +++ b/gcc/config/c6x/c6x.c @@ -517,7 +517,7 @@ c6x_init_cumulative_args (CUMULATIVE_ARGS *cum, const_tree fntype, rtx libname, /* Implements the macro FUNCTION_ARG defined in c6x.h. */ static rtx -c6x_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +c6x_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -543,7 +543,7 @@ c6x_function_arg (cumulative_args_t cum_v, enum machine_mode mode, static void c6x_function_arg_advance (cumulative_args_t cum_v, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -556,7 +556,7 @@ c6x_function_arg_advance (cumulative_args_t cum_v, upward rather than downward. */ bool -c6x_block_reg_pad_upward (enum machine_mode mode ATTRIBUTE_UNUSED, +c6x_block_reg_pad_upward (machine_mode mode ATTRIBUTE_UNUSED, const_tree type, bool first) { HOST_WIDE_INT size; @@ -574,7 +574,7 @@ c6x_block_reg_pad_upward (enum machine_mode mode ATTRIBUTE_UNUSED, /* Implement TARGET_FUNCTION_ARG_BOUNDARY. */ static unsigned int -c6x_function_arg_boundary (enum machine_mode mode, const_tree type) +c6x_function_arg_boundary (machine_mode mode, const_tree type) { unsigned int boundary = type ? TYPE_ALIGN (type) : GET_MODE_BITSIZE (mode); @@ -599,7 +599,7 @@ c6x_function_arg_boundary (enum machine_mode mode, const_tree type) /* Implement TARGET_FUNCTION_ARG_ROUND_BOUNDARY. */ static unsigned int -c6x_function_arg_round_boundary (enum machine_mode mode, const_tree type) +c6x_function_arg_round_boundary (machine_mode mode, const_tree type) { return c6x_function_arg_boundary (mode, type); } @@ -632,7 +632,7 @@ c6x_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED, /* Implement TARGET_LIBCALL_VALUE. */ static rtx -c6x_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +c6x_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, REG_A4); } @@ -658,7 +658,7 @@ c6x_function_value_regno_p (const unsigned int regno) static bool c6x_pass_by_reference (cumulative_args_t cum_v ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { int size = -1; @@ -694,7 +694,7 @@ c6x_return_in_msb (const_tree valtype) static bool c6x_callee_copies (cumulative_args_t cum_v ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -912,7 +912,7 @@ c6x_in_small_data_p (const_tree exp) everything sized 8 bytes or smaller into small data. */ static section * -c6x_select_rtx_section (enum machine_mode mode, rtx x, +c6x_select_rtx_section (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align) { if (c6x_sdata_mode == C6X_SDATA_ALL @@ -1110,7 +1110,7 @@ c6x_call_saved_register_used (tree call_expr) cumulative_args_t cum; HARD_REG_SET call_saved_regset; tree parameter; - enum machine_mode mode; + machine_mode mode; tree type; rtx parm_rtx; int i; @@ -1375,7 +1375,7 @@ legitimize_pic_address (rtx orig, rtx reg, rtx picreg) should generate an insn to move OPERANDS[1] to OPERANDS[0]. */ bool -expand_move (rtx *operands, enum machine_mode mode) +expand_move (rtx *operands, machine_mode mode) { rtx dest = operands[0]; rtx op = operands[1]; @@ -1438,14 +1438,14 @@ c6x_force_op_for_comparison_p (enum rtx_code code, rtx op) that should be used in the jump insn. */ rtx -c6x_expand_compare (rtx comparison, enum machine_mode mode) +c6x_expand_compare (rtx comparison, machine_mode mode) { enum rtx_code code = GET_CODE (comparison); rtx op0 = XEXP (comparison, 0); rtx op1 = XEXP (comparison, 1); rtx cmp; enum rtx_code jump_code = code; - enum machine_mode op_mode = GET_MODE (op0); + machine_mode op_mode = GET_MODE (op0); if (op_mode == DImode && (code == NE || code == EQ) && op1 == const0_rtx) { @@ -1642,7 +1642,7 @@ rtx c6x_subword (rtx op, bool high_p) { unsigned int byte; - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (op); if (mode == VOIDmode) @@ -1762,7 +1762,7 @@ c6x_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, while (count > 0) { rtx reg, reg_lowpart; - enum machine_mode srcmode, dstmode; + machine_mode srcmode, dstmode; unsigned HOST_WIDE_INT src_size, dst_size, src_left; int shift; rtx srcmem, dstmem; @@ -1852,7 +1852,7 @@ c6x_expand_movmem (rtx dst, rtx src, rtx count_exp, rtx align_exp, use the scaled form. */ static void -print_address_offset (FILE *file, rtx off, enum machine_mode mem_mode) +print_address_offset (FILE *file, rtx off, machine_mode mem_mode) { rtx pat; @@ -1891,7 +1891,7 @@ static void c6x_print_operand (FILE *, rtx, int); /* Subroutine of c6x_print_operand; used to print a memory reference X to FILE. */ static void -c6x_print_address_operand (FILE *file, rtx x, enum machine_mode mem_mode) +c6x_print_address_operand (FILE *file, rtx x, machine_mode mem_mode) { rtx off; switch (GET_CODE (x)) @@ -2107,7 +2107,7 @@ c6x_print_operand (FILE *file, rtx x, int code) int i; HOST_WIDE_INT v; tree t; - enum machine_mode mode; + machine_mode mode; if (code == '|') { @@ -2328,7 +2328,7 @@ c6x_print_operand (FILE *file, rtx x, int code) bool c6x_mem_operand (rtx op, enum reg_class c, bool small_offset) { - enum machine_mode mode = GET_MODE (op); + machine_mode mode = GET_MODE (op); rtx base = XEXP (op, 0); switch (GET_CODE (base)) { @@ -2372,7 +2372,7 @@ c6x_mem_operand (rtx op, enum reg_class c, bool small_offset) recursively examining an operand inside a PRE/POST_MODIFY. */ bool -c6x_legitimate_address_p_1 (enum machine_mode mode, rtx x, bool strict, +c6x_legitimate_address_p_1 (machine_mode mode, rtx x, bool strict, bool no_large_offset) { int size, size1; @@ -2480,13 +2480,13 @@ c6x_legitimate_address_p_1 (enum machine_mode mode, rtx x, bool strict, } static bool -c6x_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +c6x_legitimate_address_p (machine_mode mode, rtx x, bool strict) { return c6x_legitimate_address_p_1 (mode, x, strict, false); } static bool -c6x_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, +c6x_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED) { return true; @@ -2834,7 +2834,7 @@ c6x_expand_prologue (void) int idx = N_SAVE_ORDER - i - 1; unsigned regno = reg_save_order[idx]; rtx reg; - enum machine_mode save_mode = SImode; + machine_mode save_mode = SImode; if (regno == REG_A15 && frame_pointer_needed) /* Already saved. */ @@ -2926,7 +2926,7 @@ c6x_expand_epilogue (bool sibcall) { unsigned regno = reg_save_order[i]; rtx reg; - enum machine_mode save_mode = SImode; + machine_mode save_mode = SImode; if (!c6x_save_reg (regno)) continue; @@ -6236,7 +6236,7 @@ c6x_rtx_costs (rtx x, int code, int outer_code, int opno, int *total, /* Implements target hook vector_mode_supported_p. */ static bool -c6x_vector_mode_supported_p (enum machine_mode mode) +c6x_vector_mode_supported_p (machine_mode mode) { switch (mode) { @@ -6252,8 +6252,8 @@ c6x_vector_mode_supported_p (enum machine_mode mode) } /* Implements TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */ -static enum machine_mode -c6x_preferred_simd_mode (enum machine_mode mode) +static machine_mode +c6x_preferred_simd_mode (machine_mode mode) { switch (mode) { @@ -6270,7 +6270,7 @@ c6x_preferred_simd_mode (enum machine_mode mode) /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */ static bool -c6x_scalar_mode_supported_p (enum machine_mode mode) +c6x_scalar_mode_supported_p (machine_mode mode) { if (ALL_FIXED_POINT_MODE_P (mode) && GET_MODE_PRECISION (mode) <= 2 * BITS_PER_WORD) @@ -6550,7 +6550,7 @@ static const struct builtin_description bdesc_1arg[] = where we expect a vector. To avoid crashing, use one of the vector clear instructions. */ static rtx -safe_vector_operand (rtx x, enum machine_mode mode) +safe_vector_operand (rtx x, machine_mode mode) { if (x != const0_rtx) return x; @@ -6573,11 +6573,11 @@ c6x_expand_binop_builtin (enum insn_code icode, tree exp, rtx target, tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL); rtx op1 = expand_expr (arg1, NULL_RTX, VOIDmode, EXPAND_NORMAL); - enum machine_mode op0mode = GET_MODE (op0); - enum machine_mode op1mode = GET_MODE (op1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1 + offs].mode; - enum machine_mode mode1 = insn_data[icode].operand[2 + offs].mode; + machine_mode op0mode = GET_MODE (op0); + machine_mode op1mode = GET_MODE (op1); + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1 + offs].mode; + machine_mode mode1 = insn_data[icode].operand[2 + offs].mode; rtx ret = target; if (VECTOR_MODE_P (mode0)) @@ -6642,9 +6642,9 @@ c6x_expand_unop_builtin (enum insn_code icode, tree exp, rtx pat; tree arg0 = CALL_EXPR_ARG (exp, 0); rtx op0 = expand_expr (arg0, NULL_RTX, VOIDmode, EXPAND_NORMAL); - enum machine_mode op0mode = GET_MODE (op0); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode op0mode = GET_MODE (op0); + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; if (! target || GET_MODE (target) != tmode @@ -6680,7 +6680,7 @@ c6x_expand_unop_builtin (enum insn_code icode, tree exp, static rtx c6x_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { size_t i; diff --git a/gcc/config/c6x/c6x.md b/gcc/config/c6x/c6x.md index 53032b1..0567486 100644 --- a/gcc/config/c6x/c6x.md +++ b/gcc/config/c6x/c6x.md @@ -469,7 +469,7 @@ [(set (match_dup 2) (match_dup 3))] { unsigned HOST_WIDE_INT mask, val; - enum machine_mode inner_mode = GET_MODE_INNER (<MODE>mode); + machine_mode inner_mode = GET_MODE_INNER (<MODE>mode); int i; val = 0; @@ -505,7 +505,7 @@ unsigned HOST_WIDE_INT mask; unsigned HOST_WIDE_INT val[2]; rtx lo_half, hi_half; - enum machine_mode inner_mode = GET_MODE_INNER (<MODE>mode); + machine_mode inner_mode = GET_MODE_INNER (<MODE>mode); int i, j; split_di (operands, 1, &lo_half, &hi_half); diff --git a/gcc/config/cr16/cr16-protos.h b/gcc/config/cr16/cr16-protos.h index 80ea432..196b60e 100644 --- a/gcc/config/cr16/cr16-protos.h +++ b/gcc/config/cr16/cr16-protos.h @@ -23,7 +23,7 @@ /* Register usage. */ extern enum reg_class cr16_regno_reg_class (int); -extern int cr16_hard_regno_mode_ok (int regno, enum machine_mode); +extern int cr16_hard_regno_mode_ok (int regno, machine_mode); /* Passing function arguments. */ extern int cr16_function_arg_regno_p (int); @@ -79,7 +79,7 @@ extern enum cr16_addrtype cr16_decompose_address (rtx addr, bool treat_as_const); extern int cr16_const_double_ok (rtx op); extern int legitimate_pic_operand_p (rtx); -extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); +extern rtx legitimize_pic_address (rtx, machine_mode, rtx); /* Prologue/Epilogue functions. */ diff --git a/gcc/config/cr16/cr16.c b/gcc/config/cr16/cr16.c index 2928410..be7d663 100644 --- a/gcc/config/cr16/cr16.c +++ b/gcc/config/cr16/cr16.c @@ -479,7 +479,7 @@ cr16_regno_reg_class (int regno) /* Return 1 if hard register REGNO can hold a value of machine-mode MODE. */ int -cr16_hard_regno_mode_ok (int regno, enum machine_mode mode) +cr16_hard_regno_mode_ok (int regno, machine_mode mode) { if ((GET_MODE_SIZE (mode) >= 4) && (regno == 11)) return 0; @@ -528,7 +528,7 @@ cr16_function_value_regno_p (const unsigned int regno) /* Create an RTX representing the place where a library function returns a value of mode MODE. */ static rtx -cr16_libcall_value (enum machine_mode mode, +cr16_libcall_value (machine_mode mode, const_rtx func ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, cr16_ret_register ()); @@ -550,7 +550,7 @@ cr16_function_value (const_tree type, the number of registers needed else 0. */ static int enough_regs_for_param (CUMULATIVE_ARGS * cum, const_tree type, - enum machine_mode mode) + machine_mode mode) { int type_size; int remaining_size; @@ -574,7 +574,7 @@ enough_regs_for_param (CUMULATIVE_ARGS * cum, const_tree type, /* Implements the macro FUNCTION_ARG defined in cr16.h. */ static rtx -cr16_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +cr16_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -641,7 +641,7 @@ cr16_init_cumulative_args (CUMULATIVE_ARGS * cum, tree fntype, /* Implements the macro FUNCTION_ARG_ADVANCE defined in cr16.h. */ static void -cr16_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +cr16_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS * cum = get_cumulative_args (cum_v); @@ -1170,7 +1170,7 @@ legitimate_pic_operand_p (rtx x) NOTE: @BRO is added using unspec:BRO NOTE: @GOT is added using unspec:GOT. */ rtx -legitimize_pic_address (rtx orig, enum machine_mode mode ATTRIBUTE_UNUSED, +legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED, rtx reg) { /* First handle a simple SYMBOL_REF or LABEL_REF. */ @@ -1223,7 +1223,7 @@ legitimize_pic_address (rtx orig, enum machine_mode mode ATTRIBUTE_UNUSED, /* Implementation of TARGET_LEGITIMATE_ADDRESS_P. */ static bool -cr16_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, +cr16_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, rtx addr, bool strict) { enum cr16_addrtype addrtype; @@ -1302,7 +1302,7 @@ cr16_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, /* Return cost of the memory address x. */ static int -cr16_address_cost (rtx addr, enum machine_mode mode ATTRIBUTE_UNUSED, +cr16_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -1354,7 +1354,7 @@ cr16_address_cost (rtx addr, enum machine_mode mode ATTRIBUTE_UNUSED, /* Implement `TARGET_REGISTER_MOVE_COST'. */ static int -cr16_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +cr16_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from ATTRIBUTE_UNUSED, reg_class_t to) { return (to != GENERAL_REGS ? 8 : 2); @@ -1367,7 +1367,7 @@ cr16_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, nonzero if it is to be read in. This cost is relative to those in REGISTER_MOVE_COST. */ static int -cr16_memory_move_cost (enum machine_mode mode, +cr16_memory_move_cost (machine_mode mode, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -1819,7 +1819,7 @@ cr16_create_dwarf_for_multi_push (rtx insn) { rtx dwarf, reg, tmp; int i, j, from, to, word_cnt, dwarf_par_index, inc; - enum machine_mode mode; + machine_mode mode; int num_regs = 0, offset = 0, split_here = 0, total_push_bytes = 0; for (i = 0; i <= current_frame_info.last_reg_to_save; ++i) @@ -2061,7 +2061,7 @@ cr16_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) it should assign X (which will always be a C variable) a new value. */ static rtx cr16_legitimize_address (rtx x, rtx orig_x ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (flag_pic) return legitimize_pic_address (orig_x, mode, NULL_RTX); @@ -2075,7 +2075,7 @@ cr16_legitimize_address (rtx x, rtx orig_x ATTRIBUTE_UNUSED, satisfies CONSTANT_P. In cr16c treat legitimize float constant as an immediate operand. */ static bool -cr16_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, +cr16_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED) { return 1; @@ -2112,7 +2112,7 @@ notice_update_cc (rtx exp) return; } -static enum machine_mode +static machine_mode cr16_unwind_word_mode (void) { return SImode; diff --git a/gcc/config/cris/cris-protos.h b/gcc/config/cris/cris-protos.h index 5038660..3796d30 100644 --- a/gcc/config/cris/cris-protos.h +++ b/gcc/config/cris/cris-protos.h @@ -24,7 +24,7 @@ extern bool cris_simple_epilogue (void); #ifdef RTX_CODE extern const char *cris_op_str (rtx); extern void cris_notice_update_cc (rtx, rtx_insn *); -extern bool cris_reload_address_legitimized (rtx, enum machine_mode, int, int, int); +extern bool cris_reload_address_legitimized (rtx, machine_mode, int, int, int); extern int cris_side_effect_mode_ok (enum rtx_code, rtx *, int, int, int, int, int); extern bool cris_cc0_user_requires_cmp (rtx); @@ -33,13 +33,13 @@ extern rtx cris_split_movdx (rtx *); extern int cris_legitimate_pic_operand (rtx); extern enum cris_symbol_type cris_symbol_type_of (const_rtx); extern bool cris_valid_pic_const (const_rtx, bool); -extern bool cris_legitimate_constant_p (enum machine_mode, rtx); +extern bool cris_legitimate_constant_p (machine_mode, rtx); extern bool cris_constant_index_p (const_rtx); extern bool cris_base_p (const_rtx, bool); extern bool cris_base_or_autoincr_p (const_rtx, bool); extern bool cris_bdap_index_p (const_rtx, bool); extern bool cris_biap_index_p (const_rtx, bool); -extern bool cris_legitimate_address_p (enum machine_mode, rtx, bool); +extern bool cris_legitimate_address_p (machine_mode, rtx, bool); extern bool cris_store_multiple_op_p (rtx); extern bool cris_movem_load_rest_p (rtx, int); extern void cris_asm_output_symbol_ref (FILE *, rtx); diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c index d3673fd..bb2578c 100644 --- a/gcc/config/cris/cris.c +++ b/gcc/config/cris/cris.c @@ -109,10 +109,10 @@ static int in_code = 0; /* Fix for reg_overlap_mentioned_p. */ static int cris_reg_overlap_mentioned_p (rtx, rtx); -static enum machine_mode cris_promote_function_mode (const_tree, enum machine_mode, +static machine_mode cris_promote_function_mode (const_tree, machine_mode, int *, const_tree, int); -static unsigned int cris_atomic_align_for_mode (enum machine_mode); +static unsigned int cris_atomic_align_for_mode (machine_mode); static void cris_print_base (rtx, FILE *); @@ -124,7 +124,7 @@ static struct machine_function * cris_init_machine_status (void); static rtx cris_struct_value_rtx (tree, int); -static void cris_setup_incoming_varargs (cumulative_args_t, enum machine_mode, +static void cris_setup_incoming_varargs (cumulative_args_t, machine_mode, tree type, int *, int); static int cris_initial_frame_pointer_offset (void); @@ -151,22 +151,22 @@ static void cris_init_libfuncs (void); static reg_class_t cris_preferred_reload_class (rtx, reg_class_t); -static int cris_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); -static int cris_memory_move_cost (enum machine_mode, reg_class_t, bool); +static int cris_register_move_cost (machine_mode, reg_class_t, reg_class_t); +static int cris_memory_move_cost (machine_mode, reg_class_t, bool); static bool cris_rtx_costs (rtx, int, int, int, int *, bool); -static int cris_address_cost (rtx, enum machine_mode, addr_space_t, bool); -static bool cris_pass_by_reference (cumulative_args_t, enum machine_mode, +static int cris_address_cost (rtx, machine_mode, addr_space_t, bool); +static bool cris_pass_by_reference (cumulative_args_t, machine_mode, const_tree, bool); -static int cris_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static int cris_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static rtx cris_function_arg (cumulative_args_t, enum machine_mode, +static rtx cris_function_arg (cumulative_args_t, machine_mode, const_tree, bool); static rtx cris_function_incoming_arg (cumulative_args_t, - enum machine_mode, const_tree, bool); -static void cris_function_arg_advance (cumulative_args_t, enum machine_mode, + machine_mode, const_tree, bool); +static void cris_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); static tree cris_md_asm_clobbers (tree, tree, tree); -static bool cris_cannot_force_const_mem (enum machine_mode, rtx); +static bool cris_cannot_force_const_mem (machine_mode, rtx); static void cris_option_override (void); @@ -176,7 +176,7 @@ static void cris_asm_trampoline_template (FILE *); static void cris_trampoline_init (rtx, tree, rtx); static rtx cris_function_value(const_tree, const_tree, bool); -static rtx cris_libcall_value (enum machine_mode, const_rtx); +static rtx cris_libcall_value (machine_mode, const_rtx); static bool cris_function_value_regno_p (const unsigned int); static void cris_file_end (void); @@ -538,7 +538,7 @@ cris_cfun_uses_pic_table (void) can be reached as pc-relative as we can't tell when or how to do that. */ static bool -cris_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +cris_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { enum cris_symbol_type t = cris_symbol_type_of (x); @@ -1466,7 +1466,7 @@ cris_biap_index_p (const_rtx x, bool strict) symbol is valid for the plain "symbol + offset" case. */ bool -cris_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +cris_legitimate_address_p (machine_mode mode, rtx x, bool strict) { const_rtx x1, x2; @@ -1517,7 +1517,7 @@ cris_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) so don't bother; fix the documentation instead. */ bool -cris_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +cris_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { enum cris_symbol_type t; @@ -1536,7 +1536,7 @@ cris_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) bool cris_reload_address_legitimized (rtx x, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int opnum ATTRIBUTE_UNUSED, int itype, int ind_levels ATTRIBUTE_UNUSED) @@ -1636,7 +1636,7 @@ cris_preferred_reload_class (rtx x ATTRIBUTE_UNUSED, reg_class_t rclass) /* Worker function for TARGET_REGISTER_MOVE_COST. */ static int -cris_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +cris_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { /* Can't move to and from a SPECIAL_REGS register, so we have to say @@ -1674,7 +1674,7 @@ cris_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, suffice. */ static int -cris_memory_move_cost (enum machine_mode mode, +cris_memory_move_cost (machine_mode mode, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -2220,7 +2220,7 @@ cris_rtx_costs (rtx x, int code, int outer_code, int opno, int *total, /* The ADDRESS_COST worker. */ static int -cris_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, +cris_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -2883,7 +2883,7 @@ cris_init_machine_status (void) rtx cris_split_movdx (rtx *operands) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); rtx dest = operands[0]; rtx src = operands[1]; rtx val; @@ -4055,7 +4055,7 @@ cris_struct_value_rtx (tree fntype ATTRIBUTE_UNUSED, static void cris_setup_incoming_varargs (cumulative_args_t ca_v, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, tree type ATTRIBUTE_UNUSED, int *pretend_arg_size, int second_time) @@ -4080,7 +4080,7 @@ cris_setup_incoming_varargs (cumulative_args_t ca_v, static bool cris_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { return (targetm.calls.must_pass_in_stack (mode, type) @@ -4091,9 +4091,9 @@ cris_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, and *not* defining TARGET_PROMOTE_PROTOTYPES or PROMOTE_MODE gives the best code size and speed for gcc, ipps and products in gcc-2.7.2. */ -enum machine_mode +machine_mode cris_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, int *punsignedp ATTRIBUTE_UNUSED, const_tree fntype ATTRIBUTE_UNUSED, int for_return) @@ -4109,7 +4109,7 @@ cris_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, /* Atomic types require alignment to be at least their "natural" size. */ static unsigned int -cris_atomic_align_for_mode (enum machine_mode mode) +cris_atomic_align_for_mode (machine_mode mode) { return GET_MODE_BITSIZE (mode); } @@ -4129,7 +4129,7 @@ cris_function_value(const_tree type, time being. */ static rtx -cris_libcall_value (enum machine_mode mode, +cris_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, CRIS_FIRST_ARG_REG); @@ -4145,7 +4145,7 @@ cris_function_value_regno_p (const unsigned int regno) } static int -cris_arg_partial_bytes (cumulative_args_t ca, enum machine_mode mode, +cris_arg_partial_bytes (cumulative_args_t ca, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { if (get_cumulative_args (ca)->regs == CRIS_MAX_ARGS_IN_REGS - 1 @@ -4159,7 +4159,7 @@ cris_arg_partial_bytes (cumulative_args_t ca, enum machine_mode mode, static rtx cris_function_arg_1 (cumulative_args_t ca_v, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named, bool incoming) { @@ -4175,7 +4175,7 @@ cris_function_arg_1 (cumulative_args_t ca_v, The void_type_node is sent as a "closing" call. */ static rtx -cris_function_arg (cumulative_args_t ca, enum machine_mode mode, +cris_function_arg (cumulative_args_t ca, machine_mode mode, const_tree type, bool named) { return cris_function_arg_1 (ca, mode, type, named, false); @@ -4189,7 +4189,7 @@ cris_function_arg (cumulative_args_t ca, enum machine_mode mode, void_type_node TYPE parameter. */ static rtx -cris_function_incoming_arg (cumulative_args_t ca, enum machine_mode mode, +cris_function_incoming_arg (cumulative_args_t ca, machine_mode mode, const_tree type, bool named) { return cris_function_arg_1 (ca, mode, type, named, true); @@ -4198,7 +4198,7 @@ cris_function_incoming_arg (cumulative_args_t ca, enum machine_mode mode, /* Worker function for TARGET_FUNCTION_ARG_ADVANCE. */ static void -cris_function_arg_advance (cumulative_args_t ca_v, enum machine_mode mode, +cris_function_arg_advance (cumulative_args_t ca_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v); diff --git a/gcc/config/cris/cris.md b/gcc/config/cris/cris.md index 9a201f6..44e453b 100644 --- a/gcc/config/cris/cris.md +++ b/gcc/config/cris/cris.md @@ -4997,8 +4997,8 @@ [(set (match_dup 0) (match_dup 4)) (set (match_dup 5) (match_dup 6))] { - enum machine_mode zmode = INTVAL (operands[3]) <= 255 ? QImode : HImode; - enum machine_mode amode + machine_mode zmode = INTVAL (operands[3]) <= 255 ? QImode : HImode; + machine_mode amode = satisfies_constraint_O (operands[3]) ? SImode : zmode; rtx op1 = (REG_S_P (operands[1]) @@ -5035,7 +5035,7 @@ [(set (match_dup 0) (match_dup 3)) (set (match_dup 0) (and:SI (match_dup 0) (match_dup 4)))] { - enum machine_mode zmode = INTVAL (operands[2]) <= 255 ? QImode : HImode; + machine_mode zmode = INTVAL (operands[2]) <= 255 ? QImode : HImode; rtx op1 = (REG_S_P (operands[2]) ? gen_rtx_REG (zmode, REGNO (operands[2])) diff --git a/gcc/config/darwin-protos.h b/gcc/config/darwin-protos.h index 20974c1..949fbfa 100644 --- a/gcc/config/darwin-protos.h +++ b/gcc/config/darwin-protos.h @@ -37,11 +37,11 @@ extern enum machopic_addr_class machopic_classify_symbol (rtx); extern rtx machopic_indirect_data_reference (rtx, rtx); extern rtx machopic_indirect_call_target (rtx); -extern rtx machopic_legitimize_pic_address (rtx, enum machine_mode, rtx); +extern rtx machopic_legitimize_pic_address (rtx, machine_mode, rtx); extern void machopic_asm_out_constructor (rtx, int); extern void machopic_asm_out_destructor (rtx, int); -extern section *machopic_select_rtx_section (enum machine_mode, rtx, +extern section *machopic_select_rtx_section (machine_mode, rtx, unsigned HOST_WIDE_INT); #endif /* RTX_CODE */ diff --git a/gcc/config/darwin.c b/gcc/config/darwin.c index ef898f3..a201a74 100644 --- a/gcc/config/darwin.c +++ b/gcc/config/darwin.c @@ -798,7 +798,7 @@ machopic_indirect_call_target (rtx target) rtx sym_ref = XEXP (target, 0); const char *stub_name = machopic_indirection_name (sym_ref, /*stub_p=*/true); - enum machine_mode mode = GET_MODE (sym_ref); + machine_mode mode = GET_MODE (sym_ref); XEXP (target, 0) = gen_rtx_SYMBOL_REF (mode, stub_name); SYMBOL_REF_DATA (XEXP (target, 0)) = SYMBOL_REF_DATA (sym_ref); @@ -810,7 +810,7 @@ machopic_indirect_call_target (rtx target) } rtx -machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) +machopic_legitimize_pic_address (rtx orig, machine_mode mode, rtx reg) { rtx pic_ref = orig; @@ -1293,7 +1293,7 @@ darwin_mergeable_constant_section (tree exp, unsigned HOST_WIDE_INT align, bool zsize) { - enum machine_mode mode = DECL_MODE (exp); + machine_mode mode = DECL_MODE (exp); unsigned int modesize = GET_MODE_BITSIZE (mode); if (DARWIN_SECTION_ANCHORS @@ -1743,7 +1743,7 @@ machopic_select_section (tree decl, They must go in "const". */ section * -machopic_select_rtx_section (enum machine_mode mode, rtx x, +machopic_select_rtx_section (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED) { if (GET_MODE_SIZE (mode) == 8 diff --git a/gcc/config/epiphany/epiphany-protos.h b/gcc/config/epiphany/epiphany-protos.h index 38b07b8..9fba5ec 100644 --- a/gcc/config/epiphany/epiphany-protos.h +++ b/gcc/config/epiphany/epiphany-protos.h @@ -19,11 +19,11 @@ along with GCC; see the file COPYING3. If not see <http://www.gnu.org/licenses/>. */ #ifdef RTX_CODE -extern enum machine_mode epiphany_select_cc_mode (enum rtx_code, rtx, rtx); +extern machine_mode epiphany_select_cc_mode (enum rtx_code, rtx, rtx); /* Define the function that build the compare insn for scc and bcc. */ -extern struct rtx_def *gen_compare_reg (enum machine_mode, enum rtx_code, - enum machine_mode, rtx, rtx); +extern struct rtx_def *gen_compare_reg (machine_mode, enum rtx_code, + machine_mode, rtx, rtx); #endif /* Declarations for various fns used in the .md file. */ @@ -38,7 +38,7 @@ extern void epiphany_expand_prologue (void); extern void epiphany_expand_epilogue (int); extern int epiphany_initial_elimination_offset (int, int); extern void epiphany_init_expanders (void); -extern int hard_regno_mode_ok (int regno, enum machine_mode mode); +extern int hard_regno_mode_ok (int regno, machine_mode mode); #ifdef HARD_CONST extern void emit_set_fp_mode (int entity, int mode, int prev_mode, HARD_REG_SET regs_live); diff --git a/gcc/config/epiphany/epiphany.c b/gcc/config/epiphany/epiphany.c index 3e01c2d..ec57797 100644 --- a/gcc/config/epiphany/epiphany.c +++ b/gcc/config/epiphany/epiphany.c @@ -88,7 +88,7 @@ static int get_epiphany_condition_code (rtx); static tree epiphany_handle_interrupt_attribute (tree *, tree, tree, int, bool *); static tree epiphany_handle_forwarder_attribute (tree *, tree, tree, int, bool *); -static bool epiphany_pass_by_reference (cumulative_args_t, enum machine_mode, +static bool epiphany_pass_by_reference (cumulative_args_t, machine_mode, const_tree, bool); static rtx_insn *frame_insn (rtx); @@ -374,7 +374,7 @@ get_epiphany_condition_code (rtx comparison) /* Return 1 if hard register REGNO can hold a value of machine_mode MODE. */ int -hard_regno_mode_ok (int regno, enum machine_mode mode) +hard_regno_mode_ok (int regno, machine_mode mode) { if (GET_MODE_SIZE (mode) > UNITS_PER_WORD) return (regno & 1) == 0 && GPR_P (regno); @@ -385,7 +385,7 @@ hard_regno_mode_ok (int regno, enum machine_mode mode) /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE, return the mode to be used for the comparison. */ -enum machine_mode +machine_mode epiphany_select_cc_mode (enum rtx_code op, rtx x ATTRIBUTE_UNUSED, rtx y ATTRIBUTE_UNUSED) @@ -580,10 +580,10 @@ sfunc_symbol (const char *name) mode, and return the rtx for the cc reg comparison in CMODE. */ rtx -gen_compare_reg (enum machine_mode cmode, enum rtx_code code, - enum machine_mode in_mode, rtx x, rtx y) +gen_compare_reg (machine_mode cmode, enum rtx_code code, + machine_mode in_mode, rtx x, rtx y) { - enum machine_mode mode = SELECT_CC_MODE (code, x, y); + machine_mode mode = SELECT_CC_MODE (code, x, y); rtx cc_reg, pat, clob0, clob1, clob2; if (in_mode == VOIDmode) @@ -703,7 +703,7 @@ gen_compare_reg (enum machine_mode cmode, enum rtx_code code, : (CUM)) static unsigned int -epiphany_function_arg_boundary (enum machine_mode mode, const_tree type) +epiphany_function_arg_boundary (machine_mode mode, const_tree type) { if ((type ? TYPE_ALIGN (type) : GET_MODE_BITSIZE (mode)) <= PARM_BOUNDARY) return PARM_BOUNDARY; @@ -718,7 +718,7 @@ epiphany_function_arg_boundary (enum machine_mode mode, const_tree type) static void -epiphany_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, +epiphany_setup_incoming_varargs (cumulative_args_t cum, machine_mode mode, tree type, int *pretend_size, int no_rtl) { int first_anon_arg; @@ -746,7 +746,7 @@ epiphany_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, } static int -epiphany_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode, +epiphany_arg_partial_bytes (cumulative_args_t cum, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { int words = 0, rounded_cum; @@ -844,7 +844,7 @@ epiphany_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, If ADDR is not a valid address, its cost is irrelevant. */ static int -epiphany_address_cost (rtx addr, enum machine_mode mode, +epiphany_address_cost (rtx addr, machine_mode mode, addr_space_t as ATTRIBUTE_UNUSED, bool speed) { rtx reg; @@ -905,7 +905,7 @@ epiphany_address_cost (rtx addr, enum machine_mode mode, but issue pich is the same. For floating point, load latency is three times as much as a reg-reg move. */ static int -epiphany_memory_move_cost (enum machine_mode mode, +epiphany_memory_move_cost (machine_mode mode, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -1484,7 +1484,7 @@ epiphany_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) static bool epiphany_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { if (type) @@ -1502,7 +1502,7 @@ epiphany_function_value (const_tree ret_type, const_tree fn_decl_or_type ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; mode = TYPE_MODE (ret_type); /* We must change the mode like PROMOTE_MODE does. @@ -1520,7 +1520,7 @@ epiphany_function_value (const_tree ret_type, } static rtx -epiphany_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +epiphany_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, 0); } @@ -1615,7 +1615,7 @@ frame_move_insn (rtx to, rtx from) /* Generate a MEM referring to a varargs argument slot. */ static rtx -gen_varargs_mem (enum machine_mode mode, rtx addr) +gen_varargs_mem (machine_mode mode, rtx addr) { rtx mem = gen_rtx_MEM (mode, addr); MEM_NOTRAP_P (mem) = 1; @@ -1647,10 +1647,10 @@ epiphany_emit_save_restore (int min, int limit, rtx addr, int epilogue_p) last_saved--; for (i = 0; i < limit; i++) { - enum machine_mode mode = word_mode; + machine_mode mode = word_mode; rtx mem, reg; int n = i; - rtx (*gen_mem) (enum machine_mode, rtx) = gen_frame_mem; + rtx (*gen_mem) (machine_mode, rtx) = gen_frame_mem; /* Make sure we push the arguments in the right order. */ if (n < MAX_EPIPHANY_PARM_REGS && crtl->args.pretend_args_size) @@ -1811,7 +1811,7 @@ epiphany_expand_prologue (void) allocate the entire frame; this is joint with one register save. */ if (current_frame_info.first_slot >= 0) { - enum machine_mode mode + machine_mode mode = (current_frame_info.first_slot_size == UNITS_PER_WORD ? word_mode : DImode); @@ -2047,7 +2047,7 @@ epiphany_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost) || RTX_OK_FOR_OFFSET_P (MODE, XEXP (X, 1)))) static bool -epiphany_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +epiphany_legitimate_address_p (machine_mode mode, rtx x, bool strict) { #define REG_OK_FOR_BASE_P(X) \ (strict ? GPR_P (REGNO (X)) : GPR_AP_OR_PSEUDO_P (REGNO (X))) @@ -2082,7 +2082,7 @@ epiphany_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) static reg_class_t epiphany_secondary_reload (bool in_p, rtx x, reg_class_t rclass, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, secondary_reload_info *sri) { /* This could give more reload inheritance, but we are missing some @@ -2200,8 +2200,8 @@ epiphany_call_uninterruptible_p (rtx mem) return epiphany_uninterruptible_p (t); } -static enum machine_mode -epiphany_promote_function_mode (const_tree type, enum machine_mode mode, +static machine_mode +epiphany_promote_function_mode (const_tree type, machine_mode mode, int *punsignedp ATTRIBUTE_UNUSED, const_tree funtype ATTRIBUTE_UNUSED, int for_return ATTRIBUTE_UNUSED) @@ -2261,7 +2261,7 @@ epiphany_conditional_register_usage (void) /* On the EPIPHANY the first MAX_EPIPHANY_PARM_REGS args are normally in registers and the rest are pushed. */ static rtx -epiphany_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +epiphany_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS cum = *get_cumulative_args (cum_v); @@ -2275,7 +2275,7 @@ epiphany_function_arg (cumulative_args_t cum_v, enum machine_mode mode, of mode MODE and data type TYPE. (TYPE is null for libcalls where that information may not be available.) */ static void -epiphany_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +epiphany_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -2775,7 +2775,7 @@ epiphany_epilogue_uses (int regno) } static unsigned int -epiphany_min_divisions_for_recip_mul (enum machine_mode mode) +epiphany_min_divisions_for_recip_mul (machine_mode mode) { if (flag_reciprocal_math && mode == SFmode) /* We'll expand into a multiply-by-reciprocal anyway, so we might a well do @@ -2784,14 +2784,14 @@ epiphany_min_divisions_for_recip_mul (enum machine_mode mode) return default_min_divisions_for_recip_mul (mode); } -static enum machine_mode -epiphany_preferred_simd_mode (enum machine_mode mode ATTRIBUTE_UNUSED) +static machine_mode +epiphany_preferred_simd_mode (machine_mode mode ATTRIBUTE_UNUSED) { return TARGET_VECT_DOUBLE ? DImode : SImode; } static bool -epiphany_vector_mode_supported_p (enum machine_mode mode) +epiphany_vector_mode_supported_p (machine_mode mode) { if (mode == V2SFmode) return true; @@ -2813,7 +2813,7 @@ epiphany_vector_alignment_reachable (const_tree type, bool is_packed) } static bool -epiphany_support_vector_misalignment (enum machine_mode mode, const_tree type, +epiphany_support_vector_misalignment (machine_mode mode, const_tree type, int misalignment, bool is_packed) { if (GET_MODE_SIZE (mode) == 8 && misalignment % 4 == 0) diff --git a/gcc/config/epiphany/epiphany.md b/gcc/config/epiphany/epiphany.md index a7f7662..822c701 100644 --- a/gcc/config/epiphany/epiphany.md +++ b/gcc/config/epiphany/epiphany.md @@ -1946,7 +1946,7 @@ { rtx cmp_op0 = XEXP (operands[1], 0); rtx cmp_op1 = XEXP (operands[1], 1); - enum machine_mode cmp_in_mode; + machine_mode cmp_in_mode; enum rtx_code code = GET_CODE (operands[1]); cmp_in_mode = GET_MODE (cmp_op0); diff --git a/gcc/config/fr30/fr30.c b/gcc/config/fr30/fr30.c index f11c0c8..4832b77 100644 --- a/gcc/config/fr30/fr30.c +++ b/gcc/config/fr30/fr30.c @@ -130,23 +130,23 @@ static struct fr30_frame_info current_frame_info; /* Zero structure to initialize current_frame_info. */ static struct fr30_frame_info zero_frame_info; -static void fr30_setup_incoming_varargs (cumulative_args_t, enum machine_mode, +static void fr30_setup_incoming_varargs (cumulative_args_t, machine_mode, tree, int *, int); -static bool fr30_must_pass_in_stack (enum machine_mode, const_tree); -static int fr30_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static bool fr30_must_pass_in_stack (machine_mode, const_tree); +static int fr30_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static rtx fr30_function_arg (cumulative_args_t, enum machine_mode, +static rtx fr30_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static void fr30_function_arg_advance (cumulative_args_t, enum machine_mode, +static void fr30_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); static bool fr30_frame_pointer_required (void); static rtx fr30_function_value (const_tree, const_tree, bool); -static rtx fr30_libcall_value (enum machine_mode, const_rtx); +static rtx fr30_libcall_value (machine_mode, const_rtx); static bool fr30_function_value_regno_p (const unsigned int); static bool fr30_can_eliminate (const int, const int); static void fr30_asm_trampoline_template (FILE *); static void fr30_trampoline_init (rtx, tree, rtx); -static int fr30_num_arg_regs (enum machine_mode, const_tree); +static int fr30_num_arg_regs (machine_mode, const_tree); #define FRAME_POINTER_MASK (1 << (FRAME_POINTER_REGNUM)) #define RETURN_POINTER_MASK (1 << (RETURN_POINTER_REGNUM)) @@ -471,7 +471,7 @@ fr30_expand_epilogue (void) which has type TYPE and mode MODE, and we rely on this fact. */ void fr30_setup_incoming_varargs (cumulative_args_t arg_regs_used_so_far_v, - enum machine_mode mode, + machine_mode mode, tree type ATTRIBUTE_UNUSED, int *pretend_size, int second_time ATTRIBUTE_UNUSED) @@ -733,7 +733,7 @@ fr30_function_value (const_tree valtype, /* Implements TARGET_LIBCALL_VALUE. */ static rtx -fr30_libcall_value (enum machine_mode mode, +fr30_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, RETURN_VALUE_REGNUM); @@ -753,7 +753,7 @@ fr30_function_value_regno_p (const unsigned int regno) in registers. */ static bool -fr30_must_pass_in_stack (enum machine_mode mode, const_tree type) +fr30_must_pass_in_stack (machine_mode mode, const_tree type) { if (mode == BLKmode) return true; @@ -765,7 +765,7 @@ fr30_must_pass_in_stack (enum machine_mode mode, const_tree type) /* Compute the number of word sized registers needed to hold a function argument of mode INT_MODE and tree type TYPE. */ static int -fr30_num_arg_regs (enum machine_mode mode, const_tree type) +fr30_num_arg_regs (machine_mode mode, const_tree type) { int size; @@ -788,7 +788,7 @@ fr30_num_arg_regs (enum machine_mode mode, const_tree type) parameters to the function. */ static int -fr30_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +fr30_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -812,7 +812,7 @@ fr30_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, } static rtx -fr30_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +fr30_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -834,7 +834,7 @@ fr30_function_arg (cumulative_args_t cum_v, enum machine_mode mode, the stack. The compiler knows how to track the amount of stack space used for arguments without any special help. */ static void -fr30_function_arg_advance (cumulative_args_t cum, enum machine_mode mode, +fr30_function_arg_advance (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { *get_cumulative_args (cum) += named * fr30_num_arg_regs (mode, type); @@ -844,7 +844,7 @@ fr30_function_arg_advance (cumulative_args_t cum, enum machine_mode mode, /*{{{ Operand predicates */ #ifndef Mmode -#define Mmode enum machine_mode +#define Mmode machine_mode #endif /* Returns true iff all the registers in the operands array @@ -916,7 +916,7 @@ fr30_move_double (rtx * operands) rtx dest = operands[0]; enum rtx_code src_code = GET_CODE (src); enum rtx_code dest_code = GET_CODE (dest); - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); rtx val; start_sequence (); diff --git a/gcc/config/frv/frv-protos.h b/gcc/config/frv/frv-protos.h index 7bf8c7a..c1f6bba 100644 --- a/gcc/config/frv/frv-protos.h +++ b/gcc/config/frv/frv-protos.h @@ -27,7 +27,7 @@ extern int frv_initial_elimination_offset (int, int); extern void frv_ifcvt_machdep_init (void *); #ifdef RTX_CODE -extern int frv_legitimate_address_p_1 (enum machine_mode, rtx, +extern int frv_legitimate_address_p_1 (machine_mode, rtx, int, int, int); extern rtx frv_find_base_term (rtx); @@ -42,11 +42,11 @@ extern int frv_expand_block_move (rtx *); extern int frv_expand_block_clear (rtx *); extern rtx frv_dynamic_chain_address (rtx); extern rtx frv_return_addr_rtx (int, rtx); -extern rtx frv_index_memory (rtx, enum machine_mode, int); +extern rtx frv_index_memory (rtx, machine_mode, int); extern const char *frv_asm_output_opcode (FILE *, const char *); extern void frv_final_prescan_insn (rtx_insn *, rtx *, int); -extern void frv_emit_move (enum machine_mode, rtx, rtx); +extern void frv_emit_move (machine_mode, rtx, rtx); extern int frv_emit_movsi (rtx, rtx); extern const char *output_move_single (rtx *, rtx); extern const char *output_move_double (rtx *, rtx); @@ -73,12 +73,12 @@ extern void frv_ifcvt_modify_cancel (struct ce_if_block *); #endif extern enum reg_class frv_secondary_reload_class (enum reg_class, - enum machine_mode, rtx); -extern int frv_hard_regno_mode_ok (int, enum machine_mode); -extern int frv_hard_regno_nregs (int, enum machine_mode); + machine_mode, rtx); +extern int frv_hard_regno_mode_ok (int, machine_mode); +extern int frv_hard_regno_nregs (int, machine_mode); extern int frv_class_max_nregs (enum reg_class rclass, - enum machine_mode mode); -extern enum machine_mode frv_select_cc_mode (enum rtx_code, rtx, rtx); + machine_mode mode); +extern machine_mode frv_select_cc_mode (enum rtx_code, rtx, rtx); #endif /* RTX_CODE */ extern int frv_trampoline_size (void); @@ -91,77 +91,77 @@ extern int frv_adjust_field_align (tree, int); #endif #ifdef RTX_CODE -extern int integer_register_operand (rtx, enum machine_mode); -extern int frv_load_operand (rtx, enum machine_mode); -extern int gpr_or_fpr_operand (rtx, enum machine_mode); -extern int gpr_no_subreg_operand (rtx, enum machine_mode); -extern int gpr_or_int6_operand (rtx, enum machine_mode); -extern int fpr_or_int6_operand (rtx, enum machine_mode); -extern int gpr_or_int_operand (rtx, enum machine_mode); -extern int gpr_or_int12_operand (rtx, enum machine_mode); -extern int gpr_fpr_or_int12_operand (rtx, enum machine_mode); -extern int gpr_or_int10_operand (rtx, enum machine_mode); -extern int move_source_operand (rtx, enum machine_mode); -extern int move_destination_operand (rtx, enum machine_mode); -extern int condexec_source_operand (rtx, enum machine_mode); -extern int condexec_dest_operand (rtx, enum machine_mode); -extern int lr_operand (rtx, enum machine_mode); -extern int gpr_or_memory_operand (rtx, enum machine_mode); -extern int fpr_or_memory_operand (rtx, enum machine_mode); -extern int reg_or_0_operand (rtx, enum machine_mode); -extern int fcc_operand (rtx, enum machine_mode); -extern int icc_operand (rtx, enum machine_mode); -extern int cc_operand (rtx, enum machine_mode); -extern int fcr_operand (rtx, enum machine_mode); -extern int icr_operand (rtx, enum machine_mode); -extern int cr_operand (rtx, enum machine_mode); -extern int call_operand (rtx, enum machine_mode); -extern int fpr_operand (rtx, enum machine_mode); -extern int even_reg_operand (rtx, enum machine_mode); -extern int odd_reg_operand (rtx, enum machine_mode); -extern int even_gpr_operand (rtx, enum machine_mode); -extern int odd_gpr_operand (rtx, enum machine_mode); -extern int quad_fpr_operand (rtx, enum machine_mode); -extern int even_fpr_operand (rtx, enum machine_mode); -extern int odd_fpr_operand (rtx, enum machine_mode); -extern int dbl_memory_one_insn_operand (rtx, enum machine_mode); -extern int dbl_memory_two_insn_operand (rtx, enum machine_mode); -extern int int12_operand (rtx, enum machine_mode); -extern int int6_operand (rtx, enum machine_mode); -extern int int5_operand (rtx, enum machine_mode); -extern int uint5_operand (rtx, enum machine_mode); -extern int uint4_operand (rtx, enum machine_mode); -extern int uint1_operand (rtx, enum machine_mode); -extern int int_2word_operand (rtx, enum machine_mode); -extern int pic_register_operand (rtx, enum machine_mode); -extern int pic_symbolic_operand (rtx, enum machine_mode); -extern int small_data_register_operand (rtx, enum machine_mode); -extern int small_data_symbolic_operand (rtx, enum machine_mode); -extern int upper_int16_operand (rtx, enum machine_mode); -extern int uint16_operand (rtx, enum machine_mode); -extern int symbolic_operand (rtx, enum machine_mode); -extern int relational_operator (rtx, enum machine_mode); -extern int signed_relational_operator (rtx, enum machine_mode); -extern int unsigned_relational_operator (rtx, enum machine_mode); -extern int float_relational_operator (rtx, enum machine_mode); -extern int ccr_eqne_operator (rtx, enum machine_mode); -extern int minmax_operator (rtx, enum machine_mode); -extern int condexec_si_binary_operator (rtx, enum machine_mode); -extern int condexec_si_media_operator (rtx, enum machine_mode); -extern int condexec_si_divide_operator (rtx, enum machine_mode); -extern int condexec_si_unary_operator (rtx, enum machine_mode); -extern int condexec_sf_conv_operator (rtx, enum machine_mode); -extern int condexec_sf_add_operator (rtx, enum machine_mode); -extern int condexec_memory_operand (rtx, enum machine_mode); -extern int intop_compare_operator (rtx, enum machine_mode); -extern int acc_operand (rtx, enum machine_mode); -extern int even_acc_operand (rtx, enum machine_mode); -extern int quad_acc_operand (rtx, enum machine_mode); -extern int accg_operand (rtx, enum machine_mode); +extern int integer_register_operand (rtx, machine_mode); +extern int frv_load_operand (rtx, machine_mode); +extern int gpr_or_fpr_operand (rtx, machine_mode); +extern int gpr_no_subreg_operand (rtx, machine_mode); +extern int gpr_or_int6_operand (rtx, machine_mode); +extern int fpr_or_int6_operand (rtx, machine_mode); +extern int gpr_or_int_operand (rtx, machine_mode); +extern int gpr_or_int12_operand (rtx, machine_mode); +extern int gpr_fpr_or_int12_operand (rtx, machine_mode); +extern int gpr_or_int10_operand (rtx, machine_mode); +extern int move_source_operand (rtx, machine_mode); +extern int move_destination_operand (rtx, machine_mode); +extern int condexec_source_operand (rtx, machine_mode); +extern int condexec_dest_operand (rtx, machine_mode); +extern int lr_operand (rtx, machine_mode); +extern int gpr_or_memory_operand (rtx, machine_mode); +extern int fpr_or_memory_operand (rtx, machine_mode); +extern int reg_or_0_operand (rtx, machine_mode); +extern int fcc_operand (rtx, machine_mode); +extern int icc_operand (rtx, machine_mode); +extern int cc_operand (rtx, machine_mode); +extern int fcr_operand (rtx, machine_mode); +extern int icr_operand (rtx, machine_mode); +extern int cr_operand (rtx, machine_mode); +extern int call_operand (rtx, machine_mode); +extern int fpr_operand (rtx, machine_mode); +extern int even_reg_operand (rtx, machine_mode); +extern int odd_reg_operand (rtx, machine_mode); +extern int even_gpr_operand (rtx, machine_mode); +extern int odd_gpr_operand (rtx, machine_mode); +extern int quad_fpr_operand (rtx, machine_mode); +extern int even_fpr_operand (rtx, machine_mode); +extern int odd_fpr_operand (rtx, machine_mode); +extern int dbl_memory_one_insn_operand (rtx, machine_mode); +extern int dbl_memory_two_insn_operand (rtx, machine_mode); +extern int int12_operand (rtx, machine_mode); +extern int int6_operand (rtx, machine_mode); +extern int int5_operand (rtx, machine_mode); +extern int uint5_operand (rtx, machine_mode); +extern int uint4_operand (rtx, machine_mode); +extern int uint1_operand (rtx, machine_mode); +extern int int_2word_operand (rtx, machine_mode); +extern int pic_register_operand (rtx, machine_mode); +extern int pic_symbolic_operand (rtx, machine_mode); +extern int small_data_register_operand (rtx, machine_mode); +extern int small_data_symbolic_operand (rtx, machine_mode); +extern int upper_int16_operand (rtx, machine_mode); +extern int uint16_operand (rtx, machine_mode); +extern int symbolic_operand (rtx, machine_mode); +extern int relational_operator (rtx, machine_mode); +extern int signed_relational_operator (rtx, machine_mode); +extern int unsigned_relational_operator (rtx, machine_mode); +extern int float_relational_operator (rtx, machine_mode); +extern int ccr_eqne_operator (rtx, machine_mode); +extern int minmax_operator (rtx, machine_mode); +extern int condexec_si_binary_operator (rtx, machine_mode); +extern int condexec_si_media_operator (rtx, machine_mode); +extern int condexec_si_divide_operator (rtx, machine_mode); +extern int condexec_si_unary_operator (rtx, machine_mode); +extern int condexec_sf_conv_operator (rtx, machine_mode); +extern int condexec_sf_add_operator (rtx, machine_mode); +extern int condexec_memory_operand (rtx, machine_mode); +extern int intop_compare_operator (rtx, machine_mode); +extern int acc_operand (rtx, machine_mode); +extern int even_acc_operand (rtx, machine_mode); +extern int quad_acc_operand (rtx, machine_mode); +extern int accg_operand (rtx, machine_mode); extern rtx frv_matching_accg_for_acc (rtx); extern void frv_expand_fdpic_call (rtx *, bool, bool); extern rtx frv_gen_GPsym2reg (rtx, rtx); -extern int frv_legitimate_memory_operand (rtx, enum machine_mode, int); +extern int frv_legitimate_memory_operand (rtx, machine_mode, int); /* Information about a relocation unspec. SYMBOL is the relocation symbol (a SYMBOL_REF or LABEL_REF), RELOC is the type of relocation and OFFSET diff --git a/gcc/config/frv/frv.c b/gcc/config/frv/frv.c index e3a22e8..41cc497 100644 --- a/gcc/config/frv/frv.c +++ b/gcc/config/frv/frv.c @@ -275,7 +275,7 @@ static frv_stack_t *frv_stack_cache = (frv_stack_t *)0; /* Forward references */ static void frv_option_override (void); -static bool frv_legitimate_address_p (enum machine_mode, rtx, bool); +static bool frv_legitimate_address_p (machine_mode, rtx, bool); static int frv_default_flags_for_cpu (void); static int frv_string_begins_with (const char *, const char *); static FRV_INLINE bool frv_small_data_reloc_p (rtx, int); @@ -289,17 +289,17 @@ static int frv_print_operand_jump_hint (rtx_insn *); static const char *comparison_string (enum rtx_code, rtx); static rtx frv_function_value (const_tree, const_tree, bool); -static rtx frv_libcall_value (enum machine_mode, +static rtx frv_libcall_value (machine_mode, const_rtx); static FRV_INLINE int frv_regno_ok_for_base_p (int, int); static rtx single_set_pattern (rtx); static int frv_function_contains_far_jump (void); static rtx frv_alloc_temp_reg (frv_tmp_reg_t *, enum reg_class, - enum machine_mode, + machine_mode, int, int); static rtx frv_frame_offset_rtx (int); -static rtx frv_frame_mem (enum machine_mode, rtx, int); +static rtx frv_frame_mem (machine_mode, rtx, int); static rtx frv_dwarf_store (rtx, int); static void frv_frame_insn (rtx, rtx); static void frv_frame_access (frv_frame_accessor_t*, @@ -310,14 +310,14 @@ static void frv_frame_access_standard_regs (enum frv_stack_op, frv_stack_t *); static struct machine_function *frv_init_machine_status (void); static rtx frv_int_to_acc (enum insn_code, int, rtx); -static enum machine_mode frv_matching_accg_mode (enum machine_mode); +static machine_mode frv_matching_accg_mode (machine_mode); static rtx frv_read_argument (tree, unsigned int); -static rtx frv_read_iacc_argument (enum machine_mode, tree, unsigned int); +static rtx frv_read_iacc_argument (machine_mode, tree, unsigned int); static int frv_check_constant_argument (enum insn_code, int, rtx); static rtx frv_legitimize_target (enum insn_code, rtx); static rtx frv_legitimize_argument (enum insn_code, int, rtx); static rtx frv_legitimize_tls_address (rtx, enum tls_model); -static rtx frv_legitimize_address (rtx, rtx, enum machine_mode); +static rtx frv_legitimize_address (rtx, rtx, machine_mode); static rtx frv_expand_set_builtin (enum insn_code, tree, rtx); static rtx frv_expand_unop_builtin (enum insn_code, tree, rtx); static rtx frv_expand_binop_builtin (enum insn_code, tree, rtx); @@ -336,7 +336,7 @@ static void frv_split_iacc_move (rtx, rtx); static rtx frv_emit_comparison (enum rtx_code, rtx, rtx); static int frv_clear_registers_used (rtx *, void *); static void frv_ifcvt_add_insn (rtx, rtx, int); -static rtx frv_ifcvt_rewrite_mem (rtx, enum machine_mode, rtx); +static rtx frv_ifcvt_rewrite_mem (rtx, machine_mode, rtx); static rtx frv_ifcvt_load_value (rtx, rtx); static int frv_acc_group_1 (rtx *, void *); static unsigned int frv_insn_unit (rtx_insn *); @@ -371,47 +371,47 @@ static void frv_function_prologue (FILE *, HOST_WIDE_INT); static void frv_function_epilogue (FILE *, HOST_WIDE_INT); static bool frv_assemble_integer (rtx, unsigned, int); static void frv_init_builtins (void); -static rtx frv_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx frv_expand_builtin (tree, rtx, rtx, machine_mode, int); static void frv_init_libfuncs (void); static bool frv_in_small_data_p (const_tree); static void frv_asm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static void frv_setup_incoming_varargs (cumulative_args_t, - enum machine_mode, + machine_mode, tree, int *, int); static rtx frv_expand_builtin_saveregs (void); static void frv_expand_builtin_va_start (tree, rtx); static bool frv_rtx_costs (rtx, int, int, int, int*, bool); -static int frv_register_move_cost (enum machine_mode, +static int frv_register_move_cost (machine_mode, reg_class_t, reg_class_t); -static int frv_memory_move_cost (enum machine_mode, +static int frv_memory_move_cost (machine_mode, reg_class_t, bool); static void frv_asm_out_constructor (rtx, int); static void frv_asm_out_destructor (rtx, int); static bool frv_function_symbol_referenced_p (rtx); -static bool frv_legitimate_constant_p (enum machine_mode, rtx); -static bool frv_cannot_force_const_mem (enum machine_mode, rtx); +static bool frv_legitimate_constant_p (machine_mode, rtx); +static bool frv_cannot_force_const_mem (machine_mode, rtx); static const char *unspec_got_name (int); static void frv_output_const_unspec (FILE *, const struct frv_unspec *); static bool frv_function_ok_for_sibcall (tree, tree); static rtx frv_struct_value_rtx (tree, int); -static bool frv_must_pass_in_stack (enum machine_mode mode, const_tree type); -static int frv_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static bool frv_must_pass_in_stack (machine_mode mode, const_tree type); +static int frv_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static rtx frv_function_arg (cumulative_args_t, enum machine_mode, +static rtx frv_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static rtx frv_function_incoming_arg (cumulative_args_t, enum machine_mode, +static rtx frv_function_incoming_arg (cumulative_args_t, machine_mode, const_tree, bool); -static void frv_function_arg_advance (cumulative_args_t, enum machine_mode, +static void frv_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static unsigned int frv_function_arg_boundary (enum machine_mode, +static unsigned int frv_function_arg_boundary (machine_mode, const_tree); static void frv_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; static reg_class_t frv_secondary_reload (bool, rtx, reg_class_t, - enum machine_mode, + machine_mode, secondary_reload_info *); static bool frv_frame_pointer_required (void); static bool frv_can_eliminate (const int, const int); @@ -612,7 +612,7 @@ frv_const_unspec_p (rtx x, struct frv_unspec *unspec) 4. In many cases, it's more efficient to calculate the constant in-line. */ static bool -frv_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, +frv_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED) { return TARGET_FDPIC; @@ -1496,7 +1496,7 @@ static rtx frv_alloc_temp_reg ( frv_tmp_reg_t *info, /* which registers are available */ enum reg_class rclass, /* register class desired */ - enum machine_mode mode, /* mode to allocate register with */ + machine_mode mode, /* mode to allocate register with */ int mark_as_used, /* register not available after allocation */ int no_abort) /* return NULL instead of aborting */ { @@ -1560,7 +1560,7 @@ frv_frame_offset_rtx (int offset) /* Generate (mem:MODE (plus:Pmode BASE (frv_frame_offset OFFSET)))). The prologue and epilogue uses such expressions to access the stack. */ static rtx -frv_frame_mem (enum machine_mode mode, rtx base, int offset) +frv_frame_mem (machine_mode mode, rtx base, int offset) { return gen_rtx_MEM (mode, gen_rtx_PLUS (Pmode, base, @@ -1623,7 +1623,7 @@ frv_frame_insn (rtx pattern, rtx dwarf_pattern) static void frv_frame_access (frv_frame_accessor_t *accessor, rtx reg, int stack_offset) { - enum machine_mode mode = GET_MODE (reg); + machine_mode mode = GET_MODE (reg); rtx mem = frv_frame_mem (mode, accessor->base, stack_offset - accessor->base_offset); @@ -2138,7 +2138,7 @@ frv_initial_elimination_offset (int from, int to) static void frv_setup_incoming_varargs (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, tree type ATTRIBUTE_UNUSED, int *pretend_size, int second_time) @@ -2235,7 +2235,7 @@ frv_expand_block_move (rtx operands[]) rtx tmp_reg; rtx stores[MAX_MOVE_REG]; int move_bytes; - enum machine_mode mode; + machine_mode mode; /* If this is not a fixed size move, just call memcpy. */ if (! constp) @@ -2326,7 +2326,7 @@ frv_expand_block_clear (rtx operands[]) rtx dest_addr; rtx dest_mem; int clear_bytes; - enum machine_mode mode; + machine_mode mode; /* If this is not a fixed size move, just call memcpy. */ if (! constp) @@ -2481,7 +2481,7 @@ frv_return_addr_rtx (int count, rtx frame) frv_legitimate_address_p forbids register+register addresses, which this function cannot handle. */ rtx -frv_index_memory (rtx memref, enum machine_mode mode, int index) +frv_index_memory (rtx memref, machine_mode mode, int index) { rtx base = XEXP (memref, 0); if (GET_CODE (base) == PRE_MODIFY) @@ -3111,7 +3111,7 @@ frv_init_cumulative_args (CUMULATIVE_ARGS *cum, in registers. */ static bool -frv_must_pass_in_stack (enum machine_mode mode, const_tree type) +frv_must_pass_in_stack (machine_mode mode, const_tree type) { if (mode == BLKmode) return true; @@ -3125,20 +3125,20 @@ frv_must_pass_in_stack (enum machine_mode mode, const_tree type) `PARM_BOUNDARY' is used for all arguments. */ static unsigned int -frv_function_arg_boundary (enum machine_mode mode ATTRIBUTE_UNUSED, +frv_function_arg_boundary (machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED) { return BITS_PER_WORD; } static rtx -frv_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, +frv_function_arg_1 (cumulative_args_t cum_v, machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named, bool incoming ATTRIBUTE_UNUSED) { const CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); - enum machine_mode xmode = (mode == BLKmode) ? SImode : mode; + machine_mode xmode = (mode == BLKmode) ? SImode : mode; int arg_num = *cum; rtx ret; const char *debstr; @@ -3171,14 +3171,14 @@ frv_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, } static rtx -frv_function_arg (cumulative_args_t cum, enum machine_mode mode, +frv_function_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { return frv_function_arg_1 (cum, mode, type, named, false); } static rtx -frv_function_incoming_arg (cumulative_args_t cum, enum machine_mode mode, +frv_function_incoming_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { return frv_function_arg_1 (cum, mode, type, named, true); @@ -3196,13 +3196,13 @@ frv_function_incoming_arg (cumulative_args_t cum, enum machine_mode mode, static void frv_function_arg_advance (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); - enum machine_mode xmode = (mode == BLKmode) ? SImode : mode; + machine_mode xmode = (mode == BLKmode) ? SImode : mode; int bytes = GET_MODE_SIZE (xmode); int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; int arg_num = *cum; @@ -3233,11 +3233,11 @@ frv_function_arg_advance (cumulative_args_t cum_v, the called function. */ static int -frv_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode, +frv_arg_partial_bytes (cumulative_args_t cum, machine_mode mode, tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { - enum machine_mode xmode = (mode == BLKmode) ? SImode : mode; + machine_mode xmode = (mode == BLKmode) ? SImode : mode; int bytes = GET_MODE_SIZE (xmode); int words = (bytes + UNITS_PER_WORD - 1) / UNITS_PER_WORD; int arg_num = *get_cumulative_args (cum); @@ -3269,7 +3269,7 @@ frv_function_value (const_tree valtype, /* Implements TARGET_LIBCALL_VALUE. */ static rtx -frv_libcall_value (enum machine_mode mode, +frv_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, RETURN_VALUE_REGNUM); @@ -3337,7 +3337,7 @@ frv_regno_ok_for_base_p (int regno, int strict_p) will be given to `TARGET_PRINT_OPERAND_ADDRESS'. */ int -frv_legitimate_address_p_1 (enum machine_mode mode, +frv_legitimate_address_p_1 (machine_mode mode, rtx x, int strict_p, int condexec_p, @@ -3469,7 +3469,7 @@ frv_legitimate_address_p_1 (enum machine_mode mode, } bool -frv_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) +frv_legitimate_address_p (machine_mode mode, rtx x, bool strict_p) { return frv_legitimate_address_p_1 (mode, x, strict_p, FALSE, FALSE); } @@ -3636,7 +3636,7 @@ frv_legitimize_tls_address (rtx addr, enum tls_model model) rtx frv_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (GET_CODE (x) == SYMBOL_REF) { @@ -3765,7 +3765,7 @@ frv_find_base_term (rtx x) the operand is used by a predicated instruction. */ int -frv_legitimate_memory_operand (rtx op, enum machine_mode mode, int condexec_p) +frv_legitimate_memory_operand (rtx op, machine_mode mode, int condexec_p) { return ((GET_MODE (op) == mode || mode == VOIDmode) && GET_CODE (op) == MEM @@ -3906,9 +3906,9 @@ frv_function_symbol_referenced_p (rtx x) executed. */ int -condexec_memory_operand (rtx op, enum machine_mode mode) +condexec_memory_operand (rtx op, machine_mode mode) { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); rtx addr; if (mode != VOIDmode && op_mode != mode) @@ -3950,7 +3950,7 @@ direct_return_p (void) void -frv_emit_move (enum machine_mode mode, rtx dest, rtx src) +frv_emit_move (machine_mode mode, rtx dest, rtx src) { if (GET_CODE (src) == SYMBOL_REF) { @@ -4248,7 +4248,7 @@ output_move_single (rtx operands[], rtx insn) if (GET_CODE (dest) == REG) { int dest_regno = REGNO (dest); - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); if (GPR_P (dest_regno)) { @@ -4386,7 +4386,7 @@ output_move_single (rtx operands[], rtx insn) if (GET_CODE (src) == REG) { int src_regno = REGNO (src); - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); if (GPR_P (src_regno)) { @@ -4459,7 +4459,7 @@ output_move_double (rtx operands[], rtx insn) { rtx dest = operands[0]; rtx src = operands[1]; - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); if (GET_CODE (dest) == REG) { @@ -4594,7 +4594,7 @@ output_condmove_single (rtx operands[], rtx insn) if (GET_CODE (dest) == REG) { int dest_regno = REGNO (dest); - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); if (GPR_P (dest_regno)) { @@ -4670,7 +4670,7 @@ output_condmove_single (rtx operands[], rtx insn) if (GET_CODE (src) == REG) { int src_regno = REGNO (src); - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); if (GPR_P (src_regno)) { @@ -4697,7 +4697,7 @@ output_condmove_single (rtx operands[], rtx insn) else if (ZERO_P (src)) { - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); switch (mode) { default: @@ -4727,7 +4727,7 @@ output_condmove_single (rtx operands[], rtx insn) static rtx frv_emit_comparison (enum rtx_code test, rtx op0, rtx op1) { - enum machine_mode cc_mode; + machine_mode cc_mode; rtx cc_reg; /* Floating point doesn't have comparison against a constant. */ @@ -4761,7 +4761,7 @@ frv_emit_cond_branch (rtx operands[]) rtx if_else; enum rtx_code test = GET_CODE (operands[0]); rtx cc_reg = frv_emit_comparison (test, operands[1], operands[2]); - enum machine_mode cc_mode = GET_MODE (cc_reg); + machine_mode cc_mode = GET_MODE (cc_reg); /* Branches generate: (set (pc) @@ -4856,7 +4856,7 @@ frv_emit_cond_move (rtx dest, rtx test_rtx, rtx src1, rtx src2) enum rtx_code test = GET_CODE (test_rtx); rtx cc_reg = frv_emit_comparison (test, XEXP (test_rtx, 0), XEXP (test_rtx, 1)); - enum machine_mode cc_mode = GET_MODE (cc_reg); + machine_mode cc_mode = GET_MODE (cc_reg); /* Conditional move instructions generate: (parallel [(set <target> @@ -4933,7 +4933,7 @@ frv_split_cond_move (rtx operands[]) rtx src2 = operands[4]; rtx cr_reg = operands[5]; rtx ret; - enum machine_mode cr_mode = GET_MODE (cr_reg); + machine_mode cr_mode = GET_MODE (cr_reg); start_sequence (); @@ -5086,7 +5086,7 @@ frv_split_minmax (rtx operands[]) rtx cr_reg = operands[5]; rtx ret; enum rtx_code test_code; - enum machine_mode cr_mode = GET_MODE (cr_reg); + machine_mode cr_mode = GET_MODE (cr_reg); start_sequence (); @@ -5278,7 +5278,7 @@ frv_ifcvt_modify_tests (ce_if_block *ce_info, rtx *p_true, rtx *p_false) rtx cr; rtx cc; rtx nested_cc; - enum machine_mode mode = GET_MODE (true_expr); + machine_mode mode = GET_MODE (true_expr); int j; basic_block *bb; int num_bb; @@ -5644,7 +5644,7 @@ frv_ifcvt_modify_multiple_tests (ce_if_block *ce_info, rtx compare; rtx cc; enum reg_class cr_class; - enum machine_mode mode = GET_MODE (true_expr); + machine_mode mode = GET_MODE (true_expr); rtx (*logical_func)(rtx, rtx, rtx); if (TARGET_DEBUG_COND_EXEC) @@ -5827,7 +5827,7 @@ frv_ifcvt_load_value (rtx value, rtx insn ATTRIBUTE_UNUSED) into a temporary register, or the new MEM if we were successful. */ static rtx -frv_ifcvt_rewrite_mem (rtx mem, enum machine_mode mode, rtx insn) +frv_ifcvt_rewrite_mem (rtx mem, machine_mode mode, rtx insn) { rtx addr = XEXP (mem, 0); @@ -5980,7 +5980,7 @@ frv_ifcvt_modify_insn (ce_if_block *ce_info, { rtx dest = SET_DEST (set); rtx src = SET_SRC (set); - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); /* Check for normal binary operators. */ if (mode == SImode && ARITHMETIC_P (src)) @@ -6367,7 +6367,7 @@ frv_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain) enum reg_class frv_secondary_reload_class (enum reg_class rclass, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, rtx x) { enum reg_class ret; @@ -6428,7 +6428,7 @@ frv_secondary_reload_class (enum reg_class rclass, static reg_class_t frv_secondary_reload (bool in_p, rtx x, reg_class_t reload_class_i, - enum machine_mode reload_mode, + machine_mode reload_mode, secondary_reload_info * sri) { enum reg_class rclass = NO_REGS; @@ -6635,7 +6635,7 @@ frv_adjust_field_align (tree field, int computed) pattern's constraint asks for one. */ int -frv_hard_regno_mode_ok (int regno, enum machine_mode mode) +frv_hard_regno_mode_ok (int regno, machine_mode mode) { int base; int mask; @@ -6718,7 +6718,7 @@ frv_hard_regno_mode_ok (int regno, enum machine_mode mode) for each byte. */ int -frv_hard_regno_nregs (int regno, enum machine_mode mode) +frv_hard_regno_nregs (int regno, machine_mode mode) { if (ACCG_P (regno)) return GET_MODE_SIZE (mode); @@ -6740,7 +6740,7 @@ frv_hard_regno_nregs (int regno, enum machine_mode mode) This declaration is required. */ int -frv_class_max_nregs (enum reg_class rclass, enum machine_mode mode) +frv_class_max_nregs (enum reg_class rclass, machine_mode mode) { if (rclass == ACCG_REGS) /* An N-byte value requires N accumulator guards. */ @@ -6756,7 +6756,7 @@ frv_class_max_nregs (enum reg_class rclass, enum machine_mode mode) definition for this macro on machines where anything `CONSTANT_P' is valid. */ static bool -frv_legitimate_constant_p (enum machine_mode mode, rtx x) +frv_legitimate_constant_p (machine_mode mode, rtx x) { /* frv_cannot_force_const_mem always returns true for FDPIC. This means that the move expanders will be expected to deal with most @@ -6803,7 +6803,7 @@ frv_legitimate_constant_p (enum machine_mode mode, rtx x) is enough, CC_UNS for other unsigned comparisons, and CC for other signed comparisons. */ -enum machine_mode +machine_mode frv_select_cc_mode (enum rtx_code code, rtx x, rtx y) { if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) @@ -6836,7 +6836,7 @@ frv_select_cc_mode (enum rtx_code code, rtx x, rtx y) #define LOW_COST 1 static int -frv_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +frv_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { switch (from) @@ -6940,7 +6940,7 @@ frv_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, /* Worker function for TARGET_MEMORY_MOVE_COST. */ static int -frv_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +frv_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -8701,8 +8701,8 @@ frv_int_to_acc (enum insn_code icode, int opnum, rtx opval) /* If an ACC rtx has mode MODE, return the mode that the matching ACCG should have. */ -static enum machine_mode -frv_matching_accg_mode (enum machine_mode mode) +static machine_mode +frv_matching_accg_mode (machine_mode mode) { switch (mode) { @@ -8756,7 +8756,7 @@ frv_read_argument (tree exp, unsigned int index) of an IACC register and return a (reg:MODE ...) rtx for it. */ static rtx -frv_read_iacc_argument (enum machine_mode mode, tree call, +frv_read_iacc_argument (machine_mode mode, tree call, unsigned int index) { int i, regno; @@ -8809,7 +8809,7 @@ frv_check_constant_argument (enum insn_code icode, int opnum, rtx opval) static rtx frv_legitimize_target (enum insn_code icode, rtx target) { - enum machine_mode mode = insn_data[icode].operand[0].mode; + machine_mode mode = insn_data[icode].operand[0].mode; if (! target || GET_MODE (target) != mode @@ -8827,7 +8827,7 @@ frv_legitimize_target (enum insn_code icode, rtx target) static rtx frv_legitimize_argument (enum insn_code icode, int opnum, rtx arg) { - enum machine_mode mode = insn_data[icode].operand[opnum].mode; + machine_mode mode = insn_data[icode].operand[opnum].mode; if ((*insn_data[icode].operand[opnum].predicate) (arg, mode)) return arg; @@ -8838,7 +8838,7 @@ frv_legitimize_argument (enum insn_code icode, int opnum, rtx arg) /* Return a volatile memory reference of mode MODE whose address is ARG. */ static rtx -frv_volatile_memref (enum machine_mode mode, rtx arg) +frv_volatile_memref (machine_mode mode, rtx arg) { rtx mem; @@ -8970,7 +8970,7 @@ frv_expand_voidbinop_builtin (enum insn_code icode, tree call) rtx pat; rtx op0 = frv_read_argument (call, 0); rtx op1 = frv_read_argument (call, 1); - enum machine_mode mode0 = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[0].mode; rtx addr; if (GET_CODE (op0) != MEM) @@ -9099,7 +9099,7 @@ frv_expand_voidaccop_builtin (enum insn_code icode, tree call) membar and TARGET_MODE is the mode that the loaded value should have. */ static rtx -frv_expand_load_builtin (enum insn_code icode, enum machine_mode target_mode, +frv_expand_load_builtin (enum insn_code icode, machine_mode target_mode, tree call, rtx target) { rtx op0 = frv_read_argument (call, 0); @@ -9252,7 +9252,7 @@ frv_expand_mwtacc_builtin (enum insn_code icode, tree call) static void frv_split_iacc_move (rtx dest, rtx src) { - enum machine_mode inner; + machine_mode inner; int i; inner = GET_MODE (dest); @@ -9267,7 +9267,7 @@ static rtx frv_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); diff --git a/gcc/config/frv/predicates.md b/gcc/config/frv/predicates.md index 972db99..2aa4da7 100644 --- a/gcc/config/frv/predicates.md +++ b/gcc/config/frv/predicates.md @@ -1216,7 +1216,7 @@ (define_predicate "ccr_eqne_operator" (match_code "eq,ne") { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); rtx op0; rtx op1; int regno; @@ -1279,7 +1279,7 @@ (define_predicate "condexec_si_binary_operator" (match_code "plus,minus,and,ior,xor,ashift,ashiftrt,lshiftrt") { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); if (mode != VOIDmode && op_mode != mode) return FALSE; @@ -1307,7 +1307,7 @@ (define_predicate "condexec_si_media_operator" (match_code "and,ior,xor") { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); if (mode != VOIDmode && op_mode != mode) return FALSE; @@ -1330,7 +1330,7 @@ (define_predicate "condexec_si_divide_operator" (match_code "div,udiv") { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); if (mode != VOIDmode && op_mode != mode) return FALSE; @@ -1352,7 +1352,7 @@ (define_predicate "condexec_si_unary_operator" (match_code "not,neg") { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); if (mode != VOIDmode && op_mode != mode) return FALSE; @@ -1375,7 +1375,7 @@ (define_predicate "condexec_sf_add_operator" (match_code "plus,minus") { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); if (mode != VOIDmode && op_mode != mode) return FALSE; @@ -1397,7 +1397,7 @@ (define_predicate "condexec_sf_conv_operator" (match_code "abs,neg") { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); if (mode != VOIDmode && op_mode != mode) return FALSE; diff --git a/gcc/config/h8300/h8300-protos.h b/gcc/config/h8300/h8300-protos.h index e19580b..39e970f 100644 --- a/gcc/config/h8300/h8300-protos.h +++ b/gcc/config/h8300/h8300-protos.h @@ -36,22 +36,22 @@ extern const char *output_simode_bld (int, rtx[]); extern void final_prescan_insn (rtx_insn *, rtx *, int); extern int h8300_expand_movsi (rtx[]); extern void notice_update_cc (rtx, rtx_insn *); -extern const char *output_logical_op (enum machine_mode, rtx *); -extern unsigned int compute_logical_op_length (enum machine_mode, +extern const char *output_logical_op (machine_mode, rtx *); +extern unsigned int compute_logical_op_length (machine_mode, rtx *); #ifdef HAVE_ATTR_cc extern enum attr_cc compute_plussi_cc (rtx *); extern enum attr_cc compute_a_shift_cc (rtx, rtx *); -extern enum attr_cc compute_logical_op_cc (enum machine_mode, rtx *); +extern enum attr_cc compute_logical_op_cc (machine_mode, rtx *); #endif extern void h8300_expand_branch (rtx[]); extern void h8300_expand_store (rtx[]); -extern bool expand_a_shift (enum machine_mode, enum rtx_code, rtx[]); -extern int h8300_shift_needs_scratch_p (int, enum machine_mode); +extern bool expand_a_shift (machine_mode, enum rtx_code, rtx[]); +extern int h8300_shift_needs_scratch_p (int, machine_mode); extern int expand_a_rotate (rtx[]); extern int fix_bit_operand (rtx *, enum rtx_code); extern int h8300_adjust_insn_length (rtx, int); -extern void split_adds_subs (enum machine_mode, rtx[]); +extern void split_adds_subs (machine_mode, rtx[]); extern int h8300_eightbit_constant_address_p (rtx); extern int h8300_tiny_constant_address_p (rtx); @@ -81,7 +81,7 @@ enum h8sx_shift_type { H8SX_SHIFT_BINARY }; -extern enum h8sx_shift_type h8sx_classify_shift (enum machine_mode, enum rtx_code, rtx); +extern enum h8sx_shift_type h8sx_classify_shift (machine_mode, enum rtx_code, rtx); extern int h8300_ldm_stm_parallel (rtvec, int, int); #endif /* RTX_CODE */ @@ -99,8 +99,8 @@ extern int h8300_current_function_monitor_function_p (void); extern int h8300_initial_elimination_offset (int, int); extern int h8300_regs_ok_for_stm (int, rtx[]); extern int h8300_hard_regno_rename_ok (unsigned int, unsigned int); -extern int h8300_hard_regno_nregs (int, enum machine_mode); -extern int h8300_hard_regno_mode_ok (int, enum machine_mode); +extern int h8300_hard_regno_nregs (int, machine_mode); +extern int h8300_hard_regno_mode_ok (int, machine_mode); extern bool h8300_move_ok (rtx, rtx); struct cpp_reader; diff --git a/gcc/config/h8300/h8300.c b/gcc/config/h8300/h8300.c index 62a6c48..7f5ef5b 100644 --- a/gcc/config/h8300/h8300.c +++ b/gcc/config/h8300/h8300.c @@ -115,7 +115,7 @@ static bool h8300_print_operand_punct_valid_p (unsigned char code); #ifndef OBJECT_FORMAT_ELF static void h8300_asm_named_section (const char *, unsigned int, tree); #endif -static int h8300_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); +static int h8300_register_move_cost (machine_mode, reg_class_t, reg_class_t); static int h8300_and_costs (rtx); static int h8300_shift_costs (rtx); static void h8300_push_pop (int, int, bool, bool); @@ -133,7 +133,7 @@ static unsigned int h8300_binary_length (rtx_insn *, const h8300_lengt static bool h8300_short_move_mem_p (rtx, enum rtx_code); static unsigned int h8300_move_length (rtx *, const h8300_length_table *); static bool h8300_hard_regno_scratch_ok (unsigned int); -static rtx h8300_get_index (rtx, enum machine_mode mode, int *); +static rtx h8300_get_index (rtx, machine_mode mode, int *); /* CPU_TYPE, says what cpu we're compiling for. */ int cpu_type; @@ -1014,7 +1014,7 @@ h8300_file_end (void) instead of adds/subs. */ void -split_adds_subs (enum machine_mode mode, rtx *operands) +split_adds_subs (machine_mode mode, rtx *operands) { HOST_WIDE_INT val = INTVAL (operands[1]); rtx reg = operands[0]; @@ -1087,7 +1087,7 @@ h8300_pr_saveall (struct cpp_reader *pfile ATTRIBUTE_UNUSED) case the first 3 arguments are passed in registers. */ static rtx -h8300_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +h8300_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1160,7 +1160,7 @@ h8300_function_arg (cumulative_args_t cum_v, enum machine_mode mode, (TYPE is null for libcalls where that information may not be available.) */ static void -h8300_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +h8300_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1178,7 +1178,7 @@ h8300_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, shortcuts. */ static int -h8300_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +h8300_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { if (from == MAC_REGS || to == MAC_REG) @@ -2117,7 +2117,7 @@ notice_update_cc (rtx body, rtx_insn *insn) if the address is known to be valid, but its mode is unknown. */ static rtx -h8300_get_index (rtx x, enum machine_mode mode, int *size) +h8300_get_index (rtx x, machine_mode mode, int *size) { int dummy, factor; @@ -2792,7 +2792,7 @@ compute_mov_length (rtx *operands) length, assuming the largest addressing mode is used, and then adjust later in the function. Otherwise, we compute and return the exact length in one step. */ - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); rtx dest = operands[0]; rtx src = operands[1]; rtx addr; @@ -3042,7 +3042,7 @@ compute_mov_length (rtx *operands) const char * output_plussi (rtx *operands) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); gcc_assert (mode == SImode); @@ -3126,7 +3126,7 @@ output_plussi (rtx *operands) unsigned int compute_plussi_length (rtx *operands) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); gcc_assert (mode == SImode); @@ -3205,7 +3205,7 @@ compute_plussi_length (rtx *operands) enum attr_cc compute_plussi_cc (rtx *operands) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); gcc_assert (mode == SImode); @@ -3260,7 +3260,7 @@ compute_plussi_cc (rtx *operands) /* Output a logical insn. */ const char * -output_logical_op (enum machine_mode mode, rtx *operands) +output_logical_op (machine_mode mode, rtx *operands) { /* Figure out the logical op that we need to perform. */ enum rtx_code code = GET_CODE (operands[3]); @@ -3441,7 +3441,7 @@ output_logical_op (enum machine_mode mode, rtx *operands) /* Compute the length of a logical insn. */ unsigned int -compute_logical_op_length (enum machine_mode mode, rtx *operands) +compute_logical_op_length (machine_mode mode, rtx *operands) { /* Figure out the logical op that we need to perform. */ enum rtx_code code = GET_CODE (operands[3]); @@ -3587,7 +3587,7 @@ compute_logical_op_length (enum machine_mode mode, rtx *operands) /* Compute which flag bits are valid after a logical insn. */ enum attr_cc -compute_logical_op_cc (enum machine_mode mode, rtx *operands) +compute_logical_op_cc (machine_mode mode, rtx *operands) { /* Figure out the logical op that we need to perform. */ enum rtx_code code = GET_CODE (operands[3]); @@ -3745,7 +3745,7 @@ h8300_expand_store (rtx operands[]) /* Classify a shift with the given mode and code. OP is the shift amount. */ enum h8sx_shift_type -h8sx_classify_shift (enum machine_mode mode, enum rtx_code code, rtx op) +h8sx_classify_shift (machine_mode mode, enum rtx_code code, rtx op) { if (!TARGET_H8300SX) return H8SX_SHIFT_NONE; @@ -3837,7 +3837,7 @@ output_h8sx_shift (rtx *operands, int suffix, int optype) /* Emit code to do shifts. */ bool -expand_a_shift (enum machine_mode mode, enum rtx_code code, rtx operands[]) +expand_a_shift (machine_mode mode, enum rtx_code code, rtx operands[]) { switch (h8sx_classify_shift (mode, code, operands[2])) { @@ -4516,7 +4516,7 @@ get_shift_alg (enum shift_type shift_type, enum shift_mode shift_mode, needed for some shift with COUNT and MODE. Return 0 otherwise. */ int -h8300_shift_needs_scratch_p (int count, enum machine_mode mode) +h8300_shift_needs_scratch_p (int count, machine_mode mode) { enum h8_cpu cpu; int a, lr, ar; @@ -4569,7 +4569,7 @@ output_a_shift (rtx *operands) { static int loopend_lab; rtx shift = operands[3]; - enum machine_mode mode = GET_MODE (shift); + machine_mode mode = GET_MODE (shift); enum rtx_code code = GET_CODE (shift); enum shift_type shift_type; enum shift_mode shift_mode; @@ -4739,7 +4739,7 @@ unsigned int compute_a_shift_length (rtx insn ATTRIBUTE_UNUSED, rtx *operands) { rtx shift = operands[3]; - enum machine_mode mode = GET_MODE (shift); + machine_mode mode = GET_MODE (shift); enum rtx_code code = GET_CODE (shift); enum shift_type shift_type; enum shift_mode shift_mode; @@ -4887,7 +4887,7 @@ enum attr_cc compute_a_shift_cc (rtx insn ATTRIBUTE_UNUSED, rtx *operands) { rtx shift = operands[3]; - enum machine_mode mode = GET_MODE (shift); + machine_mode mode = GET_MODE (shift); enum rtx_code code = GET_CODE (shift); enum shift_type shift_type; enum shift_mode shift_mode; @@ -4982,7 +4982,7 @@ expand_a_rotate (rtx operands[]) rtx dst = operands[0]; rtx src = operands[1]; rtx rotate_amount = operands[2]; - enum machine_mode mode = GET_MODE (dst); + machine_mode mode = GET_MODE (dst); if (h8sx_classify_shift (mode, ROTATE, rotate_amount) == H8SX_SHIFT_UNARY) return false; @@ -5066,7 +5066,7 @@ output_a_rotate (enum rtx_code code, rtx *operands) const char *insn_buf; int bits; int amount; - enum machine_mode mode = GET_MODE (dst); + machine_mode mode = GET_MODE (dst); gcc_assert (GET_CODE (rotate_amount) == CONST_INT); @@ -5169,7 +5169,7 @@ compute_a_rotate_length (rtx *operands) { rtx src = operands[1]; rtx amount_rtx = operands[2]; - enum machine_mode mode = GET_MODE (src); + machine_mode mode = GET_MODE (src); int amount; unsigned int length = 0; @@ -5848,7 +5848,7 @@ h8300_rtx_ok_for_base_p (rtx x, int strict) CONSTANT_ADDRESS. */ static bool -h8300_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +h8300_legitimate_address_p (machine_mode mode, rtx x, bool strict) { /* The register indirect addresses like @er0 is always valid. */ if (h8300_rtx_ok_for_base_p (x, strict)) @@ -5880,7 +5880,7 @@ h8300_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) types on the H8 series to handle more than 32bits. */ int -h8300_hard_regno_nregs (int regno ATTRIBUTE_UNUSED, enum machine_mode mode) +h8300_hard_regno_nregs (int regno ATTRIBUTE_UNUSED, machine_mode mode) { return (GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD; } @@ -5888,7 +5888,7 @@ h8300_hard_regno_nregs (int regno ATTRIBUTE_UNUSED, enum machine_mode mode) /* Worker function for HARD_REGNO_MODE_OK. */ int -h8300_hard_regno_mode_ok (int regno, enum machine_mode mode) +h8300_hard_regno_mode_ok (int regno, machine_mode mode) { if (TARGET_H8300) /* If an even reg, then anything goes. Otherwise the mode must be @@ -5962,7 +5962,7 @@ h8300_function_value (const_tree ret_type, On the H8 the return value is in R0/R1. */ static rtx -h8300_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +h8300_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, R0_REG); } diff --git a/gcc/config/i386/i386-builtin-types.awk b/gcc/config/i386/i386-builtin-types.awk index 3fc1455..dc06788 100644 --- a/gcc/config/i386/i386-builtin-types.awk +++ b/gcc/config/i386/i386-builtin-types.awk @@ -179,7 +179,7 @@ END { # The vector types are defined via two tables defining the real # machine mode and the builtin primitive type. We use two tables # rather than a structure to avoid structure padding and save space. - print "static const enum machine_mode ix86_builtin_type_vect_mode[] = {" + print "static const machine_mode ix86_builtin_type_vect_mode[] = {" for (i = 0; i < vect_defs; ++i) { if (i == 0) printf " " diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index c54bdb4..81a1f11 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -52,11 +52,11 @@ extern bool symbolic_reference_mentioned_p (rtx); extern bool extended_reg_mentioned_p (rtx); extern bool x86_extended_QIreg_mentioned_p (rtx_insn *); extern bool x86_extended_reg_mentioned_p (rtx); -extern bool x86_maybe_negate_const_int (rtx *, enum machine_mode); -extern enum machine_mode ix86_cc_mode (enum rtx_code, rtx, rtx); +extern bool x86_maybe_negate_const_int (rtx *, machine_mode); +extern machine_mode ix86_cc_mode (enum rtx_code, rtx, rtx); -extern int avx_vpermilp_parallel (rtx par, enum machine_mode mode); -extern int avx_vperm2f128_parallel (rtx par, enum machine_mode mode); +extern int avx_vpermilp_parallel (rtx par, machine_mode mode); +extern int avx_vperm2f128_parallel (rtx par, machine_mode mode); extern bool ix86_expand_strlen (rtx, rtx, rtx, rtx); extern bool ix86_expand_set_or_movmem (rtx, rtx, rtx, rtx, rtx, rtx, @@ -65,12 +65,12 @@ extern bool ix86_expand_set_or_movmem (rtx, rtx, rtx, rtx, rtx, rtx, extern bool constant_address_p (rtx); extern bool legitimate_pic_operand_p (rtx); extern bool legitimate_pic_address_disp_p (rtx); -extern bool ix86_legitimize_reload_address (rtx, enum machine_mode, +extern bool ix86_legitimize_reload_address (rtx, machine_mode, int, int, int); extern void print_reg (rtx, int, FILE*); extern void ix86_print_operand (FILE *, rtx, int); -extern void split_double_mode (enum machine_mode, rtx[], int, rtx[], rtx[]); +extern void split_double_mode (machine_mode, rtx[], int, rtx[], rtx[]); extern const char *output_set_got (rtx, rtx); extern const char *output_387_binary_op (rtx, rtx*); @@ -81,30 +81,30 @@ extern const char *output_adjust_stack_and_probe (rtx); extern const char *output_probe_stack_range (rtx, rtx); extern void ix86_expand_clear (rtx); -extern void ix86_expand_move (enum machine_mode, rtx[]); -extern void ix86_expand_vector_move (enum machine_mode, rtx[]); -extern void ix86_expand_vector_move_misalign (enum machine_mode, rtx[]); +extern void ix86_expand_move (machine_mode, rtx[]); +extern void ix86_expand_vector_move (machine_mode, rtx[]); +extern void ix86_expand_vector_move_misalign (machine_mode, rtx[]); extern rtx ix86_fixup_binary_operands (enum rtx_code, - enum machine_mode, rtx[]); + machine_mode, rtx[]); extern void ix86_fixup_binary_operands_no_copy (enum rtx_code, - enum machine_mode, rtx[]); + machine_mode, rtx[]); extern void ix86_expand_binary_operator (enum rtx_code, - enum machine_mode, rtx[]); + machine_mode, rtx[]); extern void ix86_expand_vector_logical_operator (enum rtx_code, - enum machine_mode, rtx[]); -extern bool ix86_binary_operator_ok (enum rtx_code, enum machine_mode, rtx[]); + machine_mode, rtx[]); +extern bool ix86_binary_operator_ok (enum rtx_code, machine_mode, rtx[]); extern bool ix86_avoid_lea_for_add (rtx_insn *, rtx[]); extern bool ix86_use_lea_for_mov (rtx_insn *, rtx[]); extern bool ix86_avoid_lea_for_addr (rtx_insn *, rtx[]); -extern void ix86_split_lea_for_addr (rtx_insn *, rtx[], enum machine_mode); +extern void ix86_split_lea_for_addr (rtx_insn *, rtx[], machine_mode); extern bool ix86_lea_for_add_ok (rtx_insn *, rtx[]); extern bool ix86_vec_interleave_v2df_operator_ok (rtx operands[3], bool high); extern bool ix86_dep_by_shift_count (const_rtx set_insn, const_rtx use_insn); extern bool ix86_agi_dependent (rtx_insn *set_insn, rtx_insn *use_insn); -extern void ix86_expand_unary_operator (enum rtx_code, enum machine_mode, +extern void ix86_expand_unary_operator (enum rtx_code, machine_mode, rtx[]); -extern rtx ix86_build_const_vector (enum machine_mode, bool, rtx); -extern rtx ix86_build_signbit_mask (enum machine_mode, bool, bool); +extern rtx ix86_build_const_vector (machine_mode, bool, rtx); +extern rtx ix86_build_signbit_mask (machine_mode, bool, bool); extern void ix86_split_convert_uns_si_sse (rtx[]); extern void ix86_expand_convert_uns_didf_sse (rtx, rtx); extern void ix86_expand_convert_uns_sixf_sse (rtx, rtx); @@ -114,13 +114,13 @@ extern void ix86_expand_convert_sign_didf_sse (rtx, rtx); extern void ix86_expand_vector_convert_uns_vsivsf (rtx, rtx); extern rtx ix86_expand_adjust_ufix_to_sfix_si (rtx, rtx *); extern enum ix86_fpcmp_strategy ix86_fp_comparison_strategy (enum rtx_code); -extern void ix86_expand_fp_absneg_operator (enum rtx_code, enum machine_mode, +extern void ix86_expand_fp_absneg_operator (enum rtx_code, machine_mode, rtx[]); extern void ix86_expand_copysign (rtx []); extern void ix86_split_copysign_const (rtx []); extern void ix86_split_copysign_var (rtx []); -extern bool ix86_unary_operator_ok (enum rtx_code, enum machine_mode, rtx[]); -extern bool ix86_match_ccmode (rtx, enum machine_mode); +extern bool ix86_unary_operator_ok (enum rtx_code, machine_mode, rtx[]); +extern bool ix86_match_ccmode (rtx, machine_mode); extern void ix86_expand_branch (enum rtx_code, rtx, rtx, rtx); extern void ix86_expand_setcc (rtx, enum rtx_code, rtx, rtx); extern bool ix86_expand_int_movcc (rtx[]); @@ -136,21 +136,21 @@ extern void ix86_split_call_vzeroupper (rtx, rtx); extern void x86_initialize_trampoline (rtx, rtx, rtx); extern rtx ix86_zero_extend_to_Pmode (rtx); extern void ix86_split_long_move (rtx[]); -extern void ix86_split_ashl (rtx *, rtx, enum machine_mode); -extern void ix86_split_ashr (rtx *, rtx, enum machine_mode); -extern void ix86_split_lshr (rtx *, rtx, enum machine_mode); +extern void ix86_split_ashl (rtx *, rtx, machine_mode); +extern void ix86_split_ashr (rtx *, rtx, machine_mode); +extern void ix86_split_lshr (rtx *, rtx, machine_mode); extern rtx ix86_find_base_term (rtx); extern bool ix86_check_movabs (rtx, int); -extern void ix86_split_idivmod (enum machine_mode, rtx[], bool); +extern void ix86_split_idivmod (machine_mode, rtx[], bool); -extern rtx assign_386_stack_local (enum machine_mode, enum ix86_stack_slot); +extern rtx assign_386_stack_local (machine_mode, enum ix86_stack_slot); extern int ix86_attr_length_immediate_default (rtx_insn *, bool); extern int ix86_attr_length_address_default (rtx_insn *); extern int ix86_attr_length_vex_default (rtx_insn *, bool, bool); -extern enum machine_mode ix86_fp_compare_mode (enum rtx_code); +extern machine_mode ix86_fp_compare_mode (enum rtx_code); -extern rtx ix86_libcall_value (enum machine_mode); +extern rtx ix86_libcall_value (machine_mode); extern bool ix86_function_arg_regno_p (int); extern void ix86_asm_output_function_label (FILE *, const char *, tree); extern void ix86_call_abi_override (const_tree); @@ -158,12 +158,12 @@ extern int ix86_reg_parm_stack_space (const_tree); extern void ix86_split_fp_branch (enum rtx_code code, rtx, rtx, rtx, rtx, rtx); -extern bool ix86_hard_regno_mode_ok (int, enum machine_mode); -extern bool ix86_modes_tieable_p (enum machine_mode, enum machine_mode); +extern bool ix86_hard_regno_mode_ok (int, machine_mode); +extern bool ix86_modes_tieable_p (machine_mode, machine_mode); extern bool ix86_secondary_memory_needed (enum reg_class, enum reg_class, - enum machine_mode, int); -extern bool ix86_cannot_change_mode_class (enum machine_mode, - enum machine_mode, enum reg_class); + machine_mode, int); +extern bool ix86_cannot_change_mode_class (machine_mode, + machine_mode, enum reg_class); extern bool ix86_libc_has_function (enum function_class fn_class); @@ -174,10 +174,10 @@ extern void ix86_emit_fp_unordered_jump (rtx); extern void ix86_emit_i387_log1p (rtx, rtx); extern void ix86_emit_i387_round (rtx, rtx); -extern void ix86_emit_swdivsf (rtx, rtx, rtx, enum machine_mode); -extern void ix86_emit_swsqrtsf (rtx, rtx, enum machine_mode, bool); +extern void ix86_emit_swdivsf (rtx, rtx, rtx, machine_mode); +extern void ix86_emit_swsqrtsf (rtx, rtx, machine_mode, bool); -extern enum rtx_code ix86_reverse_condition (enum rtx_code, enum machine_mode); +extern enum rtx_code ix86_reverse_condition (enum rtx_code, machine_mode); extern void ix86_expand_lround (rtx, rtx); extern void ix86_expand_lfloorceil (rtx, rtx, bool); @@ -200,9 +200,9 @@ extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int); #ifdef TREE_CODE extern int ix86_data_alignment (tree, int, bool); -extern unsigned int ix86_local_alignment (tree, enum machine_mode, +extern unsigned int ix86_local_alignment (tree, machine_mode, unsigned int); -extern unsigned int ix86_minimum_alignment (tree, enum machine_mode, +extern unsigned int ix86_minimum_alignment (tree, machine_mode, unsigned int); extern int ix86_constant_alignment (tree, int); extern tree ix86_handle_shared_attribute (tree *, tree, tree, int, bool *); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 2442f34..139b07c 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -2415,12 +2415,12 @@ static bool ext_80387_constants_init = 0; static struct machine_function * ix86_init_machine_status (void); static rtx ix86_function_value (const_tree, const_tree, bool); static bool ix86_function_value_regno_p (const unsigned int); -static unsigned int ix86_function_arg_boundary (enum machine_mode, +static unsigned int ix86_function_arg_boundary (machine_mode, const_tree); static rtx ix86_static_chain (const_tree, bool); static int ix86_function_regparm (const_tree, const_tree); static void ix86_compute_frame_layout (struct ix86_frame *); -static bool ix86_expand_vector_init_one_nonzero (bool, enum machine_mode, +static bool ix86_expand_vector_init_one_nonzero (bool, machine_mode, rtx, rtx, int); static void ix86_add_new_builtins (HOST_WIDE_INT); static tree ix86_canonical_va_list_type (tree); @@ -5875,7 +5875,7 @@ ix86_legitimate_combined_insn (rtx_insn *insn) for (i = 0; i < n_operands; i++) { rtx op = recog_data.operand[i]; - enum machine_mode mode = GET_MODE (op); + machine_mode mode = GET_MODE (op); const operand_alternative *op_alt; int offset = 0; bool win; @@ -5999,7 +5999,7 @@ ix86_function_arg_regno_p (int regno) /* Return if we do not know how to pass TYPE solely in registers. */ static bool -ix86_must_pass_in_stack (enum machine_mode mode, const_tree type) +ix86_must_pass_in_stack (machine_mode mode, const_tree type) { if (must_pass_in_stack_var_size_or_pad (mode, type)) return true; @@ -6341,11 +6341,11 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, /* Argument info to initialize */ If INT_RETURN is true, warn ABI change if the vector mode isn't available for function return value. */ -static enum machine_mode +static machine_mode type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum, bool in_return) { - enum machine_mode mode = TYPE_MODE (type); + machine_mode mode = TYPE_MODE (type); if (TREE_CODE (type) == VECTOR_TYPE && !VECTOR_MODE_P (mode)) { @@ -6354,7 +6354,7 @@ type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum, /* ??? Generic code allows us to create width 1 vectors. Ignore. */ && TYPE_VECTOR_SUBPARTS (type) > 1) { - enum machine_mode innermode = TYPE_MODE (TREE_TYPE (type)); + machine_mode innermode = TYPE_MODE (TREE_TYPE (type)); if (TREE_CODE (TREE_TYPE (type)) == REAL_TYPE) mode = MIN_MODE_VECTOR_FLOAT; @@ -6459,7 +6459,7 @@ type_natural_mode (const_tree type, const CUMULATIVE_ARGS *cum, go ahead and use it. Otherwise we have to build a PARALLEL instead. */ static rtx -gen_reg_or_parallel (enum machine_mode mode, enum machine_mode orig_mode, +gen_reg_or_parallel (machine_mode mode, machine_mode orig_mode, unsigned int regno) { rtx tmp; @@ -6536,7 +6536,7 @@ merge_classes (enum x86_64_reg_class class1, enum x86_64_reg_class class2) */ static int -classify_argument (enum machine_mode mode, const_tree type, +classify_argument (machine_mode mode, const_tree type, enum x86_64_reg_class classes[MAX_CLASSES], int bit_offset) { HOST_WIDE_INT bytes = @@ -6939,7 +6939,7 @@ classify_argument (enum machine_mode mode, const_tree type, class. Return true iff parameter should be passed in memory. */ static bool -examine_argument (enum machine_mode mode, const_tree type, int in_return, +examine_argument (machine_mode mode, const_tree type, int in_return, int *int_nregs, int *sse_nregs) { enum x86_64_reg_class regclass[MAX_CLASSES]; @@ -6982,7 +6982,7 @@ examine_argument (enum machine_mode mode, const_tree type, int in_return, FUNCTION_ARG for the detailed description. */ static rtx -construct_container (enum machine_mode mode, enum machine_mode orig_mode, +construct_container (machine_mode mode, machine_mode orig_mode, const_tree type, int in_return, int nintregs, int nsseregs, const int *intreg, int sse_regno) { @@ -6991,7 +6991,7 @@ construct_container (enum machine_mode mode, enum machine_mode orig_mode, static bool issued_sse_ret_error; static bool issued_x87_ret_error; - enum machine_mode tmpmode; + machine_mode tmpmode; int bytes = (mode == BLKmode) ? int_size_in_bytes (type) : (int) GET_MODE_SIZE (mode); enum x86_64_reg_class regclass[MAX_CLASSES]; @@ -7220,7 +7220,7 @@ construct_container (enum machine_mode mode, enum machine_mode orig_mode, may not be available.) */ static void -function_arg_advance_32 (CUMULATIVE_ARGS *cum, enum machine_mode mode, +function_arg_advance_32 (CUMULATIVE_ARGS *cum, machine_mode mode, const_tree type, HOST_WIDE_INT bytes, HOST_WIDE_INT words) { @@ -7315,7 +7315,7 @@ function_arg_advance_32 (CUMULATIVE_ARGS *cum, enum machine_mode mode, } static void -function_arg_advance_64 (CUMULATIVE_ARGS *cum, enum machine_mode mode, +function_arg_advance_64 (CUMULATIVE_ARGS *cum, machine_mode mode, const_tree type, HOST_WIDE_INT words, bool named) { int int_nregs, sse_nregs; @@ -7361,7 +7361,7 @@ function_arg_advance_ms_64 (CUMULATIVE_ARGS *cum, HOST_WIDE_INT bytes, may not be available.) */ static void -ix86_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +ix86_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -7398,8 +7398,8 @@ ix86_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, (otherwise it is an extra parameter matching an ellipsis). */ static rtx -function_arg_32 (const CUMULATIVE_ARGS *cum, enum machine_mode mode, - enum machine_mode orig_mode, const_tree type, +function_arg_32 (const CUMULATIVE_ARGS *cum, machine_mode mode, + machine_mode orig_mode, const_tree type, HOST_WIDE_INT bytes, HOST_WIDE_INT words) { /* Avoid the AL settings for the Unix64 ABI. */ @@ -7508,8 +7508,8 @@ function_arg_32 (const CUMULATIVE_ARGS *cum, enum machine_mode mode, } static rtx -function_arg_64 (const CUMULATIVE_ARGS *cum, enum machine_mode mode, - enum machine_mode orig_mode, const_tree type, bool named) +function_arg_64 (const CUMULATIVE_ARGS *cum, machine_mode mode, + machine_mode orig_mode, const_tree type, bool named) { /* Handle a hidden AL argument containing number of registers for varargs x86-64 functions. */ @@ -7550,8 +7550,8 @@ function_arg_64 (const CUMULATIVE_ARGS *cum, enum machine_mode mode, } static rtx -function_arg_ms_64 (const CUMULATIVE_ARGS *cum, enum machine_mode mode, - enum machine_mode orig_mode, bool named, +function_arg_ms_64 (const CUMULATIVE_ARGS *cum, machine_mode mode, + machine_mode orig_mode, bool named, HOST_WIDE_INT bytes) { unsigned int regno; @@ -7608,11 +7608,11 @@ function_arg_ms_64 (const CUMULATIVE_ARGS *cum, enum machine_mode mode, ellipsis). */ static rtx -ix86_function_arg (cumulative_args_t cum_v, enum machine_mode omode, +ix86_function_arg (cumulative_args_t cum_v, machine_mode omode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); - enum machine_mode mode = omode; + machine_mode mode = omode; HOST_WIDE_INT bytes, words; rtx arg; @@ -7644,7 +7644,7 @@ ix86_function_arg (cumulative_args_t cum_v, enum machine_mode omode, appropriate for passing a pointer to that type. */ static bool -ix86_pass_by_reference (cumulative_args_t cum_v, enum machine_mode mode, +ix86_pass_by_reference (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -7688,7 +7688,7 @@ ix86_pass_by_reference (cumulative_args_t cum_v, enum machine_mode mode, static bool ix86_compat_aligned_value_p (const_tree type) { - enum machine_mode mode = TYPE_MODE (type); + machine_mode mode = TYPE_MODE (type); if (((TARGET_SSE && SSE_REG_MODE_P (mode)) || mode == TDmode || mode == TFmode @@ -7737,7 +7737,7 @@ ix86_compat_aligned_value_p (const_tree type) compatibility with previous versions of GCC. */ static unsigned int -ix86_compat_function_arg_boundary (enum machine_mode mode, +ix86_compat_function_arg_boundary (machine_mode mode, const_tree type, unsigned int align) { /* In 32bit, only _Decimal128 and __float128 are aligned to their @@ -7773,7 +7773,7 @@ ix86_compat_function_arg_boundary (enum machine_mode mode, static bool ix86_contains_aligned_value_p (const_tree type) { - enum machine_mode mode = TYPE_MODE (type); + machine_mode mode = TYPE_MODE (type); if (mode == XFmode || mode == XCmode) return false; @@ -7824,7 +7824,7 @@ ix86_contains_aligned_value_p (const_tree type) specified mode and type. */ static unsigned int -ix86_function_arg_boundary (enum machine_mode mode, const_tree type) +ix86_function_arg_boundary (machine_mode mode, const_tree type) { unsigned int align; if (type) @@ -7919,7 +7919,7 @@ ix86_function_value_regno_p (const unsigned int regno) otherwise, FUNC is 0. */ static rtx -function_value_32 (enum machine_mode orig_mode, enum machine_mode mode, +function_value_32 (machine_mode orig_mode, machine_mode mode, const_tree fntype, const_tree fn) { unsigned int regno; @@ -7969,7 +7969,7 @@ function_value_32 (enum machine_mode orig_mode, enum machine_mode mode, } static rtx -function_value_64 (enum machine_mode orig_mode, enum machine_mode mode, +function_value_64 (machine_mode orig_mode, machine_mode mode, const_tree valtype) { rtx ret; @@ -8022,7 +8022,7 @@ function_value_64 (enum machine_mode orig_mode, enum machine_mode mode, } static rtx -function_value_ms_64 (enum machine_mode orig_mode, enum machine_mode mode, +function_value_ms_64 (machine_mode orig_mode, machine_mode mode, const_tree valtype) { unsigned int regno = AX_REG; @@ -8056,7 +8056,7 @@ function_value_ms_64 (enum machine_mode orig_mode, enum machine_mode mode, static rtx ix86_function_value_1 (const_tree valtype, const_tree fntype_or_decl, - enum machine_mode orig_mode, enum machine_mode mode) + machine_mode orig_mode, machine_mode mode) { const_tree fn, fntype; @@ -8076,7 +8076,7 @@ ix86_function_value_1 (const_tree valtype, const_tree fntype_or_decl, static rtx ix86_function_value (const_tree valtype, const_tree fntype_or_decl, bool) { - enum machine_mode mode, orig_mode; + machine_mode mode, orig_mode; orig_mode = TYPE_MODE (valtype); mode = type_natural_mode (valtype, NULL, true); @@ -8086,8 +8086,8 @@ ix86_function_value (const_tree valtype, const_tree fntype_or_decl, bool) /* Pointer function arguments and return values are promoted to word_mode. */ -static enum machine_mode -ix86_promote_function_mode (const_tree type, enum machine_mode mode, +static machine_mode +ix86_promote_function_mode (const_tree type, machine_mode mode, int *punsignedp, const_tree fntype, int for_return) { @@ -8104,7 +8104,7 @@ ix86_promote_function_mode (const_tree type, enum machine_mode mode, should be accessed using BLKmode. */ static bool -ix86_member_type_forces_blk (const_tree field, enum machine_mode mode) +ix86_member_type_forces_blk (const_tree field, machine_mode mode) { /* Union with XFmode must be in BLKmode. */ return (mode == XFmode @@ -8113,7 +8113,7 @@ ix86_member_type_forces_blk (const_tree field, enum machine_mode mode) } rtx -ix86_libcall_value (enum machine_mode mode) +ix86_libcall_value (machine_mode mode) { return ix86_function_value_1 (NULL, NULL, mode, mode); } @@ -8126,7 +8126,7 @@ ix86_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) #ifdef SUBTARGET_RETURN_IN_MEMORY return SUBTARGET_RETURN_IN_MEMORY (type, fntype); #else - const enum machine_mode mode = type_natural_mode (type, NULL, true); + const machine_mode mode = type_natural_mode (type, NULL, true); HOST_WIDE_INT size; if (TARGET_64BIT) @@ -8347,7 +8347,7 @@ setup_incoming_varargs_64 (CUMULATIVE_ARGS *cum) if (ix86_varargs_fpr_size) { - enum machine_mode smode; + machine_mode smode; rtx_code_label *label; rtx test; @@ -8415,7 +8415,7 @@ setup_incoming_varargs_ms_64 (CUMULATIVE_ARGS *cum) } static void -ix86_setup_incoming_varargs (cumulative_args_t cum_v, enum machine_mode mode, +ix86_setup_incoming_varargs (cumulative_args_t cum_v, machine_mode mode, tree type, int *, int no_rtl) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -8604,7 +8604,7 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, rtx container; int indirect_p = 0; tree ptrtype; - enum machine_mode nat_mode; + machine_mode nat_mode; unsigned int arg_boundary; /* Only 64bit target needs something special. */ @@ -8766,7 +8766,7 @@ ix86_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, { rtx slot = XVECEXP (container, 0, i); rtx reg = XEXP (slot, 0); - enum machine_mode mode = GET_MODE (reg); + machine_mode mode = GET_MODE (reg); tree piece_type; tree addr_type; tree daddr_type; @@ -8935,7 +8935,7 @@ init_ext_80387_constants (void) int standard_80387_constant_p (rtx x) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); REAL_VALUE_TYPE r; @@ -9040,7 +9040,7 @@ standard_80387_constant_rtx (int idx) int standard_sse_constant_p (rtx x) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (x == const0_rtx || x == CONST0_RTX (GET_MODE (x))) return 1; @@ -9949,7 +9949,7 @@ ix86_emit_save_regs (void) /* Emit a single register save at CFA - CFA_OFFSET. */ static void -ix86_emit_save_reg_using_mov (enum machine_mode mode, unsigned int regno, +ix86_emit_save_reg_using_mov (machine_mode mode, unsigned int regno, HOST_WIDE_INT cfa_offset) { struct machine_function *m = cfun->machine; @@ -12454,7 +12454,7 @@ ix86_decompose_address (rtx addr, struct ix86_address *out) requires to two regs - that would mean more pseudos with longer lifetimes. */ static int -ix86_address_cost (rtx x, enum machine_mode, addr_space_t, bool) +ix86_address_cost (rtx x, machine_mode, addr_space_t, bool) { struct ix86_address parts; int cost = 1; @@ -12530,7 +12530,7 @@ darwin_local_data_pic (rtx disp) satisfies CONSTANT_P. */ static bool -ix86_legitimate_constant_p (enum machine_mode, rtx x) +ix86_legitimate_constant_p (machine_mode, rtx x) { switch (GET_CODE (x)) { @@ -12616,7 +12616,7 @@ ix86_legitimate_constant_p (enum machine_mode, rtx x) is checked above. */ static bool -ix86_cannot_force_const_mem (enum machine_mode mode, rtx x) +ix86_cannot_force_const_mem (machine_mode mode, rtx x) { /* We can always put integral constants and vectors in memory. */ switch (GET_CODE (x)) @@ -12855,7 +12855,7 @@ legitimate_pic_address_disp_p (rtx disp) 0 if it should not. */ bool -ix86_legitimize_reload_address (rtx x, enum machine_mode, int opnum, int type, +ix86_legitimize_reload_address (rtx x, machine_mode, int opnum, int type, int) { /* Reload can generate: @@ -12912,7 +12912,7 @@ ix86_legitimize_reload_address (rtx x, enum machine_mode, int opnum, int type, static rtx ix86_validate_address_register (rtx op) { - enum machine_mode mode = GET_MODE (op); + machine_mode mode = GET_MODE (op); /* Only SImode or DImode registers can form the address. */ if (mode != SImode && mode != DImode) @@ -12953,7 +12953,7 @@ ix86_validate_address_register (rtx op) be recognized. */ static bool -ix86_legitimate_address_p (enum machine_mode, rtx addr, bool strict) +ix86_legitimate_address_p (machine_mode, rtx addr, bool strict) { struct ix86_address parts; rtx base, index, disp; @@ -13392,7 +13392,7 @@ legitimize_pic_address (rtx orig, rtx reg) else { rtx base = legitimize_pic_address (op0, reg); - enum machine_mode mode = GET_MODE (base); + machine_mode mode = GET_MODE (base); new_rtx = legitimize_pic_address (op1, base == reg ? NULL_RTX : reg); @@ -13428,7 +13428,7 @@ legitimize_pic_address (rtx orig, rtx reg) /* Load the thread pointer. If TO_REG is true, force it into a register. */ static rtx -get_thread_pointer (enum machine_mode tp_mode, bool to_reg) +get_thread_pointer (machine_mode tp_mode, bool to_reg) { rtx tp = gen_rtx_UNSPEC (ptr_mode, gen_rtvec (1, const0_rtx), UNSPEC_TP); @@ -13501,7 +13501,7 @@ legitimize_tls_address (rtx x, enum tls_model model, bool for_mov) { rtx dest, base, off; rtx pic = NULL_RTX, tp = NULL_RTX; - enum machine_mode tp_mode = Pmode; + machine_mode tp_mode = Pmode; int type; /* Fall back to global dynamic model if tool chain cannot support local @@ -13898,7 +13898,7 @@ legitimize_pe_coff_symbol (rtx addr, bool inreg) See comments by legitimize_pic_address in i386.c for details. */ static rtx -ix86_legitimize_address (rtx x, rtx, enum machine_mode mode) +ix86_legitimize_address (rtx x, rtx, machine_mode mode) { int changed = 0; unsigned log; @@ -14534,7 +14534,7 @@ ix86_find_base_term (rtx x) } static void -put_condition_code (enum rtx_code code, enum machine_mode mode, bool reverse, +put_condition_code (enum rtx_code code, machine_mode mode, bool reverse, bool fp, FILE *file) { const char *suffix; @@ -15847,10 +15847,10 @@ i386_asm_output_addr_const_extra (FILE *file, rtx x) that parallel "operands". */ void -split_double_mode (enum machine_mode mode, rtx operands[], +split_double_mode (machine_mode mode, rtx operands[], int num, rtx lo_half[], rtx hi_half[]) { - enum machine_mode half_mode; + machine_mode half_mode; unsigned int byte; switch (mode) @@ -16797,7 +16797,7 @@ maybe_get_pool_constant (rtx x) } void -ix86_expand_move (enum machine_mode mode, rtx operands[]) +ix86_expand_move (machine_mode mode, rtx operands[]) { rtx op0, op1; enum tls_model model; @@ -16944,7 +16944,7 @@ ix86_expand_move (enum machine_mode mode, rtx operands[]) } void -ix86_expand_vector_move (enum machine_mode mode, rtx operands[]) +ix86_expand_vector_move (machine_mode mode, rtx operands[]) { rtx op0 = operands[0], op1 = operands[1]; unsigned int align = GET_MODE_ALIGNMENT (mode); @@ -17010,7 +17010,7 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1) rtx (*extract) (rtx, rtx, rtx); rtx (*load_unaligned) (rtx, rtx); rtx (*store_unaligned) (rtx, rtx); - enum machine_mode mode; + machine_mode mode; switch (GET_MODE (op0)) { @@ -17125,7 +17125,7 @@ ix86_avx256_split_vector_move_misalign (rtx op0, rtx op1) */ void -ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[]) +ix86_expand_vector_move_misalign (machine_mode mode, rtx operands[]) { rtx op0, op1, orig_op0 = NULL_RTX, m; rtx (*load_unaligned) (rtx, rtx); @@ -17383,7 +17383,7 @@ ix86_expand_vector_move_misalign (enum machine_mode mode, rtx operands[]) operand order. Returns true if the operands should be swapped. */ static bool -ix86_swap_binary_operands_p (enum rtx_code code, enum machine_mode mode, +ix86_swap_binary_operands_p (enum rtx_code code, machine_mode mode, rtx operands[]) { rtx dst = operands[0]; @@ -17421,7 +17421,7 @@ ix86_swap_binary_operands_p (enum rtx_code code, enum machine_mode mode, destination in operands[0], a copy operation will be required. */ rtx -ix86_fixup_binary_operands (enum rtx_code code, enum machine_mode mode, +ix86_fixup_binary_operands (enum rtx_code code, machine_mode mode, rtx operands[]) { rtx dst = operands[0]; @@ -17485,7 +17485,7 @@ ix86_fixup_binary_operands (enum rtx_code code, enum machine_mode mode, void ix86_fixup_binary_operands_no_copy (enum rtx_code code, - enum machine_mode mode, rtx operands[]) + machine_mode mode, rtx operands[]) { rtx dst = ix86_fixup_binary_operands (code, mode, operands); gcc_assert (dst == operands[0]); @@ -17496,7 +17496,7 @@ ix86_fixup_binary_operands_no_copy (enum rtx_code code, memory references (one output, two input) in a single insn. */ void -ix86_expand_binary_operator (enum rtx_code code, enum machine_mode mode, +ix86_expand_binary_operator (enum rtx_code code, machine_mode mode, rtx operands[]) { rtx src1, src2, dst, op, clob; @@ -17537,7 +17537,7 @@ ix86_expand_binary_operator (enum rtx_code code, enum machine_mode mode, the given OPERANDS. */ void -ix86_expand_vector_logical_operator (enum rtx_code code, enum machine_mode mode, +ix86_expand_vector_logical_operator (enum rtx_code code, machine_mode mode, rtx operands[]) { rtx op1 = NULL_RTX, op2 = NULL_RTX; @@ -17615,7 +17615,7 @@ ix86_expand_vector_logical_operator (enum rtx_code code, enum machine_mode mode, appropriate constraints. */ bool -ix86_binary_operator_ok (enum rtx_code code, enum machine_mode mode, +ix86_binary_operator_ok (enum rtx_code code, machine_mode mode, rtx operands[3]) { rtx dst = operands[0]; @@ -17659,7 +17659,7 @@ ix86_binary_operator_ok (enum rtx_code code, enum machine_mode mode, memory references (one output, one input) in a single insn. */ void -ix86_expand_unary_operator (enum rtx_code code, enum machine_mode mode, +ix86_expand_unary_operator (enum rtx_code code, machine_mode mode, rtx operands[]) { int matching_memory; @@ -17708,7 +17708,7 @@ ix86_expand_unary_operator (enum rtx_code code, enum machine_mode mode, divisor are within the range [0-255]. */ void -ix86_split_idivmod (enum machine_mode mode, rtx operands[], +ix86_split_idivmod (machine_mode mode, rtx operands[], bool signed_p) { rtx_code_label *end_label, *qimode_label; @@ -18362,7 +18362,7 @@ ix86_avoid_lea_for_addr (rtx_insn *insn, rtx operands[]) matches destination. RTX includes clobber of FLAGS_REG. */ static void -ix86_emit_binop (enum rtx_code code, enum machine_mode mode, +ix86_emit_binop (enum rtx_code code, machine_mode mode, rtx dst, rtx src) { rtx op, clob; @@ -18407,7 +18407,7 @@ find_nearest_reg_def (rtx_insn *insn, int regno1, int regno2) at lea position. */ void -ix86_split_lea_for_addr (rtx_insn *insn, rtx operands[], enum machine_mode mode) +ix86_split_lea_for_addr (rtx_insn *insn, rtx operands[], machine_mode mode) { unsigned int regno0, regno1, regno2; struct ix86_address parts; @@ -18627,7 +18627,7 @@ ix86_dep_by_shift_count (const_rtx set_insn, const_rtx use_insn) bool ix86_unary_operator_ok (enum rtx_code, - enum machine_mode, + machine_mode, rtx operands[2]) { /* If one of operands is memory, source and destination must match. */ @@ -18657,7 +18657,7 @@ ix86_vec_interleave_v2df_operator_ok (rtx operands[3], bool high) void ix86_split_convert_uns_si_sse (rtx operands[]) { - enum machine_mode vecmode; + machine_mode vecmode; rtx value, large, zero_or_two31, input, two31, x; large = operands[1]; @@ -18869,8 +18869,8 @@ ix86_expand_vector_convert_uns_vsivsf (rtx target, rtx val) { rtx tmp[8]; REAL_VALUE_TYPE TWO16r; - enum machine_mode intmode = GET_MODE (val); - enum machine_mode fltmode = GET_MODE (target); + machine_mode intmode = GET_MODE (val); + machine_mode fltmode = GET_MODE (target); rtx (*cvt) (rtx, rtx); if (intmode == V4SImode) @@ -18908,9 +18908,9 @@ ix86_expand_adjust_ufix_to_sfix_si (rtx val, rtx *xorp) { REAL_VALUE_TYPE TWO31r; rtx two31r, tmp[4]; - enum machine_mode mode = GET_MODE (val); - enum machine_mode scalarmode = GET_MODE_INNER (mode); - enum machine_mode intmode = GET_MODE_SIZE (mode) == 32 ? V8SImode : V4SImode; + machine_mode mode = GET_MODE (val); + machine_mode scalarmode = GET_MODE_INNER (mode); + machine_mode intmode = GET_MODE_SIZE (mode) == 32 ? V8SImode : V4SImode; rtx (*cmp) (rtx, rtx, rtx, rtx); int i; @@ -18955,11 +18955,11 @@ ix86_expand_adjust_ufix_to_sfix_si (rtx val, rtx *xorp) register. */ rtx -ix86_build_const_vector (enum machine_mode mode, bool vect, rtx value) +ix86_build_const_vector (machine_mode mode, bool vect, rtx value) { int i, n_elt; rtvec v; - enum machine_mode scalar_mode; + machine_mode scalar_mode; switch (mode) { @@ -19005,9 +19005,9 @@ ix86_build_const_vector (enum machine_mode mode, bool vect, rtx value) a mask excluding the sign bit. */ rtx -ix86_build_signbit_mask (enum machine_mode mode, bool vect, bool invert) +ix86_build_signbit_mask (machine_mode mode, bool vect, bool invert) { - enum machine_mode vec_mode, imode; + machine_mode vec_mode, imode; HOST_WIDE_INT hi, lo; int shift = 63; rtx v; @@ -19097,13 +19097,13 @@ ix86_build_signbit_mask (enum machine_mode mode, bool vect, bool invert) /* Generate code for floating point ABS or NEG. */ void -ix86_expand_fp_absneg_operator (enum rtx_code code, enum machine_mode mode, +ix86_expand_fp_absneg_operator (enum rtx_code code, machine_mode mode, rtx operands[]) { rtx mask, set, dst, src; bool use_sse = false; bool vector_mode = VECTOR_MODE_P (mode); - enum machine_mode vmode = mode; + machine_mode vmode = mode; if (vector_mode) use_sse = true; @@ -19155,7 +19155,7 @@ ix86_expand_fp_absneg_operator (enum rtx_code code, enum machine_mode mode, void ix86_expand_copysign (rtx operands[]) { - enum machine_mode mode, vmode; + machine_mode mode, vmode; rtx dest, op0, op1, mask, nmask; dest = operands[0]; @@ -19227,7 +19227,7 @@ ix86_expand_copysign (rtx operands[]) void ix86_split_copysign_const (rtx operands[]) { - enum machine_mode mode, vmode; + machine_mode mode, vmode; rtx dest, op0, mask, x; dest = operands[0]; @@ -19254,7 +19254,7 @@ ix86_split_copysign_const (rtx operands[]) void ix86_split_copysign_var (rtx operands[]) { - enum machine_mode mode, vmode; + machine_mode mode, vmode; rtx dest, scratch, op0, op1, mask, nmask, x; dest = operands[0]; @@ -19326,10 +19326,10 @@ ix86_split_copysign_var (rtx operands[]) CC mode is at least as constrained as REQ_MODE. */ bool -ix86_match_ccmode (rtx insn, enum machine_mode req_mode) +ix86_match_ccmode (rtx insn, machine_mode req_mode) { rtx set; - enum machine_mode set_mode; + machine_mode set_mode; set = PATTERN (insn); if (GET_CODE (set) == PARALLEL) @@ -19381,7 +19381,7 @@ ix86_match_ccmode (rtx insn, enum machine_mode req_mode) static rtx ix86_expand_int_compare (enum rtx_code code, rtx op0, rtx op1) { - enum machine_mode cmpmode; + machine_mode cmpmode; rtx tmp, flags; cmpmode = SELECT_CC_MODE (code, op0, op1); @@ -19400,7 +19400,7 @@ ix86_expand_int_compare (enum rtx_code code, rtx op0, rtx op1) /* Figure out whether to use ordered or unordered fp comparisons. Return the appropriate mode to use. */ -enum machine_mode +machine_mode ix86_fp_compare_mode (enum rtx_code) { /* ??? In order to make all comparisons reversible, we do all comparisons @@ -19411,10 +19411,10 @@ ix86_fp_compare_mode (enum rtx_code) return TARGET_IEEE_FP ? CCFPUmode : CCFPmode; } -enum machine_mode +machine_mode ix86_cc_mode (enum rtx_code code, rtx op0, rtx op1) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); if (SCALAR_FLOAT_MODE_P (mode)) { @@ -19482,8 +19482,8 @@ ix86_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2) mode which is compatible with both. Otherwise, return VOIDmode. */ -static enum machine_mode -ix86_cc_modes_compatible (enum machine_mode m1, enum machine_mode m2) +static machine_mode +ix86_cc_modes_compatible (machine_mode m1, machine_mode m2) { if (m1 == m2) return m1; @@ -19636,9 +19636,9 @@ ix86_fp_comparison_strategy (enum rtx_code) static enum rtx_code ix86_prepare_fp_compare_args (enum rtx_code code, rtx *pop0, rtx *pop1) { - enum machine_mode fpcmp_mode = ix86_fp_compare_mode (code); + machine_mode fpcmp_mode = ix86_fp_compare_mode (code); rtx op0 = *pop0, op1 = *pop1; - enum machine_mode op_mode = GET_MODE (op0); + machine_mode op_mode = GET_MODE (op0); int is_sse = TARGET_SSE_MATH && SSE_FLOAT_MODE_P (op_mode); /* All of the unordered compare instructions only work on registers. @@ -19752,7 +19752,7 @@ ix86_fp_compare_code_to_integer (enum rtx_code code) static rtx ix86_expand_fp_compare (enum rtx_code code, rtx op0, rtx op1, rtx scratch) { - enum machine_mode fpcmp_mode, intcmp_mode; + machine_mode fpcmp_mode, intcmp_mode; rtx tmp, tmp2; fpcmp_mode = ix86_fp_compare_mode (code); @@ -19936,7 +19936,7 @@ ix86_expand_compare (enum rtx_code code, rtx op0, rtx op1) void ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); rtx tmp; switch (mode) @@ -19964,7 +19964,7 @@ ix86_expand_branch (enum rtx_code code, rtx op0, rtx op1, rtx label) rtx lo[2], hi[2]; rtx_code_label *label2; enum rtx_code code1, code2, code3; - enum machine_mode submode; + machine_mode submode; if (CONSTANT_P (op0) && !CONSTANT_P (op1)) { @@ -20125,7 +20125,7 @@ ix86_expand_setcc (rtx dest, enum rtx_code code, rtx op0, rtx op1) static bool ix86_expand_carry_flag_compare (enum rtx_code code, rtx op0, rtx op1, rtx *pop) { - enum machine_mode mode = + machine_mode mode = GET_MODE (op0) != VOIDmode ? GET_MODE (op0) : GET_MODE (op1); /* Do not handle double-mode compares that go through special path. */ @@ -20255,7 +20255,7 @@ ix86_expand_int_movcc (rtx operands[]) enum rtx_code code = GET_CODE (operands[1]), compare_code; rtx_insn *compare_seq; rtx compare_op; - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); bool sign_bit_compare_p = false; rtx op0 = XEXP (operands[1], 0); rtx op1 = XEXP (operands[1], 1); @@ -20440,7 +20440,7 @@ ix86_expand_int_movcc (rtx operands[]) if (diff < 0) { - enum machine_mode cmp_mode = GET_MODE (op0); + machine_mode cmp_mode = GET_MODE (op0); HOST_WIDE_INT tmp; tmp = ct, ct = cf, cf = tmp; @@ -20597,7 +20597,7 @@ ix86_expand_int_movcc (rtx operands[]) { if (cf == 0) { - enum machine_mode cmp_mode = GET_MODE (op0); + machine_mode cmp_mode = GET_MODE (op0); cf = ct; ct = 0; @@ -20835,7 +20835,7 @@ static bool ix86_expand_sse_fp_minmax (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1, rtx if_true, rtx if_false) { - enum machine_mode mode; + machine_mode mode; bool is_min; rtx tmp; @@ -20886,11 +20886,11 @@ static rtx ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1, rtx op_true, rtx op_false) { - enum machine_mode mode = GET_MODE (dest); - enum machine_mode cmp_ops_mode = GET_MODE (cmp_op0); + machine_mode mode = GET_MODE (dest); + machine_mode cmp_ops_mode = GET_MODE (cmp_op0); /* In general case result of comparison can differ from operands' type. */ - enum machine_mode cmp_mode; + machine_mode cmp_mode; /* In AVX512F the result of comparison is an integer mask. */ bool maskcmp = false; @@ -20958,8 +20958,8 @@ ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1, static void ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false) { - enum machine_mode mode = GET_MODE (dest); - enum machine_mode cmpmode = GET_MODE (cmp); + machine_mode mode = GET_MODE (dest); + machine_mode cmpmode = GET_MODE (cmp); /* In AVX512F the result of comparison is an integer mask. */ bool maskcmp = (mode != cmpmode && TARGET_AVX512F); @@ -21121,7 +21121,7 @@ ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false) bool ix86_expand_fp_movcc (rtx operands[]) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); enum rtx_code code = GET_CODE (operands[1]); rtx tmp, compare_op; rtx op0 = XEXP (operands[1], 0); @@ -21129,7 +21129,7 @@ ix86_expand_fp_movcc (rtx operands[]) if (TARGET_SSE_MATH && SSE_FLOAT_MODE_P (mode)) { - enum machine_mode cmode; + machine_mode cmode; /* Since we've no cmove for sse registers, don't force bad register allocation just to gain access to it. Deny movcc when the @@ -21232,8 +21232,8 @@ ix86_expand_fp_vcond (rtx operands[]) bool ix86_expand_int_vcond (rtx operands[]) { - enum machine_mode data_mode = GET_MODE (operands[0]); - enum machine_mode mode = GET_MODE (operands[4]); + machine_mode data_mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[4]); enum rtx_code code = GET_CODE (operands[3]); bool negate = false; rtx x, cop0, cop1; @@ -21438,7 +21438,7 @@ struct expand_vec_perm_d { rtx target, op0, op1; unsigned char perm[MAX_VECT_LEN]; - enum machine_mode vmode; + machine_mode vmode; unsigned char nelt; bool one_operand_p; bool testing_p; @@ -21450,8 +21450,8 @@ ix86_expand_vec_perm_vpermi2 (rtx target, rtx op0, rtx mask, rtx op1, { /* ix86_expand_vec_perm_vpermi2 is called from both const and non-const expander, so args are either in d, or in op0, op1 etc. */ - enum machine_mode mode = GET_MODE (d ? d->op0 : op0); - enum machine_mode maskmode = mode; + machine_mode mode = GET_MODE (d ? d->op0 : op0); + machine_mode maskmode = mode; rtx (*gen) (rtx, rtx, rtx, rtx) = NULL; switch (mode) @@ -21568,8 +21568,8 @@ ix86_expand_vec_perm (rtx operands[]) rtx op1 = operands[2]; rtx mask = operands[3]; rtx t1, t2, t3, t4, t5, t6, t7, t8, vt, vt2, vec[32]; - enum machine_mode mode = GET_MODE (op0); - enum machine_mode maskmode = GET_MODE (mask); + machine_mode mode = GET_MODE (op0); + machine_mode maskmode = GET_MODE (mask); int w, e, i; bool one_operand_shuffle = rtx_equal_p (op0, op1); @@ -21939,14 +21939,14 @@ ix86_expand_vec_perm (rtx operands[]) void ix86_expand_sse_unpack (rtx dest, rtx src, bool unsigned_p, bool high_p) { - enum machine_mode imode = GET_MODE (src); + machine_mode imode = GET_MODE (src); rtx tmp; if (TARGET_SSE4_1) { rtx (*unpack)(rtx, rtx); rtx (*extract)(rtx, rtx) = NULL; - enum machine_mode halfmode = BLKmode; + machine_mode halfmode = BLKmode; switch (imode) { @@ -22096,7 +22096,7 @@ ix86_expand_int_addcc (rtx operands[]) rtx compare_op; rtx val = const0_rtx; bool fpcmp = false; - enum machine_mode mode; + machine_mode mode; rtx op0 = XEXP (operands[1], 0); rtx op1 = XEXP (operands[1], 1); @@ -22182,7 +22182,7 @@ ix86_expand_int_addcc (rtx operands[]) in the right order. Maximally three parts are generated. */ static int -ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) +ix86_split_to_parts (rtx operand, rtx *parts, machine_mode mode) { int size; @@ -22218,7 +22218,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) if (GET_CODE (operand) == CONST_VECTOR) { - enum machine_mode imode = int_mode_for_mode (mode); + machine_mode imode = int_mode_for_mode (mode); /* Caution: if we looked through a constant pool memory above, the operand may actually have a different mode now. That's ok, since we want to pun this all the way back to an integer. */ @@ -22286,7 +22286,7 @@ ix86_split_to_parts (rtx operand, rtx *parts, enum machine_mode mode) split_double_mode (mode, &operand, 1, &parts[0], &parts[1]); if (mode == XFmode || mode == TFmode) { - enum machine_mode upper_mode = mode==XFmode ? SImode : DImode; + machine_mode upper_mode = mode==XFmode ? SImode : DImode; if (REG_P (operand)) { gcc_assert (reload_completed); @@ -22348,7 +22348,7 @@ ix86_split_long_move (rtx operands[]) int nparts, i, j; int push = 0; int collisions = 0; - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); bool collisionparts[4]; /* The DFmode expanders may ask us to move double. @@ -22562,7 +22562,7 @@ ix86_split_long_move (rtx operands[]) a sequence of add instructions. */ static void -ix86_expand_ashl_const (rtx operand, int count, enum machine_mode mode) +ix86_expand_ashl_const (rtx operand, int count, machine_mode mode) { rtx (*insn)(rtx, rtx, rtx); @@ -22582,7 +22582,7 @@ ix86_expand_ashl_const (rtx operand, int count, enum machine_mode mode) } void -ix86_split_ashl (rtx *operands, rtx scratch, enum machine_mode mode) +ix86_split_ashl (rtx *operands, rtx scratch, machine_mode mode) { rtx (*gen_ashl3)(rtx, rtx, rtx); rtx (*gen_shld)(rtx, rtx, rtx); @@ -22651,7 +22651,7 @@ ix86_split_ashl (rtx *operands, rtx scratch, enum machine_mode mode) pentium4 a bit; no one else seems to care much either way. */ else { - enum machine_mode half_mode; + machine_mode half_mode; rtx (*gen_lshr3)(rtx, rtx, rtx); rtx (*gen_and3)(rtx, rtx, rtx); rtx (*gen_xor3)(rtx, rtx, rtx); @@ -22733,7 +22733,7 @@ ix86_split_ashl (rtx *operands, rtx scratch, enum machine_mode mode) } void -ix86_split_ashr (rtx *operands, rtx scratch, enum machine_mode mode) +ix86_split_ashr (rtx *operands, rtx scratch, machine_mode mode) { rtx (*gen_ashr3)(rtx, rtx, rtx) = mode == DImode ? gen_ashrsi3 : gen_ashrdi3; @@ -22812,7 +22812,7 @@ ix86_split_ashr (rtx *operands, rtx scratch, enum machine_mode mode) } void -ix86_split_lshr (rtx *operands, rtx scratch, enum machine_mode mode) +ix86_split_lshr (rtx *operands, rtx scratch, machine_mode mode) { rtx (*gen_lshr3)(rtx, rtx, rtx) = mode == DImode ? gen_lshrsi3 : gen_lshrdi3; @@ -22945,7 +22945,7 @@ scale_counter (rtx countreg, int scale) /* Return mode for the memcpy/memset loop counter. Prefer SImode over DImode for constant loop counts. */ -static enum machine_mode +static machine_mode counter_mode (rtx count_exp) { if (GET_MODE (count_exp) != VOIDmode) @@ -22984,12 +22984,12 @@ ix86_copy_addr_to_reg (rtx addr) static void expand_set_or_movmem_via_loop (rtx destmem, rtx srcmem, rtx destptr, rtx srcptr, rtx value, - rtx count, enum machine_mode mode, int unroll, + rtx count, machine_mode mode, int unroll, int expected_size, bool issetmem) { rtx_code_label *out_label, *top_label; rtx iter, tmp; - enum machine_mode iter_mode = counter_mode (count); + machine_mode iter_mode = counter_mode (count); int piece_size_n = GET_MODE_SIZE (mode) * unroll; rtx piece_size = GEN_INT (piece_size_n); rtx piece_size_mask = GEN_INT (~((GET_MODE_SIZE (mode) * unroll) - 1)); @@ -23123,7 +23123,7 @@ static void expand_set_or_movmem_via_rep (rtx destmem, rtx srcmem, rtx destptr, rtx srcptr, rtx value, rtx orig_value, rtx count, - enum machine_mode mode, bool issetmem) + machine_mode mode, bool issetmem) { rtx destexp; rtx srcexp; @@ -23203,7 +23203,7 @@ emit_memmov (rtx destmem, rtx *srcmem, rtx destptr, rtx srcptr, { rtx dst = destmem, src = *srcmem, adjust, tempreg; enum insn_code code; - enum machine_mode move_mode; + machine_mode move_mode; int piece_size, i; /* Find the widest mode in which we could perform moves. @@ -23388,7 +23388,7 @@ emit_memset (rtx destmem, rtx destptr, rtx promoted_val, { rtx dst = destmem, adjust; enum insn_code code; - enum machine_mode move_mode; + machine_mode move_mode; int piece_size, i; /* Find the widest mode in which we could perform moves. @@ -23594,7 +23594,7 @@ expand_small_movmem_or_setmem (rtx destmem, rtx srcmem, rtx done_label, bool issetmem) { rtx_code_label *label = ix86_expand_aligntest (count, size, false); - enum machine_mode mode = mode_for_size (size * BITS_PER_UNIT, MODE_INT, 1); + machine_mode mode = mode_for_size (size * BITS_PER_UNIT, MODE_INT, 1); rtx modesize; int n; @@ -23715,7 +23715,7 @@ expand_small_movmem_or_setmem (rtx destmem, rtx srcmem, static void expand_set_or_movmem_prologue_epilogue_by_misaligned_moves (rtx destmem, rtx srcmem, rtx *destptr, rtx *srcptr, - enum machine_mode mode, + machine_mode mode, rtx value, rtx vec_value, rtx *count, rtx_code_label **done_label, @@ -24150,7 +24150,7 @@ static int decide_alignment (int align, enum stringop_alg alg, int expected_size, - enum machine_mode move_mode) + machine_mode move_mode) { int desired_align = 0; @@ -24185,9 +24185,9 @@ decide_alignment (int align, synth_mult by unwinding the sequence by hand on CPUs with slow multiply. */ static rtx -promote_duplicated_reg (enum machine_mode mode, rtx val) +promote_duplicated_reg (machine_mode mode, rtx val) { - enum machine_mode valmode = GET_MODE (val); + machine_mode valmode = GET_MODE (val); rtx tmp; int nops = mode == DImode ? 3 : 2; @@ -24339,7 +24339,7 @@ ix86_expand_set_or_movmem (rtx dst, rtx src, rtx count_exp, rtx val_exp, int dynamic_check; bool need_zero_guard = false; bool noalign; - enum machine_mode move_mode = VOIDmode; + machine_mode move_mode = VOIDmode; int unroll_factor = 1; /* TODO: Once value ranges are available, fill in proper data. */ unsigned HOST_WIDE_INT min_size = 0; @@ -25120,7 +25120,7 @@ ix86_expand_call (rtx retval, rtx fnaddr, rtx callarg1, for (i = 0; i < cregs_size; i++) { int regno = x86_64_ms_sysv_extra_clobbered_registers[i]; - enum machine_mode mode = SSE_REGNO_P (regno) ? TImode : DImode; + machine_mode mode = SSE_REGNO_P (regno) ? TImode : DImode; clobber_reg (&use, gen_rtx_REG (mode, regno)); } @@ -25225,7 +25225,7 @@ ix86_init_machine_status (void) which slot to use. */ rtx -assign_386_stack_local (enum machine_mode mode, enum ix86_stack_slot n) +assign_386_stack_local (machine_mode mode, enum ix86_stack_slot n) { struct stack_local_entry *s; @@ -26878,7 +26878,7 @@ ix86_data_alignment (tree type, int align, bool opt) object. */ unsigned int -ix86_local_alignment (tree exp, enum machine_mode mode, +ix86_local_alignment (tree exp, machine_mode mode, unsigned int align) { tree type, decl; @@ -26987,7 +26987,7 @@ ix86_local_alignment (tree exp, enum machine_mode mode, alignment that the object would ordinarily have. */ unsigned int -ix86_minimum_alignment (tree exp, enum machine_mode mode, +ix86_minimum_alignment (tree exp, machine_mode mode, unsigned int align) { tree type, decl; @@ -27238,7 +27238,7 @@ ix86_get_builtin_type (enum ix86_builtin_type tcode) gcc_assert (tcode > IX86_BT_LAST_PRIM); if (tcode <= IX86_BT_LAST_VECT) { - enum machine_mode mode; + machine_mode mode; index = tcode - IX86_BT_LAST_PRIM - 1; itype = ix86_get_builtin_type (ix86_builtin_type_vect_base[index]); @@ -35069,7 +35069,7 @@ ix86_builtin_decl (unsigned code, bool) where we expect a vector. To avoid crashing, use one of the vector clear instructions. */ static rtx -safe_vector_operand (rtx x, enum machine_mode mode) +safe_vector_operand (rtx x, machine_mode mode) { if (x == const0_rtx) x = CONST0_RTX (mode); @@ -35086,9 +35086,9 @@ ix86_expand_binop_builtin (enum insn_code icode, tree exp, rtx target) tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; if (VECTOR_MODE_P (mode0)) op0 = safe_vector_operand (op0, mode0); @@ -35137,10 +35137,10 @@ ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target, int num_memory = 0; struct { rtx op; - enum machine_mode mode; + machine_mode mode; } args[4]; - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; switch (m_type) { @@ -35237,7 +35237,7 @@ ix86_expand_multi_arg_builtin (enum insn_code icode, tree exp, rtx target, tree arg = CALL_EXPR_ARG (exp, i); rtx op = expand_normal (arg); int adjust = (comparison_p) ? 1 : 0; - enum machine_mode mode = insn_data[icode].operand[i+adjust+1].mode; + machine_mode mode = insn_data[icode].operand[i+adjust+1].mode; if (last_arg_constant && i == nargs - 1) { @@ -35365,8 +35365,8 @@ ix86_expand_unop_vec_merge_builtin (enum insn_code icode, tree exp, rtx pat; tree arg0 = CALL_EXPR_ARG (exp, 0); rtx op1, op0 = expand_normal (arg0); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; if (optimize || !target || GET_MODE (target) != tmode @@ -35403,9 +35403,9 @@ ix86_expand_sse_compare (const struct builtin_description *d, rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); rtx op2; - enum machine_mode tmode = insn_data[d->icode].operand[0].mode; - enum machine_mode mode0 = insn_data[d->icode].operand[1].mode; - enum machine_mode mode1 = insn_data[d->icode].operand[2].mode; + machine_mode tmode = insn_data[d->icode].operand[0].mode; + machine_mode mode0 = insn_data[d->icode].operand[1].mode; + machine_mode mode1 = insn_data[d->icode].operand[2].mode; enum rtx_code comparison = d->comparison; if (VECTOR_MODE_P (mode0)) @@ -35454,8 +35454,8 @@ ix86_expand_sse_comi (const struct builtin_description *d, tree exp, tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode mode0 = insn_data[d->icode].operand[0].mode; - enum machine_mode mode1 = insn_data[d->icode].operand[1].mode; + machine_mode mode0 = insn_data[d->icode].operand[0].mode; + machine_mode mode1 = insn_data[d->icode].operand[1].mode; enum rtx_code comparison = d->comparison; if (VECTOR_MODE_P (mode0)) @@ -35505,8 +35505,8 @@ ix86_expand_sse_round (const struct builtin_description *d, tree exp, rtx pat; tree arg0 = CALL_EXPR_ARG (exp, 0); rtx op1, op0 = expand_normal (arg0); - enum machine_mode tmode = insn_data[d->icode].operand[0].mode; - enum machine_mode mode0 = insn_data[d->icode].operand[1].mode; + machine_mode tmode = insn_data[d->icode].operand[0].mode; + machine_mode mode0 = insn_data[d->icode].operand[1].mode; if (optimize || target == 0 || GET_MODE (target) != tmode @@ -35539,9 +35539,9 @@ ix86_expand_sse_round_vec_pack_sfix (const struct builtin_description *d, rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); rtx op2; - enum machine_mode tmode = insn_data[d->icode].operand[0].mode; - enum machine_mode mode0 = insn_data[d->icode].operand[1].mode; - enum machine_mode mode1 = insn_data[d->icode].operand[2].mode; + machine_mode tmode = insn_data[d->icode].operand[0].mode; + machine_mode mode0 = insn_data[d->icode].operand[1].mode; + machine_mode mode1 = insn_data[d->icode].operand[2].mode; if (optimize || target == 0 || GET_MODE (target) != tmode @@ -35578,8 +35578,8 @@ ix86_expand_sse_ptest (const struct builtin_description *d, tree exp, tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode mode0 = insn_data[d->icode].operand[0].mode; - enum machine_mode mode1 = insn_data[d->icode].operand[1].mode; + machine_mode mode0 = insn_data[d->icode].operand[0].mode; + machine_mode mode1 = insn_data[d->icode].operand[1].mode; enum rtx_code comparison = d->comparison; if (VECTOR_MODE_P (mode0)) @@ -35629,7 +35629,7 @@ ix86_expand_sse_pcmpestr (const struct builtin_description *d, rtx op2 = expand_normal (arg2); rtx op3 = expand_normal (arg3); rtx op4 = expand_normal (arg4); - enum machine_mode tmode0, tmode1, modev2, modei3, modev4, modei5, modeimm; + machine_mode tmode0, tmode1, modev2, modei3, modev4, modei5, modeimm; tmode0 = insn_data[d->icode].operand[0].mode; tmode1 = insn_data[d->icode].operand[1].mode; @@ -35706,7 +35706,7 @@ ix86_expand_sse_pcmpestr (const struct builtin_description *d, emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_STRICT_LOW_PART (VOIDmode, target), gen_rtx_fmt_ee (EQ, QImode, - gen_rtx_REG ((enum machine_mode) d->flag, + gen_rtx_REG ((machine_mode) d->flag, FLAGS_REG), const0_rtx))); return SUBREG_REG (target); @@ -35730,7 +35730,7 @@ ix86_expand_sse_pcmpistr (const struct builtin_description *d, rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); rtx op2 = expand_normal (arg2); - enum machine_mode tmode0, tmode1, modev2, modev3, modeimm; + machine_mode tmode0, tmode1, modev2, modev3, modeimm; tmode0 = insn_data[d->icode].operand[0].mode; tmode1 = insn_data[d->icode].operand[1].mode; @@ -35801,7 +35801,7 @@ ix86_expand_sse_pcmpistr (const struct builtin_description *d, emit_insn (gen_rtx_SET (VOIDmode, gen_rtx_STRICT_LOW_PART (VOIDmode, target), gen_rtx_fmt_ee (EQ, QImode, - gen_rtx_REG ((enum machine_mode) d->flag, + gen_rtx_REG ((machine_mode) d->flag, FLAGS_REG), const0_rtx))); return SUBREG_REG (target); @@ -35825,13 +35825,13 @@ ix86_expand_args_builtin (const struct builtin_description *d, struct { rtx op; - enum machine_mode mode; + machine_mode mode; } args[6]; bool last_arg_count = false; enum insn_code icode = d->icode; const struct insn_data_d *insn_p = &insn_data[icode]; - enum machine_mode tmode = insn_p->operand[0].mode; - enum machine_mode rmode = VOIDmode; + machine_mode tmode = insn_p->operand[0].mode; + machine_mode rmode = VOIDmode; bool swap = false; enum rtx_code comparison = d->comparison; @@ -36576,7 +36576,7 @@ ix86_expand_args_builtin (const struct builtin_description *d, { tree arg = CALL_EXPR_ARG (exp, i); rtx op = expand_normal (arg); - enum machine_mode mode = insn_p->operand[i + 1].mode; + machine_mode mode = insn_p->operand[i + 1].mode; bool match = insn_p->operand[i + 1].predicate (op, mode); if (last_arg_count && (i + 1) == nargs) @@ -36857,8 +36857,8 @@ ix86_expand_sse_comi_round (const struct builtin_description *d, rtx op3 = expand_normal (arg3); enum insn_code icode = d->icode; const struct insn_data_d *insn_p = &insn_data[icode]; - enum machine_mode mode0 = insn_p->operand[0].mode; - enum machine_mode mode1 = insn_p->operand[1].mode; + machine_mode mode0 = insn_p->operand[0].mode; + machine_mode mode1 = insn_p->operand[1].mode; enum rtx_code comparison = UNEQ; bool need_ucomi = false; @@ -36956,11 +36956,11 @@ ix86_expand_round_builtin (const struct builtin_description *d, struct { rtx op; - enum machine_mode mode; + machine_mode mode; } args[6]; enum insn_code icode = d->icode; const struct insn_data_d *insn_p = &insn_data[icode]; - enum machine_mode tmode = insn_p->operand[0].mode; + machine_mode tmode = insn_p->operand[0].mode; unsigned int nargs_constant = 0; unsigned int redundant_embed_rnd = 0; @@ -37061,7 +37061,7 @@ ix86_expand_round_builtin (const struct builtin_description *d, { tree arg = CALL_EXPR_ARG (exp, i); rtx op = expand_normal (arg); - enum machine_mode mode = insn_p->operand[i + 1].mode; + machine_mode mode = insn_p->operand[i + 1].mode; bool match = insn_p->operand[i + 1].predicate (op, mode); if (i == nargs - nargs_constant) @@ -37173,12 +37173,12 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, struct { rtx op; - enum machine_mode mode; + machine_mode mode; } args[3]; enum insn_code icode = d->icode; bool last_arg_constant = false; const struct insn_data_d *insn_p = &insn_data[icode]; - enum machine_mode tmode = insn_p->operand[0].mode; + machine_mode tmode = insn_p->operand[0].mode; enum { load, store } klass; switch ((enum ix86_builtin_func_type) d->flag) @@ -37466,7 +37466,7 @@ ix86_expand_special_args_builtin (const struct builtin_description *d, for (i = 0; i < nargs; i++) { - enum machine_mode mode = insn_p->operand[i + 1].mode; + machine_mode mode = insn_p->operand[i + 1].mode; bool match; arg = CALL_EXPR_ARG (exp, i + arg_adjust); @@ -37580,8 +37580,8 @@ get_element_number (tree vec_type, tree arg) static rtx ix86_expand_vec_init_builtin (tree type, tree exp, rtx target) { - enum machine_mode tmode = TYPE_MODE (type); - enum machine_mode inner_mode = GET_MODE_INNER (tmode); + machine_mode tmode = TYPE_MODE (type); + machine_mode inner_mode = GET_MODE_INNER (tmode); int i, n_elt = GET_MODE_NUNITS (tmode); rtvec v = rtvec_alloc (n_elt); @@ -37608,7 +37608,7 @@ ix86_expand_vec_init_builtin (tree type, tree exp, rtx target) static rtx ix86_expand_vec_ext_builtin (tree exp, rtx target) { - enum machine_mode tmode, mode0; + machine_mode tmode, mode0; tree arg0, arg1; int elt; rtx op0; @@ -37640,7 +37640,7 @@ ix86_expand_vec_ext_builtin (tree exp, rtx target) static rtx ix86_expand_vec_set_builtin (tree exp) { - enum machine_mode tmode, mode1; + machine_mode tmode, mode1; tree arg0, arg1, arg2; int elt; rtx op0, op1, target; @@ -37680,7 +37680,7 @@ ix86_expand_vec_set_builtin (tree exp) static rtx ix86_expand_builtin (tree exp, rtx target, rtx subtarget, - enum machine_mode mode, int ignore) + machine_mode mode, int ignore) { const struct builtin_description *d; size_t i; @@ -37688,7 +37688,7 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); tree arg0, arg1, arg2, arg3, arg4; rtx op0, op1, op2, op3, op4, pat, insn; - enum machine_mode mode0, mode1, mode2, mode3, mode4; + machine_mode mode0, mode1, mode2, mode3, mode4; unsigned int fcode = DECL_FUNCTION_CODE (fndecl); /* For CPU builtins that can be folded, fold first and expand the fold. */ @@ -39029,7 +39029,7 @@ static tree ix86_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) { - enum machine_mode in_mode, out_mode; + machine_mode in_mode, out_mode; int in_n, out_n; enum built_in_function fn = DECL_FUNCTION_CODE (fndecl); @@ -39409,7 +39409,7 @@ ix86_veclibabi_svml (enum built_in_function fn, tree type_out, tree type_in) tree fntype, new_fndecl, args; unsigned arity; const char *bname; - enum machine_mode el_mode, in_mode; + machine_mode el_mode, in_mode; int n, in_n; /* The SVML is suitable for unsafe math only. */ @@ -39523,7 +39523,7 @@ ix86_veclibabi_acml (enum built_in_function fn, tree type_out, tree type_in) tree fntype, new_fndecl, args; unsigned arity; const char *bname; - enum machine_mode el_mode, in_mode; + machine_mode el_mode, in_mode; int n, in_n; /* The ACML is 64bits only and suitable for unsafe math only as @@ -39757,7 +39757,7 @@ ix86_builtin_reciprocal (unsigned int fn, bool md_fn, bool) The return value is 0 for no match and the imm8+1 for a match. */ int -avx_vpermilp_parallel (rtx par, enum machine_mode mode) +avx_vpermilp_parallel (rtx par, machine_mode mode) { unsigned i, nelt = GET_MODE_NUNITS (mode); unsigned mask = 0; @@ -39858,7 +39858,7 @@ avx_vpermilp_parallel (rtx par, enum machine_mode mode) The return value is 0 for no match and the imm8+1 for a match. */ int -avx_vperm2f128_parallel (rtx par, enum machine_mode mode) +avx_vperm2f128_parallel (rtx par, machine_mode mode) { unsigned i, nelt = GET_MODE_NUNITS (mode), nelt2 = nelt / 2; unsigned mask = 0; @@ -39940,7 +39940,7 @@ ix86_register_priority (int hard_regno) static reg_class_t ix86_preferred_reload_class (rtx x, reg_class_t regclass) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); /* We're only allowed to return a subclass of CLASS. Many of the following checks fail for NO_REGS, so eliminate that early. */ @@ -40016,7 +40016,7 @@ ix86_preferred_reload_class (rtx x, reg_class_t regclass) static reg_class_t ix86_preferred_output_reload_class (rtx x, reg_class_t regclass) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); /* Restrict the output reload class to the register bank that we are doing math on. If we would like not to return a subset of CLASS, reject this @@ -40040,7 +40040,7 @@ ix86_preferred_output_reload_class (rtx x, reg_class_t regclass) static reg_class_t ix86_secondary_reload (bool in_p, rtx x, reg_class_t rclass, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { /* Double-word spills from general registers to non-offsettable memory references (zero-extended addresses) require special handling. */ @@ -40165,7 +40165,7 @@ ix86_class_likely_spilled_p (reg_class_t rclass) static inline bool inline_secondary_memory_needed (enum reg_class class1, enum reg_class class2, - enum machine_mode mode, int strict) + machine_mode mode, int strict) { if (lra_in_progress && (class1 == NO_REGS || class2 == NO_REGS)) return false; @@ -40216,7 +40216,7 @@ inline_secondary_memory_needed (enum reg_class class1, enum reg_class class2, bool ix86_secondary_memory_needed (enum reg_class class1, enum reg_class class2, - enum machine_mode mode, int strict) + machine_mode mode, int strict) { return inline_secondary_memory_needed (class1, class2, mode, strict); } @@ -40227,7 +40227,7 @@ ix86_secondary_memory_needed (enum reg_class class1, enum reg_class class2, except in the FP regs, where a single reg is always enough. */ static unsigned char -ix86_class_max_nregs (reg_class_t rclass, enum machine_mode mode) +ix86_class_max_nregs (reg_class_t rclass, machine_mode mode) { if (MAYBE_INTEGER_CLASS_P (rclass)) { @@ -40251,7 +40251,7 @@ ix86_class_max_nregs (reg_class_t rclass, enum machine_mode mode) modes FROM to TO. */ bool -ix86_cannot_change_mode_class (enum machine_mode from, enum machine_mode to, +ix86_cannot_change_mode_class (machine_mode from, machine_mode to, enum reg_class regclass) { if (from == to) @@ -40291,7 +40291,7 @@ ix86_cannot_change_mode_class (enum machine_mode from, enum machine_mode to, Q_REGS classes. */ static inline int -inline_memory_move_cost (enum machine_mode mode, enum reg_class regclass, +inline_memory_move_cost (machine_mode mode, enum reg_class regclass, int in) { int cost; @@ -40401,7 +40401,7 @@ inline_memory_move_cost (enum machine_mode mode, enum reg_class regclass, } static int -ix86_memory_move_cost (enum machine_mode mode, reg_class_t regclass, +ix86_memory_move_cost (machine_mode mode, reg_class_t regclass, bool in) { return inline_memory_move_cost (mode, (enum reg_class) regclass, in ? 1 : 0); @@ -40416,7 +40416,7 @@ ix86_memory_move_cost (enum machine_mode mode, reg_class_t regclass, general registers. */ static int -ix86_register_move_cost (enum machine_mode mode, reg_class_t class1_i, +ix86_register_move_cost (machine_mode mode, reg_class_t class1_i, reg_class_t class2_i) { enum reg_class class1 = (enum reg_class) class1_i; @@ -40474,7 +40474,7 @@ ix86_register_move_cost (enum machine_mode mode, reg_class_t class1_i, MODE. */ bool -ix86_hard_regno_mode_ok (int regno, enum machine_mode mode) +ix86_hard_regno_mode_ok (int regno, machine_mode mode) { /* Flags and only flags can only hold CCmode values. */ if (CC_REGNO_P (regno)) @@ -40570,7 +40570,7 @@ ix86_hard_regno_mode_ok (int regno, enum machine_mode mode) tieable integer mode. */ static bool -ix86_tieable_integer_mode_p (enum machine_mode mode) +ix86_tieable_integer_mode_p (machine_mode mode) { switch (mode) { @@ -40594,7 +40594,7 @@ ix86_tieable_integer_mode_p (enum machine_mode mode) can also hold MODE1. */ bool -ix86_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) +ix86_modes_tieable_p (machine_mode mode1, machine_mode mode2) { if (mode1 == mode2) return true; @@ -40638,7 +40638,7 @@ ix86_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) /* Return the cost of moving between two registers of mode MODE. */ static int -ix86_set_reg_reg_cost (enum machine_mode mode) +ix86_set_reg_reg_cost (machine_mode mode) { unsigned int units = UNITS_PER_WORD; @@ -40693,7 +40693,7 @@ ix86_rtx_costs (rtx x, int code_i, int outer_code_i, int opno, int *total, rtx mask; enum rtx_code code = (enum rtx_code) code_i; enum rtx_code outer_code = (enum rtx_code) outer_code_i; - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); const struct processor_costs *cost = speed ? ix86_cost : &ix86_size_cost; switch (code) @@ -40961,7 +40961,7 @@ ix86_rtx_costs (rtx x, int code_i, int outer_code_i, int opno, int *total, == GET_MODE_SIZE (mode)) { int is_mulwiden = 0; - enum machine_mode inner_mode = GET_MODE (op0); + machine_mode inner_mode = GET_MODE (op0); if (GET_CODE (op0) == GET_CODE (op1)) is_mulwiden = 1, op1 = XEXP (op1, 0); @@ -41765,7 +41765,7 @@ x86_file_start (void) int x86_field_alignment (tree field, int computed) { - enum machine_mode mode; + machine_mode mode; tree type = TREE_TYPE (field); if (TARGET_64BIT || TARGET_ALIGN_DOUBLE) @@ -42260,7 +42260,7 @@ x86_extended_reg_mentioned_p (rtx insn) /* If profitable, negate (without causing overflow) integer constant of mode MODE at location LOC. Return true in this case. */ bool -x86_maybe_negate_const_int (rtx *loc, enum machine_mode mode) +x86_maybe_negate_const_int (rtx *loc, machine_mode mode) { HOST_WIDE_INT val; @@ -42311,7 +42311,7 @@ x86_emit_floatuns (rtx operands[2]) { rtx_code_label *neglab, *donelab; rtx i0, i1, f0, in, out; - enum machine_mode mode, inmode; + machine_mode mode, inmode; inmode = GET_MODE (operands[1]); gcc_assert (inmode == SImode || inmode == DImode); @@ -42353,11 +42353,11 @@ static bool expand_vec_perm_palignr (struct expand_vec_perm_d *d, bool); /* Get a vector mode of the same size as the original but with elements twice as wide. This is only guaranteed to apply to integral vectors. */ -static inline enum machine_mode -get_mode_wider_vector (enum machine_mode o) +static inline machine_mode +get_mode_wider_vector (machine_mode o) { /* ??? Rely on the ordering that genmodes.c gives to vectors. */ - enum machine_mode n = GET_MODE_WIDER_MODE (o); + machine_mode n = GET_MODE_WIDER_MODE (o); gcc_assert (GET_MODE_NUNITS (o) == GET_MODE_NUNITS (n) * 2); gcc_assert (GET_MODE_SIZE (o) == GET_MODE_SIZE (n)); return n; @@ -42367,7 +42367,7 @@ get_mode_wider_vector (enum machine_mode o) fill target with val via vec_duplicate. */ static bool -ix86_vector_duplicate_value (enum machine_mode mode, rtx target, rtx val) +ix86_vector_duplicate_value (machine_mode mode, rtx target, rtx val) { bool ok; rtx_insn *insn; @@ -42398,7 +42398,7 @@ ix86_vector_duplicate_value (enum machine_mode mode, rtx target, rtx val) with all elements equal to VAR. Return true if successful. */ static bool -ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, +ix86_expand_vector_init_duplicate (bool mmx_ok, machine_mode mode, rtx target, rtx val) { bool ok; @@ -42489,7 +42489,7 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, widen: /* Replicate the value once into the next wider mode and recurse. */ { - enum machine_mode smode, wsmode, wvmode; + machine_mode smode, wsmode, wvmode; rtx x; smode = GET_MODE_INNER (mode); @@ -42515,7 +42515,7 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, return ix86_vector_duplicate_value (mode, target, val); else { - enum machine_mode hvmode = (mode == V16HImode ? V8HImode : V16QImode); + machine_mode hvmode = (mode == V16HImode ? V8HImode : V16QImode); rtx x = gen_reg_rtx (hvmode); ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val); @@ -42532,7 +42532,7 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, return ix86_vector_duplicate_value (mode, target, val); else { - enum machine_mode hvmode = (mode == V32HImode ? V16HImode : V32QImode); + machine_mode hvmode = (mode == V32HImode ? V16HImode : V32QImode); rtx x = gen_reg_rtx (hvmode); ok = ix86_expand_vector_init_duplicate (false, hvmode, x, val); @@ -42553,10 +42553,10 @@ ix86_expand_vector_init_duplicate (bool mmx_ok, enum machine_mode mode, if successful. */ static bool -ix86_expand_vector_init_one_nonzero (bool mmx_ok, enum machine_mode mode, +ix86_expand_vector_init_one_nonzero (bool mmx_ok, machine_mode mode, rtx target, rtx var, int one_var) { - enum machine_mode vsimode; + machine_mode vsimode; rtx new_target; rtx x, tmp; bool use_vector_set = false; @@ -42710,11 +42710,11 @@ ix86_expand_vector_init_one_nonzero (bool mmx_ok, enum machine_mode mode, except ONE_VAR are constants. Return true if successful. */ static bool -ix86_expand_vector_init_one_var (bool mmx_ok, enum machine_mode mode, +ix86_expand_vector_init_one_var (bool mmx_ok, machine_mode mode, rtx target, rtx vals, int one_var) { rtx var = XVECEXP (vals, 0, one_var); - enum machine_mode wmode; + machine_mode wmode; rtx const_vec, x; const_vec = copy_rtx (vals); @@ -42796,10 +42796,10 @@ ix86_expand_vector_init_one_var (bool mmx_ok, enum machine_mode mode, and none identical. */ static void -ix86_expand_vector_init_concat (enum machine_mode mode, +ix86_expand_vector_init_concat (machine_mode mode, rtx target, rtx *ops, int n) { - enum machine_mode cmode, hmode = VOIDmode, gmode = VOIDmode; + machine_mode cmode, hmode = VOIDmode, gmode = VOIDmode; rtx first[16], second[8], third[4]; rtvec v; int i, j; @@ -42985,10 +42985,10 @@ half: and none identical. */ static void -ix86_expand_vector_init_interleave (enum machine_mode mode, +ix86_expand_vector_init_interleave (machine_mode mode, rtx target, rtx *ops, int n) { - enum machine_mode first_imode, second_imode, third_imode, inner_mode; + machine_mode first_imode, second_imode, third_imode, inner_mode; int i, j; rtx op0, op1; rtx (*gen_load_even) (rtx, rtx, rtx); @@ -43099,12 +43099,12 @@ ix86_expand_vector_init_interleave (enum machine_mode mode, all values variable, and none identical. */ static void -ix86_expand_vector_init_general (bool mmx_ok, enum machine_mode mode, +ix86_expand_vector_init_general (bool mmx_ok, machine_mode mode, rtx target, rtx vals) { rtx ops[64], op0, op1, op2, op3, op4, op5; - enum machine_mode half_mode = VOIDmode; - enum machine_mode quarter_mode = VOIDmode; + machine_mode half_mode = VOIDmode; + machine_mode quarter_mode = VOIDmode; int n, i; switch (mode) @@ -43221,7 +43221,7 @@ quarter: { int i, j, n_elts, n_words, n_elt_per_word; - enum machine_mode inner_mode; + machine_mode inner_mode; rtx words[4], shift; inner_mode = GET_MODE_INNER (mode); @@ -43282,8 +43282,8 @@ quarter: void ix86_expand_vector_init (bool mmx_ok, rtx target, rtx vals) { - enum machine_mode mode = GET_MODE (target); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (target); + machine_mode inner_mode = GET_MODE_INNER (mode); int n_elts = GET_MODE_NUNITS (mode); int n_var = 0, one_var = -1; bool all_same = true, all_const_zero = true; @@ -43336,9 +43336,9 @@ ix86_expand_vector_init (bool mmx_ok, rtx target, rtx vals) void ix86_expand_vector_set (bool mmx_ok, rtx target, rtx val, int elt) { - enum machine_mode mode = GET_MODE (target); - enum machine_mode inner_mode = GET_MODE_INNER (mode); - enum machine_mode half_mode; + machine_mode mode = GET_MODE (target); + machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode half_mode; bool use_vec_merge = false; rtx tmp; static rtx (*gen_extract[6][2]) (rtx, rtx) @@ -43672,8 +43672,8 @@ half: void ix86_expand_vector_extract (bool mmx_ok, rtx target, rtx vec, int elt) { - enum machine_mode mode = GET_MODE (vec); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (vec); + machine_mode inner_mode = GET_MODE_INNER (mode); bool use_vec_extr = false; rtx tmp; @@ -44062,7 +44062,7 @@ void ix86_expand_reduc (rtx (*fn) (rtx, rtx, rtx), rtx dest, rtx in) { rtx half, dst, vec = in; - enum machine_mode mode = GET_MODE (in); + machine_mode mode = GET_MODE (in); int i; /* SSE4 has a special instruction for V8HImode UMIN reduction. */ @@ -44091,7 +44091,7 @@ ix86_expand_reduc (rtx (*fn) (rtx, rtx, rtx), rtx dest, rtx in) /* Target hook for scalar_mode_supported_p. */ static bool -ix86_scalar_mode_supported_p (enum machine_mode mode) +ix86_scalar_mode_supported_p (machine_mode mode) { if (DECIMAL_FLOAT_MODE_P (mode)) return default_decimal_float_supported_p (); @@ -44103,7 +44103,7 @@ ix86_scalar_mode_supported_p (enum machine_mode mode) /* Implements target hook vector_mode_supported_p. */ static bool -ix86_vector_mode_supported_p (enum machine_mode mode) +ix86_vector_mode_supported_p (machine_mode mode) { if (TARGET_SSE && VALID_SSE_REG_MODE (mode)) return true; @@ -44122,7 +44122,7 @@ ix86_vector_mode_supported_p (enum machine_mode mode) /* Implement target hook libgcc_floating_mode_supported_p. */ static bool -ix86_libgcc_floating_mode_supported_p (enum machine_mode mode) +ix86_libgcc_floating_mode_supported_p (machine_mode mode) { switch (mode) { @@ -44146,7 +44146,7 @@ ix86_libgcc_floating_mode_supported_p (enum machine_mode mode) } /* Target hook for c_mode_for_suffix. */ -static enum machine_mode +static machine_mode ix86_c_mode_for_suffix (char suffix) { if (suffix == 'q') @@ -44188,7 +44188,7 @@ ix86_encode_section_info (tree decl, rtx rtl, int first) /* Worker function for REVERSE_CONDITION. */ enum rtx_code -ix86_reverse_condition (enum rtx_code code, enum machine_mode mode) +ix86_reverse_condition (enum rtx_code code, machine_mode mode) { return (mode != CCFPmode && mode != CCFPUmode ? reverse_condition (code) @@ -44302,8 +44302,8 @@ void ix86_emit_i387_log1p (rtx op0, rtx op1) /* Emit code for round calculation. */ void ix86_emit_i387_round (rtx op0, rtx op1) { - enum machine_mode inmode = GET_MODE (op1); - enum machine_mode outmode = GET_MODE (op0); + machine_mode inmode = GET_MODE (op1); + machine_mode outmode = GET_MODE (op0); rtx e1, e2, res, tmp, tmp1, half; rtx scratch = gen_reg_rtx (HImode); rtx flags = gen_rtx_REG (CCNOmode, FLAGS_REG); @@ -44435,7 +44435,7 @@ void ix86_emit_i387_round (rtx op0, rtx op1) /* Output code to perform a Newton-Rhapson approximation of a single precision floating point divide [http://en.wikipedia.org/wiki/N-th_root_algorithm]. */ -void ix86_emit_swdivsf (rtx res, rtx a, rtx b, enum machine_mode mode) +void ix86_emit_swdivsf (rtx res, rtx a, rtx b, machine_mode mode) { rtx x0, x1, e0, e1; @@ -44482,7 +44482,7 @@ void ix86_emit_swdivsf (rtx res, rtx a, rtx b, enum machine_mode mode) /* Output code to perform a Newton-Rhapson approximation of a single precision floating point [reciprocal] square root. */ -void ix86_emit_swsqrtsf (rtx res, rtx a, enum machine_mode mode, +void ix86_emit_swsqrtsf (rtx res, rtx a, machine_mode mode, bool recip) { rtx x0, e0, e1, e2, e3, mthree, mhalf; @@ -44674,11 +44674,11 @@ asm_preferred_eh_data_format (int code, int global) static void ix86_sse_copysign_to_positive (rtx result, rtx abs_value, rtx sign, rtx mask) { - enum machine_mode mode = GET_MODE (sign); + machine_mode mode = GET_MODE (sign); rtx sgn = gen_reg_rtx (mode); if (mask == NULL_RTX) { - enum machine_mode vmode; + machine_mode vmode; if (mode == SFmode) vmode = V4SFmode; @@ -44711,7 +44711,7 @@ ix86_sse_copysign_to_positive (rtx result, rtx abs_value, rtx sign, rtx mask) static rtx ix86_expand_sse_fabs (rtx op0, rtx *smask) { - enum machine_mode vmode, mode = GET_MODE (op0); + machine_mode vmode, mode = GET_MODE (op0); rtx xa, mask; xa = gen_reg_rtx (mode); @@ -44747,7 +44747,7 @@ static rtx_code_label * ix86_expand_sse_compare_and_jump (enum rtx_code code, rtx op0, rtx op1, bool swap_operands) { - enum machine_mode fpcmp_mode = ix86_fp_compare_mode (code); + machine_mode fpcmp_mode = ix86_fp_compare_mode (code); rtx_code_label *label; rtx tmp; @@ -44779,7 +44779,7 @@ ix86_expand_sse_compare_mask (enum rtx_code code, rtx op0, rtx op1, bool swap_operands) { rtx (*insn)(rtx, rtx, rtx, rtx); - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); rtx mask = gen_reg_rtx (mode); if (swap_operands) @@ -44799,7 +44799,7 @@ ix86_expand_sse_compare_mask (enum rtx_code code, rtx op0, rtx op1, /* Generate and return a rtx of mode MODE for 2**n where n is the number of bits of the mantissa of MODE, which must be one of DFmode or SFmode. */ static rtx -ix86_gen_TWO52 (enum machine_mode mode) +ix86_gen_TWO52 (machine_mode mode) { REAL_VALUE_TYPE TWO52r; rtx TWO52; @@ -44820,7 +44820,7 @@ ix86_expand_lround (rtx op0, rtx op1) tmp = op1 + copysign (nextafter (0.5, 0.0), op1) return (long)tmp; */ - enum machine_mode mode = GET_MODE (op1); + machine_mode mode = GET_MODE (op1); const struct real_format *fmt; REAL_VALUE_TYPE pred_half, half_minus_pred_half; rtx adj; @@ -44851,8 +44851,8 @@ ix86_expand_lfloorceil (rtx op0, rtx op1, bool do_floor) xi -= (double)xi > op1 ? 1 : 0; return xi; */ - enum machine_mode fmode = GET_MODE (op1); - enum machine_mode imode = GET_MODE (op0); + machine_mode fmode = GET_MODE (op1); + machine_mode imode = GET_MODE (op0); rtx ireg, freg, tmp; rtx_code_label *label; @@ -44889,7 +44889,7 @@ ix86_expand_rint (rtx operand0, rtx operand1) xa = xa + 2**52 - 2**52; return copysign (xa, operand1); */ - enum machine_mode mode = GET_MODE (operand0); + machine_mode mode = GET_MODE (operand0); rtx res, xa, TWO52, mask; rtx_code_label *label; @@ -44933,7 +44933,7 @@ ix86_expand_floorceildf_32 (rtx operand0, rtx operand1, bool do_floor) x2 -= -1; return x2; */ - enum machine_mode mode = GET_MODE (operand0); + machine_mode mode = GET_MODE (operand0); rtx xa, TWO52, tmp, one, res, mask; rtx_code_label *label; @@ -44997,7 +44997,7 @@ ix86_expand_floorceil (rtx operand0, rtx operand1, bool do_floor) return copysign (x2, x); return x2; */ - enum machine_mode mode = GET_MODE (operand0); + machine_mode mode = GET_MODE (operand0); rtx xa, xi, TWO52, tmp, one, res, mask; rtx_code_label *label; @@ -45061,7 +45061,7 @@ ix86_expand_rounddf_32 (rtx operand0, rtx operand1) x2 = copysign (xa2, x); return x2; */ - enum machine_mode mode = GET_MODE (operand0); + machine_mode mode = GET_MODE (operand0); rtx xa, xa2, dxa, TWO52, tmp, half, mhalf, one, res, mask; rtx_code_label *label; @@ -45127,7 +45127,7 @@ ix86_expand_trunc (rtx operand0, rtx operand1) return copysign (x2, x); return x2; */ - enum machine_mode mode = GET_MODE (operand0); + machine_mode mode = GET_MODE (operand0); rtx xa, xi, TWO52, res, mask; rtx_code_label *label; @@ -45163,7 +45163,7 @@ ix86_expand_trunc (rtx operand0, rtx operand1) void ix86_expand_truncdf_32 (rtx operand0, rtx operand1) { - enum machine_mode mode = GET_MODE (operand0); + machine_mode mode = GET_MODE (operand0); rtx xa, mask, TWO52, one, res, smask, tmp; rtx_code_label *label; @@ -45229,7 +45229,7 @@ ix86_expand_round (rtx operand0, rtx operand1) xa = (double)(long)(xa + nextafter (0.5, 0.0)); return copysign (xa, x); */ - enum machine_mode mode = GET_MODE (operand0); + machine_mode mode = GET_MODE (operand0); rtx res, TWO52, xa, xi, half, mask; rtx_code_label *label; const struct real_format *fmt; @@ -45272,7 +45272,7 @@ ix86_expand_round (rtx operand0, rtx operand1) void ix86_expand_round_sse4 (rtx op0, rtx op1) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); rtx e1, e2, res, half; const struct real_format *fmt; REAL_VALUE_TYPE pred_half, half_minus_pred_half; @@ -45498,7 +45498,7 @@ expand_vselect_vconcat (rtx target, rtx op0, rtx op1, const unsigned char *perm, unsigned nelt, bool testing_p) { - enum machine_mode v2mode; + machine_mode v2mode; rtx x; bool ok; @@ -45522,7 +45522,7 @@ expand_vselect_vconcat (rtx target, rtx op0, rtx op1, static bool expand_vec_perm_blend (struct expand_vec_perm_d *d) { - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; unsigned i, mask, nelt = d->nelt; rtx target, op0, op1, x; rtx rperm[32], vperm; @@ -45766,7 +45766,7 @@ expand_vec_perm_vpermil (struct expand_vec_perm_d *d) instead. */ static bool -valid_perm_using_mode_p (enum machine_mode vmode, struct expand_vec_perm_d *d) +valid_perm_using_mode_p (machine_mode vmode, struct expand_vec_perm_d *d) { unsigned int i, j, chunk; @@ -45798,7 +45798,7 @@ expand_vec_perm_pshufb (struct expand_vec_perm_d *d) { unsigned i, nelt, eltsz, mask; unsigned char perm[64]; - enum machine_mode vmode = V16QImode; + machine_mode vmode = V16QImode; rtx rperm[64], vperm, target, op0, op1; nelt = d->nelt; @@ -46320,7 +46320,7 @@ expand_vec_perm_pblendv (struct expand_vec_perm_d *d) { unsigned i, which, nelt = d->nelt; struct expand_vec_perm_d dcopy, dcopy1; - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; bool ok; /* Use the same checks as in expand_vec_perm_blend. */ @@ -47529,7 +47529,7 @@ static bool expand_vec_perm_broadcast_1 (struct expand_vec_perm_d *d) { unsigned elt = d->perm[0], nelt2 = d->nelt / 2; - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; unsigned char perm2[4]; rtx op0 = d->op0, dest; bool ok; @@ -47906,7 +47906,7 @@ ix86_expand_vec_perm_const (rtx operands[4]) /* Implement targetm.vectorize.vec_perm_const_ok. */ static bool -ix86_vectorize_vec_perm_const_ok (enum machine_mode vmode, +ix86_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel) { struct expand_vec_perm_d d; @@ -48066,8 +48066,8 @@ ix86_expand_vec_interleave (rtx targ, rtx op0, rtx op1, bool high_p) void ix86_expand_vecop_qihi (enum rtx_code code, rtx dest, rtx op1, rtx op2) { - enum machine_mode qimode = GET_MODE (dest); - enum machine_mode himode; + machine_mode qimode = GET_MODE (dest); + machine_mode himode; rtx (*gen_il) (rtx, rtx, rtx); rtx (*gen_ih) (rtx, rtx, rtx); rtx op1_l, op1_h, op2_l, op2_h, res_l, res_h; @@ -48179,7 +48179,7 @@ ix86_expand_vecop_qihi (enum rtx_code code, rtx dest, rtx op1, rtx op2) static bool const_vector_equal_evenodd_p (rtx op) { - enum machine_mode mode = GET_MODE (op); + machine_mode mode = GET_MODE (op); int i, nunits = GET_MODE_NUNITS (mode); if (GET_CODE (op) != CONST_VECTOR || nunits != CONST_VECTOR_NUNITS (op)) @@ -48194,8 +48194,8 @@ void ix86_expand_mul_widen_evenodd (rtx dest, rtx op1, rtx op2, bool uns_p, bool odd_p) { - enum machine_mode mode = GET_MODE (op1); - enum machine_mode wmode = GET_MODE (dest); + machine_mode mode = GET_MODE (op1); + machine_mode wmode = GET_MODE (dest); rtx x; rtx orig_op1 = op1, orig_op2 = op2; @@ -48289,8 +48289,8 @@ void ix86_expand_mul_widen_hilo (rtx dest, rtx op1, rtx op2, bool uns_p, bool high_p) { - enum machine_mode wmode = GET_MODE (dest); - enum machine_mode mode = GET_MODE (op1); + machine_mode wmode = GET_MODE (dest); + machine_mode mode = GET_MODE (op1); rtx t1, t2, t3, t4, mask; switch (mode) @@ -48413,7 +48413,7 @@ ix86_expand_sse2_mulv4si3 (rtx op0, rtx op1, rtx op2) void ix86_expand_sse2_mulvxdi3 (rtx op0, rtx op1, rtx op2) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); rtx t1, t2, t3, t4, t5, t6; if (TARGET_AVX512DQ && mode == V8DImode) @@ -48459,7 +48459,7 @@ ix86_expand_sse2_mulvxdi3 (rtx op0, rtx op1, rtx op2) } else { - enum machine_mode nmode; + machine_mode nmode; rtx (*umul) (rtx, rtx, rtx); if (mode == V2DImode) @@ -48513,7 +48513,7 @@ ix86_expand_sse2_mulvxdi3 (rtx op0, rtx op1, rtx op2) void ix86_expand_sse2_abs (rtx target, rtx input) { - enum machine_mode mode = GET_MODE (target); + machine_mode mode = GET_MODE (target); rtx tmp0, tmp1, x; switch (mode) @@ -48586,7 +48586,7 @@ ix86_expand_pinsr (rtx *operands) case V4SImode: case V2DImode: { - enum machine_mode srcmode, dstmode; + machine_mode srcmode, dstmode; rtx (*pinsr)(rtx, rtx, rtx, rtx); srcmode = mode_for_size (size, MODE_INT, 0); @@ -49585,7 +49585,7 @@ has_dispatch (rtx_insn *insn, int action) enabled for other processors. */ static int -ix86_reassociation_width (unsigned int, enum machine_mode mode) +ix86_reassociation_width (unsigned int, machine_mode mode) { int res = 1; @@ -49610,8 +49610,8 @@ ix86_reassociation_width (unsigned int, enum machine_mode mode) /* ??? No autovectorization into MMX or 3DNOW until we can reliably place emms and femms instructions. */ -static enum machine_mode -ix86_preferred_simd_mode (enum machine_mode mode) +static machine_mode +ix86_preferred_simd_mode (machine_mode mode) { if (!TARGET_SSE) return word_mode; @@ -49672,7 +49672,7 @@ ix86_autovectorize_vector_sizes (void) and of class RCLASS for spilling instead of memory. Return NO_REGS if it is not possible or non-profitable. */ static reg_class_t -ix86_spill_class (reg_class_t rclass, enum machine_mode mode) +ix86_spill_class (reg_class_t rclass, machine_mode mode) { if (TARGET_SSE && TARGET_GENERAL_REGS_SSE_SPILL && ! TARGET_MMX && (mode == SImode || (TARGET_64BIT && mode == DImode)) @@ -49988,7 +49988,7 @@ ix86_loop_unroll_adjust (unsigned nunroll, struct loop *loop) if (const_rtx x = *iter) if (MEM_P (x)) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); unsigned int n_words = GET_MODE_SIZE (mode) / UNITS_PER_WORD; if (n_words > 4) mem_count += 2; diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index 23ef131..a1803d5 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -4408,8 +4408,8 @@ (clobber (match_scratch:<ssevecmode> 4))])] "!TARGET_64BIT && TARGET_SSE2 && TARGET_SSE_MATH" { - enum machine_mode mode = <MODE>mode; - enum machine_mode vecmode = <ssevecmode>mode; + machine_mode mode = <MODE>mode; + machine_mode vecmode = <ssevecmode>mode; REAL_VALUE_TYPE TWO31r; rtx two31; @@ -4854,8 +4854,8 @@ && reload_completed && SSE_REG_P (operands[0])" [(const_int 0)] { - const enum machine_mode vmode = <MODEF:ssevecmode>mode; - const enum machine_mode mode = <MODEF:MODE>mode; + const machine_mode vmode = <MODEF:ssevecmode>mode; + const machine_mode mode = <MODEF:MODE>mode; rtx t, op0 = simplify_gen_subreg (vmode, operands[0], mode, 0); emit_move_insn (op0, CONST0_RTX (vmode)); @@ -5071,7 +5071,7 @@ "reload_completed && ix86_avoid_lea_for_addr (insn, operands)" [(const_int 0)] { - enum machine_mode mode = <MODE>mode; + machine_mode mode = <MODE>mode; rtx pat; /* ix86_avoid_lea_for_addr re-recognizes insn and may @@ -5439,7 +5439,7 @@ "reload_completed && ix86_lea_for_add_ok (insn, operands)" [(const_int 0)] { - enum machine_mode mode = <MODE>mode; + machine_mode mode = <MODE>mode; rtx pat; if (<MODE_SIZE> < GET_MODE_SIZE (SImode)) @@ -5945,7 +5945,7 @@ "&& reload_completed" [(const_int 0)] { - enum machine_mode mode = SImode; + machine_mode mode = SImode; rtx pat; operands[0] = gen_lowpart (mode, operands[0]); @@ -5976,7 +5976,7 @@ "&& reload_completed" [(const_int 0)] { - enum machine_mode mode = SImode; + machine_mode mode = SImode; rtx pat; operands[0] = gen_lowpart (mode, operands[0]); @@ -6006,7 +6006,7 @@ "&& reload_completed" [(const_int 0)] { - enum machine_mode mode = SImode; + machine_mode mode = SImode; rtx pat; operands[0] = gen_lowpart (mode, operands[0]); @@ -6045,7 +6045,7 @@ "&& reload_completed" [(const_int 0)] { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); rtx pat; if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode)) @@ -7451,7 +7451,7 @@ HOST_WIDE_INT len = INTVAL (operands[3]); HOST_WIDE_INT pos = INTVAL (operands[4]); HOST_WIDE_INT mask; - enum machine_mode mode, submode; + machine_mode mode, submode; mode = GET_MODE (val); if (MEM_P (val)) @@ -7574,7 +7574,7 @@ (match_operand:SWIM 2 "<general_szext_operand>")))] "" { - enum machine_mode mode = <MODE>mode; + machine_mode mode = <MODE>mode; rtx (*insn) (rtx, rtx); if (CONST_INT_P (operands[2]) && REG_P (operands[0])) @@ -7825,7 +7825,7 @@ [(const_int 0)] { HOST_WIDE_INT ival = INTVAL (operands[2]); - enum machine_mode mode; + machine_mode mode; rtx (*insn) (rtx, rtx); if (ival == (HOST_WIDE_INT) 0xffffffff) @@ -8733,8 +8733,8 @@ "reload_completed && SSE_REG_P (operands[0])" [(set (match_dup 0) (match_dup 3))] { - enum machine_mode mode = GET_MODE (operands[0]); - enum machine_mode vmode = GET_MODE (operands[2]); + machine_mode mode = GET_MODE (operands[0]); + machine_mode vmode = GET_MODE (operands[2]); rtx tmp; operands[0] = simplify_gen_subreg (vmode, operands[0], mode, 0); @@ -9512,7 +9512,7 @@ && true_regnum (operands[0]) != true_regnum (operands[1])" [(const_int 0)] { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); rtx pat; if (GET_MODE_SIZE (mode) < GET_MODE_SIZE (SImode)) @@ -12157,7 +12157,7 @@ (clobber (reg:CC FLAGS_REG))])] "" { - enum machine_mode flags_mode; + machine_mode flags_mode; if (<MODE>mode == SImode && !TARGET_CMOVE) { @@ -12192,7 +12192,7 @@ (parallel [(set (match_dup 0) (plus:SI (match_dup 0) (const_int 1))) (clobber (reg:CC FLAGS_REG))])] { - enum machine_mode flags_mode + machine_mode flags_mode = (TARGET_BMI && !TARGET_AVOID_FALSE_DEP_FOR_BMI) ? CCCmode : CCZmode; operands[3] = gen_lowpart (QImode, operands[2]); @@ -17847,8 +17847,8 @@ [(set (match_dup 5) (match_dup 4)) (set (match_dup 0) (match_dup 1))] { - enum machine_mode op1mode = GET_MODE (operands[1]); - enum machine_mode mode = op1mode == DImode ? DImode : SImode; + machine_mode op1mode = GET_MODE (operands[1]); + machine_mode mode = op1mode == DImode ? DImode : SImode; int scale = 1 << INTVAL (operands[2]); rtx index = gen_lowpart (word_mode, operands[1]); rtx base = gen_lowpart (word_mode, operands[5]); diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 8188dbe..7d0b51e 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -1111,7 +1111,7 @@ (define_predicate "fcmov_comparison_operator" (match_operand 0 "comparison_operator") { - enum machine_mode inmode = GET_MODE (XEXP (op, 0)); + machine_mode inmode = GET_MODE (XEXP (op, 0)); enum rtx_code code = GET_CODE (op); if (inmode == CCFPmode || inmode == CCFPUmode) @@ -1158,7 +1158,7 @@ (define_predicate "ix86_comparison_operator" (match_operand 0 "comparison_operator") { - enum machine_mode inmode = GET_MODE (XEXP (op, 0)); + machine_mode inmode = GET_MODE (XEXP (op, 0)); enum rtx_code code = GET_CODE (op); if (inmode == CCFPmode || inmode == CCFPUmode) @@ -1195,7 +1195,7 @@ (define_predicate "ix86_carry_flag_operator" (match_code "ltu,lt,unlt,gtu,gt,ungt,le,unle,ge,unge,ltgt,uneq") { - enum machine_mode inmode = GET_MODE (XEXP (op, 0)); + machine_mode inmode = GET_MODE (XEXP (op, 0)); enum rtx_code code = GET_CODE (op); if (inmode == CCFPmode || inmode == CCFPUmode) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 5986d4b..2757a1e 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -14533,7 +14533,7 @@ UNSPEC_ROUND))] "TARGET_ROUND && !flag_trapping_math" { - enum machine_mode scalar_mode; + machine_mode scalar_mode; const struct real_format *fmt; REAL_VALUE_TYPE pred_half, half_minus_pred_half; rtx half, vec_half; @@ -17211,7 +17211,7 @@ [(match_operand 3 "const_int_operand" "n, n")])))] "TARGET_SSSE3" { - enum machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0])); + machine_mode imode = GET_MODE_INNER (GET_MODE (operands[0])); operands[2] = GEN_INT (INTVAL (operands[3]) * GET_MODE_SIZE (imode)); switch (which_alternative) diff --git a/gcc/config/i386/sync.md b/gcc/config/i386/sync.md index 98db523..35a3deb 100644 --- a/gcc/config/i386/sync.md +++ b/gcc/config/i386/sync.md @@ -350,7 +350,7 @@ } else { - enum machine_mode hmode = <CASHMODE>mode; + machine_mode hmode = <CASHMODE>mode; rtx lo_o, lo_e, lo_n, hi_o, hi_e, hi_n; lo_o = operands[1]; diff --git a/gcc/config/ia64/ia64-protos.h b/gcc/config/ia64/ia64-protos.h index efefb41..47c52d5 100644 --- a/gcc/config/ia64/ia64-protos.h +++ b/gcc/config/ia64/ia64-protos.h @@ -35,10 +35,10 @@ extern int addp4_optimize_ok (rtx, rtx); extern void ia64_emit_cond_move (rtx, rtx, rtx); extern int ia64_depz_field_mask (rtx, rtx); extern void ia64_split_tmode_move (rtx[]); -extern bool ia64_expand_movxf_movrf (enum machine_mode, rtx[]); +extern bool ia64_expand_movxf_movrf (machine_mode, rtx[]); extern void ia64_expand_compare (rtx *, rtx *, rtx *); extern void ia64_expand_vecint_cmov (rtx[]); -extern bool ia64_expand_vecint_minmax (enum rtx_code, enum machine_mode, rtx[]); +extern bool ia64_expand_vecint_minmax (enum rtx_code, machine_mode, rtx[]); extern void ia64_unpack_assemble (rtx, rtx, rtx, bool); extern void ia64_expand_unpack (rtx [], bool, bool); extern void ia64_expand_widen_sum (rtx[], bool); @@ -57,7 +57,7 @@ extern bool ia64_expand_load_address (rtx, rtx); extern int ia64_hard_regno_rename_ok (int, int); extern enum reg_class ia64_secondary_reload_class (enum reg_class, - enum machine_mode, rtx); + machine_mode, rtx); extern const char *get_bundle_name (int); extern const char *output_probe_stack_range (rtx, rtx); @@ -68,7 +68,7 @@ extern void ia64_expand_vec_setv2sf (rtx op[3]); #ifdef TREE_CODE #ifdef RTX_CODE -extern rtx ia64_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +extern rtx ia64_expand_builtin (tree, rtx, rtx, machine_mode, int); extern rtx ia64_va_arg (tree, tree); #endif /* RTX_CODE */ @@ -91,7 +91,7 @@ extern void ia64_split_return_addr_rtx (rtx); #ifdef ARGS_SIZE_RTX /* expr.h defines ARGS_SIZE_RTX and `enum direction'. */ -extern enum direction ia64_hpux_function_arg_padding (enum machine_mode, const_tree); +extern enum direction ia64_hpux_function_arg_padding (machine_mode, const_tree); #endif /* ARGS_SIZE_RTX */ extern void ia64_hpux_handle_builtin_pragma (struct cpp_reader *); diff --git a/gcc/config/ia64/ia64.c b/gcc/config/ia64/ia64.c index 275bcd8..beb9e60 100644 --- a/gcc/config/ia64/ia64.c +++ b/gcc/config/ia64/ia64.c @@ -188,7 +188,7 @@ static void ia64_init_sched_context (void *, bool); static void ia64_set_sched_context (void *); static void ia64_clear_sched_context (void *); static void ia64_free_sched_context (void *); -static int ia64_mode_to_int (enum machine_mode); +static int ia64_mode_to_int (machine_mode); static void ia64_set_sched_flags (spec_info_t); static ds_t ia64_get_insn_spec_ds (rtx_insn *); static ds_t ia64_get_insn_checked_ds (rtx_insn *); @@ -215,29 +215,29 @@ static rtx gen_fr_restore_x (rtx, rtx, rtx); static void ia64_option_override (void); static bool ia64_can_eliminate (const int, const int); -static enum machine_mode hfa_element_mode (const_tree, bool); -static void ia64_setup_incoming_varargs (cumulative_args_t, enum machine_mode, +static machine_mode hfa_element_mode (const_tree, bool); +static void ia64_setup_incoming_varargs (cumulative_args_t, machine_mode, tree, int *, int); -static int ia64_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static int ia64_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static rtx ia64_function_arg_1 (cumulative_args_t, enum machine_mode, +static rtx ia64_function_arg_1 (cumulative_args_t, machine_mode, const_tree, bool, bool); -static rtx ia64_function_arg (cumulative_args_t, enum machine_mode, +static rtx ia64_function_arg (cumulative_args_t, machine_mode, const_tree, bool); static rtx ia64_function_incoming_arg (cumulative_args_t, - enum machine_mode, const_tree, bool); -static void ia64_function_arg_advance (cumulative_args_t, enum machine_mode, + machine_mode, const_tree, bool); +static void ia64_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static unsigned int ia64_function_arg_boundary (enum machine_mode, +static unsigned int ia64_function_arg_boundary (machine_mode, const_tree); static bool ia64_function_ok_for_sibcall (tree, tree); static bool ia64_return_in_memory (const_tree, const_tree); static rtx ia64_function_value (const_tree, const_tree, bool); -static rtx ia64_libcall_value (enum machine_mode, const_rtx); +static rtx ia64_libcall_value (machine_mode, const_rtx); static bool ia64_function_value_regno_p (const unsigned int); -static int ia64_register_move_cost (enum machine_mode, reg_class_t, +static int ia64_register_move_cost (machine_mode, reg_class_t, reg_class_t); -static int ia64_memory_move_cost (enum machine_mode mode, reg_class_t, +static int ia64_memory_move_cost (machine_mode mode, reg_class_t, bool); static bool ia64_rtx_costs (rtx, int, int, int, int *, bool); static int ia64_unspec_may_trap_p (const_rtx, unsigned); @@ -303,7 +303,7 @@ static void ia64_globalize_decl_name (FILE *, tree); static int ia64_hpux_reloc_rw_mask (void) ATTRIBUTE_UNUSED; static int ia64_reloc_rw_mask (void) ATTRIBUTE_UNUSED; -static section *ia64_select_rtx_section (enum machine_mode, rtx, +static section *ia64_select_rtx_section (machine_mode, rtx, unsigned HOST_WIDE_INT); static void ia64_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; @@ -318,7 +318,7 @@ static void ia64_vms_init_libfuncs (void) ATTRIBUTE_UNUSED; static void ia64_soft_fp_init_libfuncs (void) ATTRIBUTE_UNUSED; -static bool ia64_vms_valid_pointer_mode (enum machine_mode mode) +static bool ia64_vms_valid_pointer_mode (machine_mode mode) ATTRIBUTE_UNUSED; static tree ia64_vms_common_object_attribute (tree *, tree, tree, int, bool *) ATTRIBUTE_UNUSED; @@ -328,29 +328,29 @@ static tree ia64_handle_version_id_attribute (tree *, tree, tree, int, bool *); static void ia64_encode_section_info (tree, rtx, int); static rtx ia64_struct_value_rtx (tree, int); static tree ia64_gimplify_va_arg (tree, tree, gimple_seq *, gimple_seq *); -static bool ia64_scalar_mode_supported_p (enum machine_mode mode); -static bool ia64_vector_mode_supported_p (enum machine_mode mode); -static bool ia64_libgcc_floating_mode_supported_p (enum machine_mode mode); -static bool ia64_legitimate_constant_p (enum machine_mode, rtx); -static bool ia64_legitimate_address_p (enum machine_mode, rtx, bool); -static bool ia64_cannot_force_const_mem (enum machine_mode, rtx); +static bool ia64_scalar_mode_supported_p (machine_mode mode); +static bool ia64_vector_mode_supported_p (machine_mode mode); +static bool ia64_libgcc_floating_mode_supported_p (machine_mode mode); +static bool ia64_legitimate_constant_p (machine_mode, rtx); +static bool ia64_legitimate_address_p (machine_mode, rtx, bool); +static bool ia64_cannot_force_const_mem (machine_mode, rtx); static const char *ia64_mangle_type (const_tree); static const char *ia64_invalid_conversion (const_tree, const_tree); static const char *ia64_invalid_unary_op (int, const_tree); static const char *ia64_invalid_binary_op (int, const_tree, const_tree); -static enum machine_mode ia64_c_mode_for_suffix (char); +static machine_mode ia64_c_mode_for_suffix (char); static void ia64_trampoline_init (rtx, tree, rtx); static void ia64_override_options_after_change (void); -static bool ia64_member_type_forces_blk (const_tree, enum machine_mode); +static bool ia64_member_type_forces_blk (const_tree, machine_mode); static tree ia64_builtin_decl (unsigned, bool); static reg_class_t ia64_preferred_reload_class (rtx, reg_class_t); -static enum machine_mode ia64_get_reg_raw_mode (int regno); +static machine_mode ia64_get_reg_raw_mode (int regno); static section * ia64_hpux_function_section (tree, enum node_frequency, bool, bool); -static bool ia64_vectorize_vec_perm_const_ok (enum machine_mode vmode, +static bool ia64_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel); #define MAX_VECT_LEN 8 @@ -359,7 +359,7 @@ struct expand_vec_perm_d { rtx target, op0, op1; unsigned char perm[MAX_VECT_LEN]; - enum machine_mode vmode; + machine_mode vmode; unsigned char nelt; bool one_operand_p; bool testing_p; @@ -1002,7 +1002,7 @@ ia64_legitimate_address_disp (const_rtx reg, const_rtx disp, bool strict) /* Implement TARGET_LEGITIMATE_ADDRESS_P. */ static bool -ia64_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, +ia64_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) { if (ia64_legitimate_address_reg (x, strict)) @@ -1024,7 +1024,7 @@ ia64_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, field in an instruction. */ static bool -ia64_legitimate_constant_p (enum machine_mode mode, rtx x) +ia64_legitimate_constant_p (machine_mode mode, rtx x) { switch (GET_CODE (x)) { @@ -1079,7 +1079,7 @@ ia64_legitimate_constant_p (enum machine_mode mode, rtx x) /* Don't allow TLS addresses to get spilled to memory. */ static bool -ia64_cannot_force_const_mem (enum machine_mode mode, rtx x) +ia64_cannot_force_const_mem (machine_mode mode, rtx x) { if (mode == RFmode) return true; @@ -1286,7 +1286,7 @@ ia64_expand_tls_address (enum tls_model tls_kind, rtx op0, rtx op1, rtx ia64_expand_move (rtx op0, rtx op1) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); if (!reload_in_progress && !reload_completed && !ia64_move_ok (op0, op1)) op1 = force_reg (mode, op1); @@ -1613,7 +1613,7 @@ ia64_split_tmode_move (rtx operands[]) we see something like the above, we spill the inner register to memory. */ static rtx -spill_xfmode_rfmode_operand (rtx in, int force, enum machine_mode mode) +spill_xfmode_rfmode_operand (rtx in, int force, machine_mode mode) { if (GET_CODE (in) == SUBREG && GET_MODE (SUBREG_REG (in)) == TImode @@ -1638,7 +1638,7 @@ spill_xfmode_rfmode_operand (rtx in, int force, enum machine_mode mode) DONE. */ bool -ia64_expand_movxf_movrf (enum machine_mode mode, rtx operands[]) +ia64_expand_movxf_movrf (machine_mode mode, rtx operands[]) { rtx op0 = operands[0]; @@ -1861,7 +1861,7 @@ ia64_expand_compare (rtx *expr, rtx *op0, rtx *op1) been reversed, and so the sense of the comparison should be inverted. */ static bool -ia64_expand_vecint_compare (enum rtx_code code, enum machine_mode mode, +ia64_expand_vecint_compare (enum rtx_code code, machine_mode mode, rtx dest, rtx op0, rtx op1) { bool negate = false; @@ -1952,7 +1952,7 @@ ia64_expand_vecint_compare (enum rtx_code code, enum machine_mode mode, void ia64_expand_vecint_cmov (rtx operands[]) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); enum rtx_code code = GET_CODE (operands[3]); bool negate; rtx cmp, x, ot, of; @@ -2002,7 +2002,7 @@ ia64_expand_vecint_cmov (rtx operands[]) /* Emit an integral vector min or max operation. Return true if all done. */ bool -ia64_expand_vecint_minmax (enum rtx_code code, enum machine_mode mode, +ia64_expand_vecint_minmax (enum rtx_code code, machine_mode mode, rtx operands[]) { rtx xops[6]; @@ -2059,7 +2059,7 @@ ia64_expand_vecint_minmax (enum rtx_code code, enum machine_mode mode, void ia64_unpack_assemble (rtx out, rtx lo, rtx hi, bool highp) { - enum machine_mode vmode = GET_MODE (lo); + machine_mode vmode = GET_MODE (lo); unsigned int i, high, nelt = GET_MODE_NUNITS (vmode); struct expand_vec_perm_d d; bool ok; @@ -2088,7 +2088,7 @@ ia64_unpack_assemble (rtx out, rtx lo, rtx hi, bool highp) static rtx ia64_unpack_sign (rtx vec, bool unsignedp) { - enum machine_mode mode = GET_MODE (vec); + machine_mode mode = GET_MODE (vec); rtx zero = CONST0_RTX (mode); if (unsignedp) @@ -2119,7 +2119,7 @@ ia64_expand_unpack (rtx operands[3], bool unsignedp, bool highp) void ia64_expand_widen_sum (rtx operands[3], bool unsignedp) { - enum machine_mode wmode; + machine_mode wmode; rtx l, h, t, sign; sign = ia64_unpack_sign (operands[1], unsignedp); @@ -2336,7 +2336,7 @@ void ia64_expand_atomic_op (enum rtx_code code, rtx mem, rtx val, rtx old_dst, rtx new_dst, enum memmodel model) { - enum machine_mode mode = GET_MODE (mem); + machine_mode mode = GET_MODE (mem); rtx old_reg, new_reg, cmp_reg, ar_ccv, label; enum insn_code icode; @@ -4503,7 +4503,7 @@ ia64_trampoline_init (rtx m_tramp, tree fndecl, rtx static_chain) We generate the actual spill instructions during prologue generation. */ static void -ia64_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, +ia64_setup_incoming_varargs (cumulative_args_t cum, machine_mode mode, tree type, int * pretend_size, int second_time ATTRIBUTE_UNUSED) { @@ -4532,11 +4532,11 @@ ia64_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, have already decided to pass them by reference. Top-level zero-sized aggregates are excluded because our parallels crash the middle-end. */ -static enum machine_mode +static machine_mode hfa_element_mode (const_tree type, bool nested) { - enum machine_mode element_mode = VOIDmode; - enum machine_mode mode; + machine_mode element_mode = VOIDmode; + machine_mode mode; enum tree_code code = TREE_CODE (type); int know_element_mode = 0; tree t; @@ -4611,7 +4611,7 @@ hfa_element_mode (const_tree type, bool nested) /* Return the number of words required to hold a quantity of TYPE and MODE when passed as an argument. */ static int -ia64_function_arg_words (const_tree type, enum machine_mode mode) +ia64_function_arg_words (const_tree type, machine_mode mode) { int words; @@ -4658,7 +4658,7 @@ ia64_function_arg_offset (const CUMULATIVE_ARGS *cum, registers. */ static rtx -ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, +ia64_function_arg_1 (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named, bool incoming) { const CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -4666,7 +4666,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, int basereg = (incoming ? GR_ARG_FIRST : AR_ARG_FIRST); int words = ia64_function_arg_words (type, mode); int offset = ia64_function_arg_offset (cum, type, words); - enum machine_mode hfa_mode = VOIDmode; + machine_mode hfa_mode = VOIDmode; /* For OPEN VMS, emit the instruction setting up the argument register here, when we know this will be together with the other arguments setup related @@ -4753,7 +4753,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, for (; offset < byte_size && int_regs < MAX_ARGUMENT_SLOTS; i++) { - enum machine_mode gr_mode = DImode; + machine_mode gr_mode = DImode; unsigned int gr_size; /* If we have an odd 4 byte hunk because we ran out of FR regs, @@ -4833,7 +4833,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, else { /* See comment above. */ - enum machine_mode inner_mode = + machine_mode inner_mode = (BYTES_BIG_ENDIAN && mode == SFmode) ? DImode : mode; rtx fp_reg = gen_rtx_EXPR_LIST (VOIDmode, @@ -4853,7 +4853,7 @@ ia64_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, /* Implement TARGET_FUNCION_ARG target hook. */ static rtx -ia64_function_arg (cumulative_args_t cum, enum machine_mode mode, +ia64_function_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { return ia64_function_arg_1 (cum, mode, type, named, false); @@ -4863,7 +4863,7 @@ ia64_function_arg (cumulative_args_t cum, enum machine_mode mode, static rtx ia64_function_incoming_arg (cumulative_args_t cum, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named) { return ia64_function_arg_1 (cum, mode, type, named, true); @@ -4874,7 +4874,7 @@ ia64_function_incoming_arg (cumulative_args_t cum, in memory. */ static int -ia64_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +ia64_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -4900,7 +4900,7 @@ ia64_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, /* Return ivms_arg_type based on machine_mode. */ static enum ivms_arg_type -ia64_arg_type (enum machine_mode mode) +ia64_arg_type (machine_mode mode) { switch (mode) { @@ -4917,13 +4917,13 @@ ia64_arg_type (enum machine_mode mode) ia64_function_arg. */ static void -ia64_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +ia64_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); int words = ia64_function_arg_words (type, mode); int offset = ia64_function_arg_offset (cum, type, words); - enum machine_mode hfa_mode = VOIDmode; + machine_mode hfa_mode = VOIDmode; /* If all arg slots are already full, then there is nothing to do. */ if (cum->words >= MAX_ARGUMENT_SLOTS) @@ -5015,7 +5015,7 @@ ia64_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, even though their normal alignment is 8 bytes. See ia64_function_arg. */ static unsigned int -ia64_function_arg_boundary (enum machine_mode mode, const_tree type) +ia64_function_arg_boundary (machine_mode mode, const_tree type) { if (mode == TFmode && TARGET_HPUX && TARGET_ILP32) return PARM_BOUNDARY * 2; @@ -5089,8 +5089,8 @@ ia64_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, static bool ia64_return_in_memory (const_tree valtype, const_tree fntype ATTRIBUTE_UNUSED) { - enum machine_mode mode; - enum machine_mode hfa_mode; + machine_mode mode; + machine_mode hfa_mode; HOST_WIDE_INT byte_size; mode = TYPE_MODE (valtype); @@ -5127,8 +5127,8 @@ ia64_function_value (const_tree valtype, const_tree fn_decl_or_type, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; - enum machine_mode hfa_mode; + machine_mode mode; + machine_mode hfa_mode; int unsignedp; const_tree func = fn_decl_or_type; @@ -5216,7 +5216,7 @@ ia64_function_value (const_tree valtype, /* Worker function for TARGET_LIBCALL_VALUE. */ static rtx -ia64_libcall_value (enum machine_mode mode, +ia64_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, @@ -5678,7 +5678,7 @@ ia64_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, one in class TO, using MODE. */ static int -ia64_register_move_cost (enum machine_mode mode, reg_class_t from, +ia64_register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to) { /* ADDL_REGS is the same as GR_REGS for movement purposes. */ @@ -5750,7 +5750,7 @@ ia64_register_move_cost (enum machine_mode mode, reg_class_t from, memory. */ static int -ia64_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +ia64_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t rclass, bool in ATTRIBUTE_UNUSED) { @@ -5804,7 +5804,7 @@ ia64_preferred_reload_class (rtx x, reg_class_t rclass) enum reg_class ia64_secondary_reload_class (enum reg_class rclass, - enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) + machine_mode mode ATTRIBUTE_UNUSED, rtx x) { int regno = -1; @@ -7876,7 +7876,7 @@ get_spec_load_gen_function (ds_t ts, int mode_no) return gen_ld[mode_no]; } -/* Constants that help mapping 'enum machine_mode' to int. */ +/* Constants that help mapping 'machine_mode' to int. */ enum SPEC_MODES { SPEC_MODE_INVALID = -1, @@ -7894,7 +7894,7 @@ enum /* Return index of the MODE. */ static int -ia64_mode_to_int (enum machine_mode mode) +ia64_mode_to_int (machine_mode mode) { switch (mode) { @@ -10443,7 +10443,7 @@ ia64_init_builtins (void) rtx ia64_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -10467,7 +10467,7 @@ ia64_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, case IA64_BUILTIN_INFQ: case IA64_BUILTIN_HUGE_VALQ: { - enum machine_mode target_mode = TYPE_MODE (TREE_TYPE (exp)); + machine_mode target_mode = TYPE_MODE (TREE_TYPE (exp)); REAL_VALUE_TYPE inf; rtx tmp; @@ -10509,7 +10509,7 @@ ia64_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) most significant bits of the stack slot. */ enum direction -ia64_hpux_function_arg_padding (enum machine_mode mode, const_tree type) +ia64_hpux_function_arg_padding (machine_mode mode, const_tree type) { /* Exception to normal case for structures/unions/etc. */ @@ -10676,7 +10676,7 @@ ia64_soft_fp_init_libfuncs (void) } static bool -ia64_vms_valid_pointer_mode (enum machine_mode mode) +ia64_vms_valid_pointer_mode (machine_mode mode) { return (mode == SImode || mode == DImode); } @@ -10703,7 +10703,7 @@ ia64_reloc_rw_mask (void) is to honor small data. */ static section * -ia64_select_rtx_section (enum machine_mode mode, rtx x, +ia64_select_rtx_section (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align) { if (GET_MODE_SIZE (mode) > 0 @@ -10912,7 +10912,7 @@ ia64_struct_value_rtx (tree fntype, } static bool -ia64_scalar_mode_supported_p (enum machine_mode mode) +ia64_scalar_mode_supported_p (machine_mode mode) { switch (mode) { @@ -10938,7 +10938,7 @@ ia64_scalar_mode_supported_p (enum machine_mode mode) } static bool -ia64_vector_mode_supported_p (enum machine_mode mode) +ia64_vector_mode_supported_p (machine_mode mode) { switch (mode) { @@ -10958,7 +10958,7 @@ ia64_vector_mode_supported_p (enum machine_mode mode) /* Implement TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P. */ static bool -ia64_libgcc_floating_mode_supported_p (enum machine_mode mode) +ia64_libgcc_floating_mode_supported_p (machine_mode mode) { switch (mode) { @@ -11175,7 +11175,7 @@ ia64_handle_version_id_attribute (tree *node ATTRIBUTE_UNUSED, /* Target hook for c_mode_for_suffix. */ -static enum machine_mode +static machine_mode ia64_c_mode_for_suffix (char suffix) { if (suffix == 'q') @@ -11214,7 +11214,7 @@ ia64_dconst_0_375 (void) return ia64_dconst_0_375_rtx; } -static enum machine_mode +static machine_mode ia64_get_reg_raw_mode (int regno) { if (FR_REGNO_P (regno)) @@ -11226,7 +11226,7 @@ ia64_get_reg_raw_mode (int regno) anymore. */ bool -ia64_member_type_forces_blk (const_tree, enum machine_mode mode) +ia64_member_type_forces_blk (const_tree, machine_mode mode) { return TARGET_HPUX && mode == TFmode; } @@ -11273,7 +11273,7 @@ static bool expand_vselect_vconcat (rtx target, rtx op0, rtx op1, const unsigned char *perm, unsigned nelt) { - enum machine_mode v2mode; + machine_mode v2mode; rtx x; v2mode = GET_MODE_2XWIDER_MODE (GET_MODE (op0)); @@ -11708,7 +11708,7 @@ ia64_expand_vec_perm_const (rtx operands[4]) /* Implement targetm.vectorize.vec_perm_const_ok. */ static bool -ia64_vectorize_vec_perm_const_ok (enum machine_mode vmode, +ia64_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel) { struct expand_vec_perm_d d; @@ -11781,7 +11781,7 @@ void ia64_expand_vec_perm_even_odd (rtx target, rtx op0, rtx op1, int odd) { struct expand_vec_perm_d d; - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); unsigned int i, nelt = GET_MODE_NUNITS (vmode); bool ok; diff --git a/gcc/config/iq2000/iq2000-protos.h b/gcc/config/iq2000/iq2000-protos.h index 6732234..43c0aa6 100644 --- a/gcc/config/iq2000/iq2000-protos.h +++ b/gcc/config/iq2000/iq2000-protos.h @@ -20,8 +20,8 @@ #ifndef GCC_IQ2000_PROTOS_H #define GCC_IQ2000_PROTOS_H -extern int iq2000_check_split (rtx, enum machine_mode); -extern int iq2000_reg_mode_ok_for_base_p (rtx, enum machine_mode, int); +extern int iq2000_check_split (rtx, machine_mode); +extern int iq2000_reg_mode_ok_for_base_p (rtx, machine_mode, int); extern const char * iq2000_fill_delay_slot (const char *, enum delay_type, rtx *, rtx_insn *); extern const char * iq2000_move_1word (rtx *, rtx_insn *, int); extern HOST_WIDE_INT iq2000_debugger_offset (rtx, HOST_WIDE_INT); @@ -38,7 +38,7 @@ extern char * iq2000_output_conditional_branch (rtx_insn *, rtx *, #ifdef RTX_CODE extern rtx gen_int_relational (enum rtx_code, rtx, rtx, rtx, int *); -extern void gen_conditional_branch (rtx *, enum machine_mode); +extern void gen_conditional_branch (rtx *, machine_mode); #endif #ifdef TREE_CODE diff --git a/gcc/config/iq2000/iq2000.c b/gcc/config/iq2000/iq2000.c index b04ffe5..9f45b1d 100644 --- a/gcc/config/iq2000/iq2000.c +++ b/gcc/config/iq2000/iq2000.c @@ -154,42 +154,42 @@ static rtx iq2000_load_reg3; static rtx iq2000_load_reg4; /* Mode used for saving/restoring general purpose registers. */ -static enum machine_mode gpr_mode; +static machine_mode gpr_mode; /* Initialize the GCC target structure. */ static struct machine_function* iq2000_init_machine_status (void); static void iq2000_option_override (void); -static section *iq2000_select_rtx_section (enum machine_mode, rtx, +static section *iq2000_select_rtx_section (machine_mode, rtx, unsigned HOST_WIDE_INT); static void iq2000_init_builtins (void); -static rtx iq2000_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx iq2000_expand_builtin (tree, rtx, rtx, machine_mode, int); static bool iq2000_return_in_memory (const_tree, const_tree); static void iq2000_setup_incoming_varargs (cumulative_args_t, - enum machine_mode, tree, int *, + machine_mode, tree, int *, int); static bool iq2000_rtx_costs (rtx, int, int, int, int *, bool); -static int iq2000_address_cost (rtx, enum machine_mode, addr_space_t, +static int iq2000_address_cost (rtx, machine_mode, addr_space_t, bool); static section *iq2000_select_section (tree, int, unsigned HOST_WIDE_INT); -static rtx iq2000_legitimize_address (rtx, rtx, enum machine_mode); -static bool iq2000_pass_by_reference (cumulative_args_t, enum machine_mode, +static rtx iq2000_legitimize_address (rtx, rtx, machine_mode); +static bool iq2000_pass_by_reference (cumulative_args_t, machine_mode, const_tree, bool); -static int iq2000_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static int iq2000_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); static rtx iq2000_function_arg (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static void iq2000_function_arg_advance (cumulative_args_t, - enum machine_mode, const_tree, bool); -static unsigned int iq2000_function_arg_boundary (enum machine_mode, + machine_mode, const_tree, bool); +static unsigned int iq2000_function_arg_boundary (machine_mode, const_tree); static void iq2000_va_start (tree, rtx); -static bool iq2000_legitimate_address_p (enum machine_mode, rtx, bool); +static bool iq2000_legitimate_address_p (machine_mode, rtx, bool); static bool iq2000_can_eliminate (const int, const int); static void iq2000_asm_trampoline_template (FILE *); static void iq2000_trampoline_init (rtx, tree, rtx); static rtx iq2000_function_value (const_tree, const_tree, bool); -static rtx iq2000_libcall_value (enum machine_mode, const_rtx); +static rtx iq2000_libcall_value (machine_mode, const_rtx); static void iq2000_print_operand (FILE *, rtx, int); static void iq2000_print_operand_address (FILE *, rtx); static bool iq2000_print_operand_punct_valid_p (unsigned char code); @@ -272,7 +272,7 @@ struct gcc_target targetm = TARGET_INITIALIZER; /* Return nonzero if we split the address into high and low parts. */ int -iq2000_check_split (rtx address, enum machine_mode mode) +iq2000_check_split (rtx address, machine_mode mode) { /* This is the same check used in simple_memory_operand. We use it here because LO_SUM is not offsettable. */ @@ -292,7 +292,7 @@ iq2000_check_split (rtx address, enum machine_mode mode) int iq2000_reg_mode_ok_for_base_p (rtx reg, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int strict) { return (strict @@ -305,7 +305,7 @@ iq2000_reg_mode_ok_for_base_p (rtx reg, function is called during reload. */ bool -iq2000_legitimate_address_p (enum machine_mode mode, rtx xinsn, bool strict) +iq2000_legitimate_address_p (machine_mode mode, rtx xinsn, bool strict) { if (TARGET_DEBUG_A_MODE) { @@ -366,7 +366,7 @@ iq2000_legitimate_address_p (enum machine_mode mode, rtx xinsn, bool strict) } if (TARGET_DEBUG_A_MODE) - GO_PRINTF ("Not a enum machine_mode mode, legitimate address\n"); + GO_PRINTF ("Not a machine_mode mode, legitimate address\n"); /* The address was not legitimate. */ return 0; @@ -386,7 +386,7 @@ iq2000_fill_delay_slot (const char *ret, enum delay_type type, rtx operands[], rtx_insn *cur_insn) { rtx set_reg; - enum machine_mode mode; + machine_mode mode; rtx_insn *next_insn = cur_insn ? NEXT_INSN (cur_insn) : NULL; int num_nops; @@ -573,7 +573,7 @@ iq2000_move_1word (rtx operands[], rtx_insn *insn, int unsignedp) rtx op1 = operands[1]; enum rtx_code code0 = GET_CODE (op0); enum rtx_code code1 = GET_CODE (op1); - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); int subreg_offset0 = 0; int subreg_offset1 = 0; enum delay_type delay = DELAY_NONE; @@ -796,7 +796,7 @@ iq2000_move_1word (rtx operands[], rtx_insn *insn, int unsignedp) /* Provide the costs of an addressing mode that contains ADDR. */ static int -iq2000_address_cost (rtx addr, enum machine_mode mode, addr_space_t as, +iq2000_address_cost (rtx addr, machine_mode mode, addr_space_t as, bool speed) { switch (GET_CODE (addr)) @@ -924,7 +924,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1, }; enum internal_test test; - enum machine_mode mode; + machine_mode mode; struct cmp_info *p_info; int branch_p; int eqne_p; @@ -1058,7 +1058,7 @@ gen_int_relational (enum rtx_code test_code, rtx result, rtx cmp0, rtx cmp1, The comparison operands are saved away by cmp{si,di,sf,df}. */ void -gen_conditional_branch (rtx operands[], enum machine_mode mode) +gen_conditional_branch (rtx operands[], machine_mode mode) { enum rtx_code test_code = GET_CODE (operands[0]); rtx cmp0 = operands[1]; @@ -1147,7 +1147,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, position in CUM. */ static void -iq2000_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +iq2000_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1218,7 +1218,7 @@ iq2000_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, and type TYPE in CUM, or 0 if the argument is to be passed on the stack. */ static rtx -iq2000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +iq2000_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1375,7 +1375,7 @@ iq2000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, if (mode == VOIDmode) { if (cum->num_adjusts > 0) - ret = gen_rtx_PARALLEL ((enum machine_mode) cum->fp_code, + ret = gen_rtx_PARALLEL ((machine_mode) cum->fp_code, gen_rtvec_v (cum->num_adjusts, cum->adjust)); } @@ -1383,7 +1383,7 @@ iq2000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, } static unsigned int -iq2000_function_arg_boundary (enum machine_mode mode, const_tree type) +iq2000_function_arg_boundary (machine_mode mode, const_tree type) { return (type != NULL_TREE ? (TYPE_ALIGN (type) <= PARM_BOUNDARY @@ -1395,7 +1395,7 @@ iq2000_function_arg_boundary (enum machine_mode mode, const_tree type) } static int -iq2000_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +iq2000_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1934,7 +1934,7 @@ iq2000_expand_prologue (void) for (cur_arg = fnargs; cur_arg != 0; cur_arg = next_arg) { tree passed_type = DECL_ARG_TYPE (cur_arg); - enum machine_mode passed_mode = TYPE_MODE (passed_type); + machine_mode passed_mode = TYPE_MODE (passed_type); rtx entry_parm; if (TREE_ADDRESSABLE (passed_type)) @@ -2167,7 +2167,7 @@ iq2000_can_use_return_insn (void) mode MODE. */ static section * -iq2000_select_rtx_section (enum machine_mode mode, rtx x ATTRIBUTE_UNUSED, +iq2000_select_rtx_section (machine_mode mode, rtx x ATTRIBUTE_UNUSED, unsigned HOST_WIDE_INT align) { /* For embedded applications, always put constants in read-only data, @@ -2226,7 +2226,7 @@ iq2000_function_value (const_tree valtype, bool outgoing ATTRIBUTE_UNUSED) { int reg = GP_RETURN; - enum machine_mode mode = TYPE_MODE (valtype); + machine_mode mode = TYPE_MODE (valtype); int unsignedp = TYPE_UNSIGNED (valtype); const_tree func = fn_decl_or_type; @@ -2243,7 +2243,7 @@ iq2000_function_value (const_tree valtype, /* Worker function for TARGET_LIBCALL_VALUE. */ static rtx -iq2000_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +iq2000_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (((GET_MODE_CLASS (mode) != MODE_INT || GET_MODE_SIZE (mode) >= 4) @@ -2265,7 +2265,7 @@ iq2000_function_value_regno_p (const unsigned int regno) /* Return true when an argument must be passed by reference. */ static bool -iq2000_pass_by_reference (cumulative_args_t cum_v, enum machine_mode mode, +iq2000_pass_by_reference (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -2602,7 +2602,7 @@ expand_one_builtin (enum insn_code icode, rtx target, tree exp, rtx pat; tree arg [5]; rtx op [5]; - enum machine_mode mode [5]; + machine_mode mode [5]; int i; mode[0] = insn_data[icode].operand[0].mode; @@ -2674,7 +2674,7 @@ expand_one_builtin (enum insn_code icode, rtx target, tree exp, static rtx iq2000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -2866,7 +2866,7 @@ iq2000_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) static void iq2000_setup_incoming_varargs (cumulative_args_t cum_v, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, tree type ATTRIBUTE_UNUSED, int * pretend_size, int no_rtl) { @@ -3250,7 +3250,7 @@ iq2000_print_operand_punct_valid_p (unsigned char code) rtx iq2000_legitimize_address (rtx xinsn, rtx old_x ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { if (TARGET_DEBUG_B_MODE) { @@ -3310,7 +3310,7 @@ iq2000_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, int opno ATTRIBUTE_UNUSED, int * total, bool speed ATTRIBUTE_UNUSED) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); switch (code) { diff --git a/gcc/config/iq2000/iq2000.md b/gcc/config/iq2000/iq2000.md index 4eb2eb1..7224bb4 100644 --- a/gcc/config/iq2000/iq2000.md +++ b/gcc/config/iq2000/iq2000.md @@ -691,7 +691,7 @@ { if (iq2000_check_split (operands[1], SImode)) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); rtx tem = ((reload_in_progress | reload_completed) ? operands[0] : gen_reg_rtx (mode)); diff --git a/gcc/config/lm32/lm32-protos.h b/gcc/config/lm32/lm32-protos.h index 898d4fd..c56b1fa 100644 --- a/gcc/config/lm32/lm32-protos.h +++ b/gcc/config/lm32/lm32-protos.h @@ -32,7 +32,7 @@ extern int lm32_can_use_return (void); extern rtx lm32_return_addr_rtx (int count, rtx frame); extern int lm32_expand_block_move (rtx *); extern int nonpic_symbol_mentioned_p (rtx); -extern rtx lm32_legitimize_pic_address (rtx, enum machine_mode, rtx); +extern rtx lm32_legitimize_pic_address (rtx, machine_mode, rtx); extern void lm32_expand_scc (rtx operands[]); extern void lm32_expand_conditional_branch (rtx operands[]); -extern bool lm32_move_ok (enum machine_mode, rtx operands[2]); +extern bool lm32_move_ok (machine_mode, rtx operands[2]); diff --git a/gcc/config/lm32/lm32.c b/gcc/config/lm32/lm32.c index 78e1c1d..449833c 100644 --- a/gcc/config/lm32/lm32.c +++ b/gcc/config/lm32/lm32.c @@ -81,20 +81,20 @@ static void expand_save_restore (struct lm32_frame_info *info, int op); static void stack_adjust (HOST_WIDE_INT amount); static bool lm32_in_small_data_p (const_tree); static void lm32_setup_incoming_varargs (cumulative_args_t cum, - enum machine_mode mode, tree type, + machine_mode mode, tree type, int *pretend_size, int no_rtl); static bool lm32_rtx_costs (rtx x, int code, int outer_code, int opno, int *total, bool speed); static bool lm32_can_eliminate (const int, const int); static bool -lm32_legitimate_address_p (enum machine_mode mode, rtx x, bool strict); +lm32_legitimate_address_p (machine_mode mode, rtx x, bool strict); static HOST_WIDE_INT lm32_compute_frame_size (int size); static void lm32_option_override (void); static rtx lm32_function_arg (cumulative_args_t cum, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named); static void lm32_function_arg_advance (cumulative_args_t cum, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named); #undef TARGET_OPTION_OVERRIDE @@ -178,7 +178,7 @@ gen_int_relational (enum rtx_code code, rtx cmp1, rtx destination) { - enum machine_mode mode; + machine_mode mode; int branch_p; mode = GET_MODE (cmp0); @@ -632,7 +632,7 @@ lm32_print_operand_address (FILE * file, rtx addr) (otherwise it is an extra parameter matching an ellipsis). */ static rtx -lm32_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +lm32_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -651,7 +651,7 @@ lm32_function_arg (cumulative_args_t cum_v, enum machine_mode mode, } static void -lm32_function_arg_advance (cumulative_args_t cum, enum machine_mode mode, +lm32_function_arg_advance (cumulative_args_t cum, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { *get_cumulative_args (cum) += LM32_NUM_REGS2 (mode, type); @@ -687,7 +687,7 @@ lm32_compute_initial_elimination_offset (int from, int to) } static void -lm32_setup_incoming_varargs (cumulative_args_t cum_v, enum machine_mode mode, +lm32_setup_incoming_varargs (cumulative_args_t cum_v, machine_mode mode, tree type, int *pretend_size, int no_rtl) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -831,7 +831,7 @@ lm32_block_move_inline (rtx dest, rtx src, HOST_WIDE_INT length, HOST_WIDE_INT offset, delta; unsigned HOST_WIDE_INT bits; int i; - enum machine_mode mode; + machine_mode mode; rtx *regs; /* Work out how many bits to move at a time. */ @@ -940,7 +940,7 @@ static bool lm32_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); bool small_mode; const int arithmetic_latency = 1; @@ -1207,7 +1207,7 @@ lm32_can_eliminate (const int from ATTRIBUTE_UNUSED, const int to) /* Implement TARGET_LEGITIMATE_ADDRESS_P. */ static bool -lm32_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) +lm32_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) { /* (rM) */ if (strict && REG_P (x) && STRICT_REG_OK_FOR_BASE_P (x)) @@ -1234,7 +1234,7 @@ lm32_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool /* Check a move is not memory to memory. */ bool -lm32_move_ok (enum machine_mode mode, rtx operands[2]) { +lm32_move_ok (machine_mode mode, rtx operands[2]) { if (memory_operand (operands[0], mode)) return register_or_zero_operand (operands[1], mode); return true; diff --git a/gcc/config/m32c/m32c-protos.h b/gcc/config/m32c/m32c-protos.h index b67351c..2b8060e 100644 --- a/gcc/config/m32c/m32c-protos.h +++ b/gcc/config/m32c/m32c-protos.h @@ -38,7 +38,7 @@ int m32c_trampoline_size (void); #ifdef RTX_CODE -int m32c_cannot_change_mode_class (enum machine_mode, enum machine_mode, int); +int m32c_cannot_change_mode_class (machine_mode, machine_mode, int); rtx m32c_eh_return_stackadj_rtx (void); void m32c_emit_eh_epilogue (rtx); int m32c_expand_cmpstr (rtx *); @@ -49,24 +49,24 @@ int m32c_expand_movstr (rtx *); void m32c_expand_neg_mulpsi3 (rtx *); int m32c_expand_setmemhi (rtx *); bool m32c_matches_constraint_p (rtx, int); -int m32c_hard_regno_nregs (int, enum machine_mode); -int m32c_hard_regno_ok (int, enum machine_mode); +int m32c_hard_regno_nregs (int, machine_mode); +int m32c_hard_regno_ok (int, machine_mode); bool m32c_illegal_subreg_p (rtx); -bool m32c_immd_dbl_mov (rtx *, enum machine_mode); +bool m32c_immd_dbl_mov (rtx *, machine_mode); rtx m32c_incoming_return_addr_rtx (void); -int m32c_legitimize_reload_address (rtx *, enum machine_mode, int, int, int); -int m32c_limit_reload_class (enum machine_mode, int); -int m32c_modes_tieable_p (enum machine_mode, enum machine_mode); -bool m32c_mov_ok (rtx *, enum machine_mode); +int m32c_legitimize_reload_address (rtx *, machine_mode, int, int, int); +int m32c_limit_reload_class (machine_mode, int); +int m32c_modes_tieable_p (machine_mode, machine_mode); +bool m32c_mov_ok (rtx *, machine_mode); char * m32c_output_compare (rtx_insn *, rtx *); -int m32c_prepare_move (rtx *, enum machine_mode); +int m32c_prepare_move (rtx *, machine_mode); int m32c_prepare_shift (rtx *, int, int); int m32c_reg_ok_for_base_p (rtx, int); enum reg_class m32c_regno_reg_class (int); rtx m32c_return_addr_rtx (int); const char *m32c_scc_pattern (rtx *, RTX_CODE); -int m32c_secondary_reload_class (int, enum machine_mode, rtx); -int m32c_split_move (rtx *, enum machine_mode, int); +int m32c_secondary_reload_class (int, machine_mode, rtx); +int m32c_split_move (rtx *, machine_mode, int); int m32c_split_psi_p (rtx *); int current_function_special_page_vector (rtx); diff --git a/gcc/config/m32c/m32c.c b/gcc/config/m32c/m32c.c index 8217a90..132873f 100644 --- a/gcc/config/m32c/m32c.c +++ b/gcc/config/m32c/m32c.c @@ -96,22 +96,22 @@ static int m32c_comp_type_attributes (const_tree, const_tree); static bool m32c_fixed_condition_code_regs (unsigned int *, unsigned int *); static struct machine_function *m32c_init_machine_status (void); static void m32c_insert_attributes (tree, tree *); -static bool m32c_legitimate_address_p (enum machine_mode, rtx, bool); -static bool m32c_addr_space_legitimate_address_p (enum machine_mode, rtx, bool, addr_space_t); -static rtx m32c_function_arg (cumulative_args_t, enum machine_mode, +static bool m32c_legitimate_address_p (machine_mode, rtx, bool); +static bool m32c_addr_space_legitimate_address_p (machine_mode, rtx, bool, addr_space_t); +static rtx m32c_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static bool m32c_pass_by_reference (cumulative_args_t, enum machine_mode, +static bool m32c_pass_by_reference (cumulative_args_t, machine_mode, const_tree, bool); -static void m32c_function_arg_advance (cumulative_args_t, enum machine_mode, +static void m32c_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static unsigned int m32c_function_arg_boundary (enum machine_mode, const_tree); +static unsigned int m32c_function_arg_boundary (machine_mode, const_tree); static int m32c_pushm_popm (Push_Pop_Type); static bool m32c_strict_argument_naming (cumulative_args_t); static rtx m32c_struct_value_rtx (tree, int); -static rtx m32c_subreg (enum machine_mode, rtx, enum machine_mode, int); +static rtx m32c_subreg (machine_mode, rtx, machine_mode, int); static int need_to_save (int); static rtx m32c_function_value (const_tree, const_tree, bool); -static rtx m32c_libcall_value (enum machine_mode, const_rtx); +static rtx m32c_libcall_value (machine_mode, const_rtx); /* Returns true if an address is specified, else false. */ static bool m32c_get_pragma_address (const char *varname, unsigned *addr); @@ -291,7 +291,7 @@ encode_pattern (rtx x) by print_operand(). */ static const char * -reg_name_with_mode (int regno, enum machine_mode mode) +reg_name_with_mode (int regno, machine_mode mode) { int mlen = GET_MODE_SIZE (mode); if (regno == R0_REGNO && mlen == 1) @@ -379,7 +379,7 @@ reduce_class (reg_class_t original_class, reg_class_t limiting_class, /* Used by m32c_register_move_cost to determine if a move is impossibly expensive. */ static bool -class_can_hold_mode (reg_class_t rclass, enum machine_mode mode) +class_can_hold_mode (reg_class_t rclass, machine_mode mode) { /* Cache the results: 0=untested 1=no 2=yes */ static char results[LIM_REG_CLASSES][MAX_MACHINE_MODE]; @@ -561,7 +561,7 @@ m32c_conditional_register_usage (void) different registers are different sizes from each other, *and* may be different sizes in different chip families. */ static int -m32c_hard_regno_nregs_1 (int regno, enum machine_mode mode) +m32c_hard_regno_nregs_1 (int regno, machine_mode mode) { if (regno == FLG_REGNO && mode == CCmode) return 1; @@ -587,7 +587,7 @@ m32c_hard_regno_nregs_1 (int regno, enum machine_mode mode) } int -m32c_hard_regno_nregs (int regno, enum machine_mode mode) +m32c_hard_regno_nregs (int regno, machine_mode mode) { int rv = m32c_hard_regno_nregs_1 (regno, mode); return rv ? rv : 1; @@ -596,7 +596,7 @@ m32c_hard_regno_nregs (int regno, enum machine_mode mode) /* Implements HARD_REGNO_MODE_OK. The above function does the work already; just test its return value. */ int -m32c_hard_regno_ok (int regno, enum machine_mode mode) +m32c_hard_regno_ok (int regno, machine_mode mode) { return m32c_hard_regno_nregs_1 (regno, mode) != 0; } @@ -606,7 +606,7 @@ m32c_hard_regno_ok (int regno, enum machine_mode mode) bigger than our registers anyway, it's easier to implement this function that way, leaving QImode as the only unique case. */ int -m32c_modes_tieable_p (enum machine_mode m1, enum machine_mode m2) +m32c_modes_tieable_p (machine_mode m1, machine_mode m2) { if (GET_MODE_SIZE (m1) == GET_MODE_SIZE (m2)) return 1; @@ -735,7 +735,7 @@ m32c_preferred_output_reload_class (rtx x, reg_class_t rclass) address registers for reloads since they're needed for address reloads. */ int -m32c_limit_reload_class (enum machine_mode mode, int rclass) +m32c_limit_reload_class (machine_mode mode, int rclass) { #if DEBUG_RELOAD fprintf (stderr, "limit_reload_class for %s: %s ->", @@ -763,7 +763,7 @@ m32c_limit_reload_class (enum machine_mode mode, int rclass) reloaded through appropriately sized general or address registers. */ int -m32c_secondary_reload_class (int rclass, enum machine_mode mode, rtx x) +m32c_secondary_reload_class (int rclass, machine_mode mode, rtx x) { int cc = class_contents[rclass][0]; #if DEBUG0 @@ -804,7 +804,7 @@ m32c_class_likely_spilled_p (reg_class_t regclass) #define TARGET_CLASS_MAX_NREGS m32c_class_max_nregs static unsigned char -m32c_class_max_nregs (reg_class_t regclass, enum machine_mode mode) +m32c_class_max_nregs (reg_class_t regclass, machine_mode mode) { int rn; unsigned char max = 0; @@ -824,8 +824,8 @@ m32c_class_max_nregs (reg_class_t regclass, enum machine_mode mode) registers (well, it does on a0/a1 but if we let gcc do that, reload suffers). Otherwise, we allow changes to larger modes. */ int -m32c_cannot_change_mode_class (enum machine_mode from, - enum machine_mode to, int rclass) +m32c_cannot_change_mode_class (machine_mode from, + machine_mode to, int rclass) { int rn; #if DEBUG0 @@ -962,7 +962,7 @@ m32c_matches_constraint_p (rtx value, int constraint) rtx m32c_return_addr_rtx (int count) { - enum machine_mode mode; + machine_mode mode; int offset; rtx ra_mem; @@ -1189,7 +1189,7 @@ m32c_pushm_popm (Push_Pop_Type ppt) if (ppt == PP_pushm) { - enum machine_mode mode = (bytes == 2) ? HImode : SImode; + machine_mode mode = (bytes == 2) ? HImode : SImode; rtx addr; /* Always use stack_pointer_rtx instead of calling @@ -1344,7 +1344,7 @@ m32c_push_rounding (int n) #define TARGET_FUNCTION_ARG m32c_function_arg static rtx m32c_function_arg (cumulative_args_t ca_v, - enum machine_mode mode, const_tree type, bool named) + machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v); @@ -1397,7 +1397,7 @@ m32c_function_arg (cumulative_args_t ca_v, #define TARGET_PASS_BY_REFERENCE m32c_pass_by_reference static bool m32c_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1427,7 +1427,7 @@ m32c_init_cumulative_args (CUMULATIVE_ARGS * ca, #define TARGET_FUNCTION_ARG_ADVANCE m32c_function_arg_advance static void m32c_function_arg_advance (cumulative_args_t ca_v, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1443,7 +1443,7 @@ m32c_function_arg_advance (cumulative_args_t ca_v, #undef TARGET_FUNCTION_ARG_BOUNDARY #define TARGET_FUNCTION_ARG_BOUNDARY m32c_function_arg_boundary static unsigned int -m32c_function_arg_boundary (enum machine_mode mode ATTRIBUTE_UNUSED, +m32c_function_arg_boundary (machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED) { return (TARGET_A16 ? 8 : 16); @@ -1464,7 +1464,7 @@ m32c_function_arg_regno_p (int r) #undef TARGET_VALID_POINTER_MODE #define TARGET_VALID_POINTER_MODE m32c_valid_pointer_mode static bool -m32c_valid_pointer_mode (enum machine_mode mode) +m32c_valid_pointer_mode (machine_mode mode) { if (mode == HImode || mode == PSImode @@ -1488,7 +1488,7 @@ m32c_valid_pointer_mode (enum machine_mode mode) #define TARGET_LIBCALL_VALUE m32c_libcall_value static rtx -m32c_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +m32c_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { /* return reg or parallel */ #if 0 @@ -1550,7 +1550,7 @@ m32c_function_value (const_tree valtype, bool outgoing ATTRIBUTE_UNUSED) { /* return reg or parallel */ - const enum machine_mode mode = TYPE_MODE (valtype); + const machine_mode mode = TYPE_MODE (valtype); return m32c_libcall_value (mode, NULL_RTX); } @@ -1672,7 +1672,7 @@ m32c_trampoline_init (rtx m_tramp, tree fndecl, rtx chainval) #undef TARGET_LEGITIMATE_ADDRESS_P #define TARGET_LEGITIMATE_ADDRESS_P m32c_legitimate_address_p bool -m32c_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +m32c_legitimate_address_p (machine_mode mode, rtx x, bool strict) { int mode_adjust; if (CONSTANT_P (x)) @@ -1852,7 +1852,7 @@ m32c_reg_ok_for_base_p (rtx x, int strict) #define TARGET_LEGITIMIZE_ADDRESS m32c_legitimize_address static rtx m32c_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { #if DEBUG0 fprintf (stderr, "m32c_legitimize_address for mode %s\n", mode_name[mode]); @@ -1880,7 +1880,7 @@ m32c_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, /* Implements LEGITIMIZE_RELOAD_ADDRESS. See comment above. */ int m32c_legitimize_reload_address (rtx * x, - enum machine_mode mode, + machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -1943,7 +1943,7 @@ m32c_legitimize_reload_address (rtx * x, /* Return the appropriate mode for a named address pointer. */ #undef TARGET_ADDR_SPACE_POINTER_MODE #define TARGET_ADDR_SPACE_POINTER_MODE m32c_addr_space_pointer_mode -static enum machine_mode +static machine_mode m32c_addr_space_pointer_mode (addr_space_t addrspace) { switch (addrspace) @@ -1960,7 +1960,7 @@ m32c_addr_space_pointer_mode (addr_space_t addrspace) /* Return the appropriate mode for a named address address. */ #undef TARGET_ADDR_SPACE_ADDRESS_MODE #define TARGET_ADDR_SPACE_ADDRESS_MODE m32c_addr_space_address_mode -static enum machine_mode +static machine_mode m32c_addr_space_address_mode (addr_space_t addrspace) { switch (addrspace) @@ -1979,7 +1979,7 @@ m32c_addr_space_address_mode (addr_space_t addrspace) #define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P \ m32c_addr_space_legitimate_address_p static bool -m32c_addr_space_legitimate_address_p (enum machine_mode mode, rtx x, +m32c_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool strict, addr_space_t as) { if (as == ADDR_SPACE_FAR) @@ -2068,7 +2068,7 @@ m32c_addr_space_legitimate_address_p (enum machine_mode mode, rtx x, #undef TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS #define TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS m32c_addr_space_legitimize_address static rtx -m32c_addr_space_legitimize_address (rtx x, rtx oldx, enum machine_mode mode, +m32c_addr_space_legitimize_address (rtx x, rtx oldx, machine_mode mode, addr_space_t as) { if (as != ADDR_SPACE_GENERIC) @@ -2161,7 +2161,7 @@ m32c_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2) #define TARGET_REGISTER_MOVE_COST m32c_register_move_cost static int -m32c_register_move_cost (enum machine_mode mode, reg_class_t from, +m32c_register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to) { int cost = COSTS_N_INSNS (3); @@ -2209,7 +2209,7 @@ m32c_register_move_cost (enum machine_mode mode, reg_class_t from, #define TARGET_MEMORY_MOVE_COST m32c_memory_move_cost static int -m32c_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +m32c_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -2302,7 +2302,7 @@ m32c_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, #undef TARGET_ADDRESS_COST #define TARGET_ADDRESS_COST m32c_address_cost static int -m32c_address_cost (rtx addr, enum machine_mode mode ATTRIBUTE_UNUSED, +m32c_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -3146,7 +3146,7 @@ m32c_illegal_subreg_p (rtx op) { int offset; unsigned int i; - enum machine_mode src_mode, dest_mode; + machine_mode src_mode, dest_mode; if (GET_CODE (op) == MEM && ! m32c_legitimate_address_p (Pmode, XEXP (op, 0), false)) @@ -3200,7 +3200,7 @@ m32c_illegal_subreg_p (rtx op) number of address registers, and we can get into a situation where we need three of them when we only have two. */ bool -m32c_mov_ok (rtx * operands, enum machine_mode mode ATTRIBUTE_UNUSED) +m32c_mov_ok (rtx * operands, machine_mode mode ATTRIBUTE_UNUSED) { rtx op0 = operands[0]; rtx op1 = operands[1]; @@ -3241,7 +3241,7 @@ m32c_mov_ok (rtx * operands, enum machine_mode mode ATTRIBUTE_UNUSED) location, can be combined into single SImode mov instruction. */ bool m32c_immd_dbl_mov (rtx * operands ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { /* ??? This relied on the now-defunct MEM_SCALAR and MEM_IN_STRUCT_P flags. */ @@ -3253,8 +3253,8 @@ m32c_immd_dbl_mov (rtx * operands ATTRIBUTE_UNUSED, /* Subregs are non-orthogonal for us, because our registers are all different sizes. */ static rtx -m32c_subreg (enum machine_mode outer, - rtx x, enum machine_mode inner, int byte) +m32c_subreg (machine_mode outer, + rtx x, machine_mode inner, int byte) { int r, nr = -1; @@ -3341,7 +3341,7 @@ m32c_subreg (enum machine_mode outer, /* Used to emit move instructions. We split some moves, and avoid mem-mem moves. */ int -m32c_prepare_move (rtx * operands, enum machine_mode mode) +m32c_prepare_move (rtx * operands, machine_mode mode) { if (far_addr_space_p (operands[0]) && CONSTANT_P (operands[1])) @@ -3403,12 +3403,12 @@ m32c_split_psi_p (rtx * operands) (define_expand), 1 if it is not optional (define_insn_and_split), and 3 for define_split (alternate api). */ int -m32c_split_move (rtx * operands, enum machine_mode mode, int split_all) +m32c_split_move (rtx * operands, machine_mode mode, int split_all) { rtx s[4], d[4]; int parts, si, di, rev = 0; int rv = 0, opi = 2; - enum machine_mode submode = HImode; + machine_mode submode = HImode; rtx *ops, local_ops[10]; /* define_split modifies the existing operands, but the other two @@ -3744,7 +3744,7 @@ shift_gen_func_for (int mode, int code) int m32c_prepare_shift (rtx * operands, int scale, int shift_code) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); shift_gen_func func = shift_gen_func_for (mode, shift_code); rtx temp; @@ -4183,7 +4183,7 @@ m32c_emit_epilogue (void) if (cfun->machine->is_interrupt) { - enum machine_mode spmode = TARGET_A16 ? HImode : PSImode; + machine_mode spmode = TARGET_A16 ? HImode : PSImode; /* REIT clears B flag and restores $fp for us, but we still have to fix up the stack. USE_RTS just means we didn't diff --git a/gcc/config/m32r/m32r-protos.h b/gcc/config/m32r/m32r-protos.h index c1b613c..baccf69 100644 --- a/gcc/config/m32r/m32r-protos.h +++ b/gcc/config/m32r/m32r-protos.h @@ -49,13 +49,13 @@ extern rtx m32r_return_addr (int); extern rtx m32r_function_symbol (const char *); #ifdef HAVE_MACHINE_MODES -extern int call_operand (rtx, enum machine_mode); -extern int small_data_operand (rtx, enum machine_mode); -extern int addr24_operand (rtx, enum machine_mode); -extern int addr32_operand (rtx, enum machine_mode); -extern int call26_operand (rtx, enum machine_mode); -extern int memreg_operand (rtx, enum machine_mode); -extern int small_insn_p (rtx, enum machine_mode); +extern int call_operand (rtx, machine_mode); +extern int small_data_operand (rtx, machine_mode); +extern int addr24_operand (rtx, machine_mode); +extern int addr32_operand (rtx, machine_mode); +extern int call26_operand (rtx, machine_mode); +extern int memreg_operand (rtx, machine_mode); +extern int small_insn_p (rtx, machine_mode); #endif /* HAVE_MACHINE_MODES */ diff --git a/gcc/config/m32r/m32r.c b/gcc/config/m32r/m32r.c index 4cf61eb..26b93bf 100644 --- a/gcc/config/m32r/m32r.c +++ b/gcc/config/m32r/m32r.c @@ -78,8 +78,8 @@ static void m32r_option_override (void); static void init_reg_tables (void); static void block_move_call (rtx, rtx, rtx); static int m32r_is_insn (rtx); -static bool m32r_legitimate_address_p (enum machine_mode, rtx, bool); -static rtx m32r_legitimize_address (rtx, rtx, enum machine_mode); +static bool m32r_legitimate_address_p (machine_mode, rtx, bool); +static rtx m32r_legitimize_address (rtx, rtx, machine_mode); static bool m32r_mode_dependent_address_p (const_rtx, addr_space_t); static tree m32r_handle_model_attribute (tree *, tree, tree, int, bool *); static void m32r_print_operand (FILE *, rtx, int); @@ -97,25 +97,25 @@ static void m32r_encode_section_info (tree, rtx, int); static bool m32r_in_small_data_p (const_tree); static bool m32r_return_in_memory (const_tree, const_tree); static rtx m32r_function_value (const_tree, const_tree, bool); -static rtx m32r_libcall_value (enum machine_mode, const_rtx); +static rtx m32r_libcall_value (machine_mode, const_rtx); static bool m32r_function_value_regno_p (const unsigned int); -static void m32r_setup_incoming_varargs (cumulative_args_t, enum machine_mode, +static void m32r_setup_incoming_varargs (cumulative_args_t, machine_mode, tree, int *, int); static void init_idents (void); static bool m32r_rtx_costs (rtx, int, int, int, int *, bool speed); -static int m32r_memory_move_cost (enum machine_mode, reg_class_t, bool); -static bool m32r_pass_by_reference (cumulative_args_t, enum machine_mode, +static int m32r_memory_move_cost (machine_mode, reg_class_t, bool); +static bool m32r_pass_by_reference (cumulative_args_t, machine_mode, const_tree, bool); -static int m32r_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static int m32r_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static rtx m32r_function_arg (cumulative_args_t, enum machine_mode, +static rtx m32r_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static void m32r_function_arg_advance (cumulative_args_t, enum machine_mode, +static void m32r_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); static bool m32r_can_eliminate (const int, const int); static void m32r_conditional_register_usage (void); static void m32r_trampoline_init (rtx, tree, rtx); -static bool m32r_legitimate_constant_p (enum machine_mode, rtx); +static bool m32r_legitimate_constant_p (machine_mode, rtx); /* M32R specific attributes. */ @@ -297,7 +297,7 @@ init_reg_tables (void) for (i = 0; i < NUM_MACHINE_MODES; i++) { - enum machine_mode m = (enum machine_mode) i; + machine_mode m = (machine_mode) i; switch (GET_MODE_CLASS (m)) { @@ -515,7 +515,7 @@ m32r_init_expanders (void) } int -call_operand (rtx op, enum machine_mode mode) +call_operand (rtx op, machine_mode mode) { if (!MEM_P (op)) return 0; @@ -526,7 +526,7 @@ call_operand (rtx op, enum machine_mode mode) /* Return 1 if OP is a reference to an object in .sdata/.sbss. */ int -small_data_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +small_data_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) { if (! TARGET_SDATA_USE) return 0; @@ -546,7 +546,7 @@ small_data_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) /* Return 1 if OP is a symbol that can use 24-bit addressing. */ int -addr24_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +addr24_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) { rtx sym; @@ -580,7 +580,7 @@ addr24_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) /* Return 1 if OP is a symbol that needs 32-bit addressing. */ int -addr32_operand (rtx op, enum machine_mode mode) +addr32_operand (rtx op, machine_mode mode) { rtx sym; @@ -605,7 +605,7 @@ addr32_operand (rtx op, enum machine_mode mode) /* Return 1 if OP is a function that can be called with the `bl' insn. */ int -call26_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +call26_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) { if (flag_pic) return 1; @@ -659,7 +659,7 @@ easy_df_const (rtx op) This is used in insn length calcs. */ int -memreg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +memreg_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) { return MEM_P (op) && REG_P (XEXP (op, 0)); } @@ -668,7 +668,7 @@ memreg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) static bool m32r_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { int size; @@ -893,7 +893,7 @@ gen_compare (enum rtx_code code, rtx x, rtx y, int need_compare) bool gen_cond_store (enum rtx_code code, rtx op0, rtx op1, rtx op2) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); gcc_assert (mode == SImode); switch (code) @@ -1040,7 +1040,7 @@ gen_cond_store (enum rtx_code code, rtx op0, rtx op1, rtx op2) rtx gen_split_move_double (rtx operands[]) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); rtx dest = operands[0]; rtx src = operands[1]; rtx val; @@ -1157,7 +1157,7 @@ gen_split_move_double (rtx operands[]) static int -m32r_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +m32r_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1217,7 +1217,7 @@ m32r_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, and the rest are pushed. */ static rtx -m32r_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +m32r_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1233,7 +1233,7 @@ m32r_function_arg (cumulative_args_t cum_v, enum machine_mode mode, (TYPE is null for libcalls where that information may not be available.) */ static void -m32r_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +m32r_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1265,7 +1265,7 @@ m32r_function_value (const_tree valtype, /* Worker function for TARGET_LIBCALL_VALUE. */ static rtx -m32r_libcall_value (enum machine_mode mode, +m32r_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, 0); @@ -1289,7 +1289,7 @@ m32r_function_value_regno_p (const unsigned int regno) and mode MODE, and we rely on this fact. */ static void -m32r_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, +m32r_setup_incoming_varargs (cumulative_args_t cum, machine_mode mode, tree type, int *pretend_size, int no_rtl) { int first_anon_arg; @@ -1363,7 +1363,7 @@ m32r_issue_rate (void) ??? Is that the right way to look at it? */ static int -m32r_memory_move_cost (enum machine_mode mode, +m32r_memory_move_cost (machine_mode mode, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -2018,7 +2018,7 @@ m32r_legitimize_pic_address (rtx orig, rtx reg) static rtx m32r_legitimize_address (rtx x, rtx orig_x ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (flag_pic) return m32r_legitimize_pic_address (x, NULL_RTX); @@ -2838,7 +2838,7 @@ m32r_rtx_ok_for_offset_p (const_rtx x) } static inline bool -m32r_legitimate_offset_addres_p (enum machine_mode mode ATTRIBUTE_UNUSED, +m32r_legitimate_offset_addres_p (machine_mode mode ATTRIBUTE_UNUSED, const_rtx x, bool strict) { if (GET_CODE (x) == PLUS @@ -2853,7 +2853,7 @@ m32r_legitimate_offset_addres_p (enum machine_mode mode ATTRIBUTE_UNUSED, since more than one instruction will be required. */ static inline bool -m32r_legitimate_lo_sum_addres_p (enum machine_mode mode, const_rtx x, +m32r_legitimate_lo_sum_addres_p (machine_mode mode, const_rtx x, bool strict) { if (GET_CODE (x) == LO_SUM @@ -2868,7 +2868,7 @@ m32r_legitimate_lo_sum_addres_p (enum machine_mode mode, const_rtx x, /* Is this a load and increment operation. */ static inline bool -m32r_load_postinc_p (enum machine_mode mode, const_rtx x, bool strict) +m32r_load_postinc_p (machine_mode mode, const_rtx x, bool strict) { if ((mode == SImode || mode == SFmode) && GET_CODE (x) == POST_INC @@ -2882,7 +2882,7 @@ m32r_load_postinc_p (enum machine_mode mode, const_rtx x, bool strict) /* Is this an increment/decrement and store operation. */ static inline bool -m32r_store_preinc_predec_p (enum machine_mode mode, const_rtx x, bool strict) +m32r_store_preinc_predec_p (machine_mode mode, const_rtx x, bool strict) { if ((mode == SImode || mode == SFmode) && (GET_CODE (x) == PRE_INC || GET_CODE (x) == PRE_DEC) @@ -2896,7 +2896,7 @@ m32r_store_preinc_predec_p (enum machine_mode mode, const_rtx x, bool strict) /* Implement TARGET_LEGITIMATE_ADDRESS_P. */ static bool -m32r_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +m32r_legitimate_address_p (machine_mode mode, rtx x, bool strict) { if (m32r_rtx_ok_for_base_p (x, strict) || m32r_legitimate_offset_addres_p (mode, x, strict) @@ -2926,7 +2926,7 @@ m32r_conditional_register_usage (void) constant to memory if they can't handle them. */ static bool -m32r_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +m32r_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return !(GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS diff --git a/gcc/config/m68k/m68k-protos.h b/gcc/config/m68k/m68k-protos.h index e9ad9c9..571c1cc 100644 --- a/gcc/config/m68k/m68k-protos.h +++ b/gcc/config/m68k/m68k-protos.h @@ -44,7 +44,7 @@ extern const char *output_call (rtx); extern const char *output_sibcall (rtx); extern void output_dbcc_and_branch (rtx *); extern int floating_exact_log2 (rtx); -extern bool strict_low_part_peephole_ok (enum machine_mode mode, +extern bool strict_low_part_peephole_ok (machine_mode mode, rtx_insn *first_insn, rtx target); /* Functions from m68k.c used in macros. */ @@ -55,16 +55,16 @@ extern void notice_update_cc (rtx, rtx); extern bool m68k_legitimate_base_reg_p (rtx, bool); extern bool m68k_legitimate_index_reg_p (rtx, bool); extern bool m68k_illegitimate_symbolic_constant_p (rtx); -extern bool m68k_legitimate_constant_p (enum machine_mode, rtx); +extern bool m68k_legitimate_constant_p (machine_mode, rtx); extern bool m68k_matches_q_p (rtx); extern bool m68k_matches_u_p (rtx); -extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); +extern rtx legitimize_pic_address (rtx, machine_mode, rtx); extern rtx m68k_legitimize_tls_address (rtx); extern bool m68k_tls_reference_p (rtx, bool); -extern int valid_dbcc_comparison_p_2 (rtx, enum machine_mode); -extern rtx m68k_libcall_value (enum machine_mode); +extern int valid_dbcc_comparison_p_2 (rtx, machine_mode); +extern rtx m68k_libcall_value (machine_mode); extern rtx m68k_function_value (const_tree, const_tree); -extern int emit_move_sequence (rtx *, enum machine_mode, rtx); +extern int emit_move_sequence (rtx *, machine_mode, rtx); extern bool m68k_movem_pattern_p (rtx, rtx, HOST_WIDE_INT, bool); extern const char *m68k_output_movem (rtx *, rtx, HOST_WIDE_INT, bool); extern void m68k_final_prescan_insn (rtx_insn *, rtx *, int); @@ -86,9 +86,9 @@ extern enum attr_op_mem m68k_sched_attr_op_mem (rtx_insn *); #endif /* RTX_CODE */ -extern bool m68k_regno_mode_ok (int, enum machine_mode); +extern bool m68k_regno_mode_ok (int, machine_mode); extern enum reg_class m68k_secondary_reload_class (enum reg_class, - enum machine_mode, rtx); + machine_mode, rtx); extern enum reg_class m68k_preferred_reload_class (rtx, enum reg_class); extern int flags_in_68881 (void); extern void m68k_expand_prologue (void); diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 7a990e7..d8abc0e 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -152,7 +152,7 @@ static int m68k_sched_first_cycle_multipass_dfa_lookahead (void); static bool m68k_can_eliminate (const int, const int); static void m68k_conditional_register_usage (void); -static bool m68k_legitimate_address_p (enum machine_mode, rtx, bool); +static bool m68k_legitimate_address_p (machine_mode, rtx, bool); static void m68k_option_override (void); static void m68k_override_options_after_change (void); static rtx find_addr_reg (rtx); @@ -167,7 +167,7 @@ static void m68k_compute_frame_layout (void); static bool m68k_save_reg (unsigned int regno, bool interrupt_handler); static bool m68k_ok_for_sibcall_p (tree, tree); static bool m68k_tls_symbol_p (rtx); -static rtx m68k_legitimize_address (rtx, rtx, enum machine_mode); +static rtx m68k_legitimize_address (rtx, rtx, machine_mode); static bool m68k_rtx_costs (rtx, int, int, int, int *, bool); #if M68K_HONOR_TARGET_STRICT_ALIGNMENT static bool m68k_return_in_memory (const_tree, const_tree); @@ -176,11 +176,11 @@ static void m68k_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; static void m68k_trampoline_init (rtx, tree, rtx); static int m68k_return_pops_args (tree, tree, int); static rtx m68k_delegitimize_address (rtx); -static void m68k_function_arg_advance (cumulative_args_t, enum machine_mode, +static void m68k_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static rtx m68k_function_arg (cumulative_args_t, enum machine_mode, +static rtx m68k_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static bool m68k_cannot_force_const_mem (enum machine_mode mode, rtx x); +static bool m68k_cannot_force_const_mem (machine_mode mode, rtx x); static bool m68k_output_addr_const_extra (FILE *, rtx); static void m68k_init_sync_libfuncs (void) ATTRIBUTE_UNUSED; @@ -933,7 +933,7 @@ m68k_emit_movem (rtx base, HOST_WIDE_INT offset, { int i; rtx body, addr, src, operands[2]; - enum machine_mode mode; + machine_mode mode; body = gen_rtx_PARALLEL (VOIDmode, rtvec_alloc (adjust_stack_p + count)); mode = reg_raw_mode[regno]; @@ -1326,7 +1326,7 @@ m68k_expand_epilogue (bool sibcall_p) It also rejects some comparisons when CC_NO_OVERFLOW is set. */ int -valid_dbcc_comparison_p_2 (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED) +valid_dbcc_comparison_p_2 (rtx x, machine_mode mode ATTRIBUTE_UNUSED) { switch (GET_CODE (x)) { @@ -1425,7 +1425,7 @@ m68k_ok_for_sibcall_p (tree decl, tree exp) static rtx m68k_function_arg (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1433,7 +1433,7 @@ m68k_function_arg (cumulative_args_t cum ATTRIBUTE_UNUSED, } static void -m68k_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +m68k_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1477,7 +1477,7 @@ m68k_legitimize_sibcall_address (rtx x) nothing needs to be done because REG can certainly go in an address reg. */ static rtx -m68k_legitimize_address (rtx x, rtx oldx, enum machine_mode mode) +m68k_legitimize_address (rtx x, rtx oldx, machine_mode mode) { if (m68k_tls_symbol_p (x)) return m68k_legitimize_tls_address (x); @@ -1906,7 +1906,7 @@ m68k_illegitimate_symbolic_constant_p (rtx x) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -m68k_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +m68k_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return m68k_illegitimate_symbolic_constant_p (x); } @@ -1961,7 +1961,7 @@ m68k_jump_table_ref_p (rtx x) is valid, describe its components in *ADDRESS. */ static bool -m68k_decompose_address (enum machine_mode mode, rtx x, +m68k_decompose_address (machine_mode mode, rtx x, bool strict_p, struct m68k_address *address) { unsigned int reach; @@ -2109,7 +2109,7 @@ m68k_decompose_address (enum machine_mode mode, rtx x, STRICT_P says whether strict checking is needed. */ bool -m68k_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) +m68k_legitimate_address_p (machine_mode mode, rtx x, bool strict_p) { struct m68k_address address; @@ -2131,7 +2131,7 @@ m68k_legitimate_mem_p (rtx x, struct m68k_address *address) /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ bool -m68k_legitimate_constant_p (enum machine_mode mode, rtx x) +m68k_legitimate_constant_p (machine_mode mode, rtx x) { return mode != XFmode && !m68k_illegitimate_symbolic_constant_p (x); } @@ -2435,7 +2435,7 @@ m68k_wrap_symbol_into_got_ref (rtx x, enum m68k_reloc reloc, rtx temp_reg) handled. */ rtx -legitimize_pic_address (rtx orig, enum machine_mode mode ATTRIBUTE_UNUSED, +legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED, rtx reg) { rtx pic_ref = orig; @@ -3568,7 +3568,7 @@ output_movsi (rtx operands[2]) /* Copy OP and change its mode to MODE. */ static rtx -copy_operand (rtx op, enum machine_mode mode) +copy_operand (rtx op, machine_mode mode) { /* ??? This looks really ugly. There must be a better way to change a mode on the operand. */ @@ -3619,7 +3619,7 @@ m68k_emit_move_double (rtx operands[2]) new rtx with the correct mode. */ static rtx -force_mode (enum machine_mode mode, rtx orig) +force_mode (machine_mode mode, rtx orig) { if (mode == GET_MODE (orig)) return orig; @@ -3631,7 +3631,7 @@ force_mode (enum machine_mode mode, rtx orig) } static int -fp_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +fp_reg_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) { return reg_renumber && FP_REG_P (op); } @@ -3647,7 +3647,7 @@ fp_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) of SCRATCH_REG in the proper mode. */ int -emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) +emit_move_sequence (rtx *operands, machine_mode mode, rtx scratch_reg) { register rtx operand0 = operands[0]; register rtx operand1 = operands[1]; @@ -4309,7 +4309,7 @@ init_68881_table (void) { int i; REAL_VALUE_TYPE r; - enum machine_mode mode; + machine_mode mode; mode = SFmode; for (i = 0; i < 7; i++) @@ -4804,7 +4804,7 @@ print_operand_address (FILE *file, rtx addr) clear insn. */ bool -strict_low_part_peephole_ok (enum machine_mode mode, rtx_insn *first_insn, +strict_low_part_peephole_ok (machine_mode mode, rtx_insn *first_insn, rtx target) { rtx_insn *p = first_insn; @@ -5167,7 +5167,7 @@ m68k_hard_regno_rename_ok (unsigned int old_reg ATTRIBUTE_UNUSED, restrict the 68881 registers to floating-point modes. */ bool -m68k_regno_mode_ok (int regno, enum machine_mode mode) +m68k_regno_mode_ok (int regno, machine_mode mode) { if (DATA_REGNO_P (regno)) { @@ -5196,7 +5196,7 @@ m68k_regno_mode_ok (int regno, enum machine_mode mode) enum reg_class m68k_secondary_reload_class (enum reg_class rclass, - enum machine_mode mode, rtx x) + machine_mode mode, rtx x) { int regno; @@ -5259,7 +5259,7 @@ m68k_preferred_reload_class (rtx x, enum reg_class rclass) If there is need for a hard-float ABI it is probably worth doing it properly and also passing function arguments in FP registers. */ rtx -m68k_libcall_value (enum machine_mode mode) +m68k_libcall_value (machine_mode mode) { switch (mode) { case SFmode: @@ -5281,7 +5281,7 @@ m68k_libcall_value (enum machine_mode mode) rtx m68k_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; mode = TYPE_MODE (valtype); switch (mode) { @@ -5324,7 +5324,7 @@ m68k_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED) static bool m68k_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) { - enum machine_mode mode = TYPE_MODE (type); + machine_mode mode = TYPE_MODE (type); if (mode == BLKmode) return true; @@ -5386,7 +5386,7 @@ enum attr_op_type /* Return type of memory ADDR_RTX refers to. */ static enum attr_op_type -sched_address_type (enum machine_mode mode, rtx addr_rtx) +sched_address_type (machine_mode mode, rtx addr_rtx) { struct m68k_address address; diff --git a/gcc/config/mcore/mcore-protos.h b/gcc/config/mcore/mcore-protos.h index 833668d..973b868 100644 --- a/gcc/config/mcore/mcore-protos.h +++ b/gcc/config/mcore/mcore-protos.h @@ -34,7 +34,7 @@ extern int mcore_naked_function_p (void); #ifdef TREE_CODE #ifdef HAVE_MACHINE_MODES -extern int mcore_num_arg_regs (enum machine_mode, const_tree); +extern int mcore_num_arg_regs (machine_mode, const_tree); #endif /* HAVE_MACHINE_MODES */ #ifdef RTX_CODE @@ -55,14 +55,14 @@ extern const char * mcore_output_andn (rtx, rtx *); extern bool mcore_gen_compare (RTX_CODE, rtx, rtx); extern int mcore_symbolic_address_p (rtx); extern bool mcore_r15_operand_p (rtx); -extern enum reg_class mcore_secondary_reload_class (enum reg_class, enum machine_mode, rtx); +extern enum reg_class mcore_secondary_reload_class (enum reg_class, machine_mode, rtx); extern enum reg_class mcore_reload_class (rtx, enum reg_class); extern int mcore_is_same_reg (rtx, rtx); extern int mcore_arith_S_operand (rtx); #ifdef HAVE_MACHINE_MODES -extern const char * mcore_output_move (rtx, rtx *, enum machine_mode); -extern const char * mcore_output_movedouble (rtx *, enum machine_mode); +extern const char * mcore_output_move (rtx, rtx *, machine_mode); +extern const char * mcore_output_movedouble (rtx *, machine_mode); extern int const_ok_for_mcore (HOST_WIDE_INT); #endif /* HAVE_MACHINE_MODES */ #endif /* RTX_CODE */ diff --git a/gcc/config/mcore/mcore.c b/gcc/config/mcore/mcore.c index 185f1ee..c2db334 100644 --- a/gcc/config/mcore/mcore.c +++ b/gcc/config/mcore/mcore.c @@ -112,15 +112,15 @@ cond_type; static void output_stack_adjust (int, int); static int calc_live_regs (int *); static int try_constant_tricks (HOST_WIDE_INT, HOST_WIDE_INT *, HOST_WIDE_INT *); -static const char * output_inline_const (enum machine_mode, rtx *); +static const char * output_inline_const (machine_mode, rtx *); static void layout_mcore_frame (struct mcore_frame *); -static void mcore_setup_incoming_varargs (cumulative_args_t, enum machine_mode, tree, int *, int); +static void mcore_setup_incoming_varargs (cumulative_args_t, machine_mode, tree, int *, int); static cond_type is_cond_candidate (rtx); static rtx_insn *emit_new_cond_insn (rtx, int); static rtx_insn *conditionalize_block (rtx_insn *); static void conditionalize_optimization (void); static void mcore_reorg (void); -static rtx handle_structs_in_regs (enum machine_mode, const_tree, int); +static rtx handle_structs_in_regs (machine_mode, const_tree, int); static void mcore_mark_dllexport (tree); static void mcore_mark_dllimport (tree); static int mcore_dllexport_p (tree); @@ -144,21 +144,21 @@ static bool mcore_rtx_costs (rtx, int, int, int, static void mcore_external_libcall (rtx); static bool mcore_return_in_memory (const_tree, const_tree); static int mcore_arg_partial_bytes (cumulative_args_t, - enum machine_mode, + machine_mode, tree, bool); static rtx mcore_function_arg (cumulative_args_t, - enum machine_mode, + machine_mode, const_tree, bool); static void mcore_function_arg_advance (cumulative_args_t, - enum machine_mode, + machine_mode, const_tree, bool); -static unsigned int mcore_function_arg_boundary (enum machine_mode, +static unsigned int mcore_function_arg_boundary (machine_mode, const_tree); static void mcore_asm_trampoline_template (FILE *); static void mcore_trampoline_init (rtx, tree, rtx); static bool mcore_warn_func_return (tree); static void mcore_option_override (void); -static bool mcore_legitimate_constant_p (enum machine_mode, rtx); +static bool mcore_legitimate_constant_p (machine_mode, rtx); /* MCore specific attributes. */ @@ -1170,7 +1170,7 @@ mcore_output_andn (rtx insn ATTRIBUTE_UNUSED, rtx operands[]) /* Output an inline constant. */ static const char * -output_inline_const (enum machine_mode mode, rtx operands[]) +output_inline_const (machine_mode mode, rtx operands[]) { HOST_WIDE_INT x = 0, y = 0; int trick_no; @@ -1270,7 +1270,7 @@ output_inline_const (enum machine_mode mode, rtx operands[]) const char * mcore_output_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[], - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { rtx dst = operands[0]; rtx src = operands[1]; @@ -1340,7 +1340,7 @@ mcore_output_move (rtx insn ATTRIBUTE_UNUSED, rtx operands[], to take care when we see overlapping source and dest registers. */ const char * -mcore_output_movedouble (rtx operands[], enum machine_mode mode ATTRIBUTE_UNUSED) +mcore_output_movedouble (rtx operands[], machine_mode mode ATTRIBUTE_UNUSED) { rtx dst = operands[0]; rtx src = operands[1]; @@ -1562,7 +1562,7 @@ mcore_expand_insv (rtx operands[]) known constants. DEST and SRC are registers. OFFSET is the known starting point for the output pattern. */ -static const enum machine_mode mode_from_align[] = +static const machine_mode mode_from_align[] = { VOIDmode, QImode, HImode, VOIDmode, SImode, }; @@ -1571,7 +1571,7 @@ static void block_move_sequence (rtx dst_mem, rtx src_mem, int size, int align) { rtx temp[2]; - enum machine_mode mode[2]; + machine_mode mode[2]; int amount[2]; bool active[2]; int phase = 0; @@ -1935,7 +1935,7 @@ mcore_initial_elimination_offset (int from, int to) static void mcore_setup_incoming_varargs (cumulative_args_t args_so_far_v, - enum machine_mode mode, tree type, + machine_mode mode, tree type, int * ptr_pretend_size ATTRIBUTE_UNUSED, int second_time ATTRIBUTE_UNUSED) { @@ -2645,7 +2645,7 @@ mcore_r15_operand_p (rtx x) enum reg_class mcore_secondary_reload_class (enum reg_class rclass, - enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) + machine_mode mode ATTRIBUTE_UNUSED, rtx x) { if (TEST_HARD_REG_BIT (reg_class_contents[rclass], 15) && !mcore_r15_operand_p (x)) @@ -2701,7 +2701,7 @@ mcore_option_override (void) hold a function argument of mode MODE and type TYPE. */ int -mcore_num_arg_regs (enum machine_mode mode, const_tree type) +mcore_num_arg_regs (machine_mode mode, const_tree type) { int size; @@ -2717,7 +2717,7 @@ mcore_num_arg_regs (enum machine_mode mode, const_tree type) } static rtx -handle_structs_in_regs (enum machine_mode mode, const_tree type, int reg) +handle_structs_in_regs (machine_mode mode, const_tree type, int reg) { int size; @@ -2763,7 +2763,7 @@ handle_structs_in_regs (enum machine_mode mode, const_tree type, int reg) rtx mcore_function_value (const_tree valtype, const_tree func) { - enum machine_mode mode; + machine_mode mode; int unsigned_p; mode = TYPE_MODE (valtype); @@ -2793,7 +2793,7 @@ mcore_function_value (const_tree valtype, const_tree func) its data type forbids. */ static rtx -mcore_function_arg (cumulative_args_t cum, enum machine_mode mode, +mcore_function_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { int arg_reg; @@ -2813,7 +2813,7 @@ mcore_function_arg (cumulative_args_t cum, enum machine_mode mode, } static void -mcore_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +mcore_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -2823,7 +2823,7 @@ mcore_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, } static unsigned int -mcore_function_arg_boundary (enum machine_mode mode, +mcore_function_arg_boundary (machine_mode mode, const_tree type ATTRIBUTE_UNUSED) { /* Doubles must be aligned to an 8 byte boundary. */ @@ -2840,7 +2840,7 @@ mcore_function_arg_boundary (enum machine_mode mode, the function. */ static int -mcore_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode, +mcore_arg_partial_bytes (cumulative_args_t cum, machine_mode mode, tree type, bool named) { int reg = ROUND_REG (*get_cumulative_args (cum), mode); @@ -3193,7 +3193,7 @@ mcore_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) On the MCore, allow anything but a double. */ static bool -mcore_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +mcore_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return GET_CODE (x) != CONST_DOUBLE; } diff --git a/gcc/config/mcore/mcore.md b/gcc/config/mcore/mcore.md index 5b49136..4b7e665 100644 --- a/gcc/config/mcore/mcore.md +++ b/gcc/config/mcore/mcore.md @@ -2769,7 +2769,7 @@ "* { int ofs; - enum machine_mode mode; + machine_mode mode; rtx base_reg = XEXP (operands[4], 0); if ((ofs = mcore_byte_offset (INTVAL (operands[3]))) > -1) diff --git a/gcc/config/mep/mep-protos.h b/gcc/config/mep/mep-protos.h index 345db04..17afd86 100644 --- a/gcc/config/mep/mep-protos.h +++ b/gcc/config/mep/mep-protos.h @@ -28,14 +28,14 @@ extern bool mep_split_mov (rtx *, int); extern bool mep_vliw_mode_match (rtx); extern bool mep_vliw_jmp_match (rtx); extern bool mep_multi_slot (rtx_insn *); -extern bool mep_legitimate_address (enum machine_mode, rtx, int); -extern int mep_legitimize_address (rtx *, rtx, enum machine_mode); -extern int mep_legitimize_reload_address (rtx *, enum machine_mode, int, /*enum reload_type*/ int, int); +extern bool mep_legitimate_address (machine_mode, rtx, int); +extern int mep_legitimize_address (rtx *, rtx, machine_mode); +extern int mep_legitimize_reload_address (rtx *, machine_mode, int, /*enum reload_type*/ int, int); extern int mep_core_address_length (rtx_insn *, int); extern int mep_cop_address_length (rtx_insn *, int); -extern bool mep_expand_mov (rtx *, enum machine_mode); -extern bool mep_mov_ok (rtx *, enum machine_mode); -extern void mep_split_wide_move (rtx *, enum machine_mode); +extern bool mep_expand_mov (rtx *, machine_mode); +extern bool mep_mov_ok (rtx *, machine_mode); +extern void mep_split_wide_move (rtx *, machine_mode); #ifdef RTX_CODE extern bool mep_expand_setcc (rtx *); extern rtx mep_expand_cbranch (rtx *); @@ -43,13 +43,13 @@ extern rtx mep_expand_cbranch (rtx *); extern const char *mep_emit_cbranch (rtx *, int); extern void mep_expand_call (rtx *, int); extern rtx mep_find_base_term (rtx); -extern enum reg_class mep_secondary_input_reload_class (enum reg_class, enum machine_mode, rtx); -extern enum reg_class mep_secondary_output_reload_class (enum reg_class, enum machine_mode, rtx); +extern enum reg_class mep_secondary_input_reload_class (enum reg_class, machine_mode, rtx); +extern enum reg_class mep_secondary_output_reload_class (enum reg_class, machine_mode, rtx); extern bool mep_secondary_memory_needed (enum reg_class, enum reg_class, - enum machine_mode); -extern void mep_expand_reload (rtx *, enum machine_mode); + machine_mode); +extern void mep_expand_reload (rtx *, machine_mode); extern enum reg_class mep_preferred_reload_class (rtx, enum reg_class); -extern int mep_register_move_cost (enum machine_mode, enum reg_class, enum reg_class); +extern int mep_register_move_cost (machine_mode, enum reg_class, enum reg_class); extern void mep_init_expanders (void); extern rtx mep_return_addr_rtx (int); extern bool mep_epilogue_uses (int); @@ -69,7 +69,7 @@ extern void mep_final_prescan_insn (rtx_insn *, rtx *, int); extern void mep_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); extern bool mep_return_in_memory (const_tree, const_tree); extern rtx mep_function_value (const_tree, const_tree); -extern rtx mep_libcall_value (enum machine_mode); +extern rtx mep_libcall_value (machine_mode); extern void mep_asm_output_opcode (FILE *, const char *); extern void mep_note_pragma_disinterrupt (const char *); extern void mep_note_pragma_call (const char *); @@ -93,7 +93,7 @@ extern bool mep_lookup_pragma_call (const char *); extern bool mep_have_core_copro_moves_p; extern bool mep_have_copro_copro_moves_p; -extern bool mep_cannot_change_mode_class (enum machine_mode, enum machine_mode, +extern bool mep_cannot_change_mode_class (machine_mode, machine_mode, enum reg_class); /* These are called from mep-pragmas (front end) and then call into @@ -104,25 +104,25 @@ extern void mep_reinit_regs (void); extern void mep_init_regs (void); -extern int cgen_h_uint_6a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_7a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_8a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_6a2_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_22a4_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_2a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_24a1_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_6a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_5a4_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_2a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_16a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_3a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_5a1_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_16a1_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_8a1_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_7a2_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_6a4_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_5a8_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_4a1_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_10a1_immediate (rtx, enum machine_mode); -extern int cgen_h_sint_12a1_immediate (rtx, enum machine_mode); -extern int cgen_h_uint_20a1_immediate (rtx, enum machine_mode); +extern int cgen_h_uint_6a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_7a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_8a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_6a2_immediate (rtx, machine_mode); +extern int cgen_h_uint_22a4_immediate (rtx, machine_mode); +extern int cgen_h_sint_2a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_24a1_immediate (rtx, machine_mode); +extern int cgen_h_sint_6a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_5a4_immediate (rtx, machine_mode); +extern int cgen_h_uint_2a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_16a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_3a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_5a1_immediate (rtx, machine_mode); +extern int cgen_h_sint_16a1_immediate (rtx, machine_mode); +extern int cgen_h_sint_8a1_immediate (rtx, machine_mode); +extern int cgen_h_sint_7a2_immediate (rtx, machine_mode); +extern int cgen_h_sint_6a4_immediate (rtx, machine_mode); +extern int cgen_h_sint_5a8_immediate (rtx, machine_mode); +extern int cgen_h_uint_4a1_immediate (rtx, machine_mode); +extern int cgen_h_sint_10a1_immediate (rtx, machine_mode); +extern int cgen_h_sint_12a1_immediate (rtx, machine_mode); +extern int cgen_h_uint_20a1_immediate (rtx, machine_mode); diff --git a/gcc/config/mep/mep.c b/gcc/config/mep/mep.c index 5d6b07a..46a451c 100644 --- a/gcc/config/mep/mep.c +++ b/gcc/config/mep/mep.c @@ -170,7 +170,7 @@ static void mep_rewrite_mult (rtx_insn *, rtx); static void mep_rewrite_mulsi3 (rtx_insn *, rtx, rtx, rtx); static void mep_rewrite_maddsi3 (rtx_insn *, rtx, rtx, rtx, rtx); static bool mep_reuse_lo_p_1 (rtx, rtx, rtx_insn *, bool); -static bool move_needs_splitting (rtx, rtx, enum machine_mode); +static bool move_needs_splitting (rtx, rtx, machine_mode); static bool mep_expand_setcc_1 (enum rtx_code, rtx, rtx, rtx); static bool mep_nongeneral_reg (rtx); static bool mep_general_copro_reg (rtx); @@ -192,7 +192,7 @@ static void mep_start_function (FILE *, HOST_WIDE_INT); static bool mep_function_ok_for_sibcall (tree, tree); static int unique_bit_in (HOST_WIDE_INT); static int bit_size_for_clip (HOST_WIDE_INT); -static int bytesize (const_tree, enum machine_mode); +static int bytesize (const_tree, machine_mode); static tree mep_validate_based_tiny (tree *, tree, tree, int, bool *); static tree mep_validate_near_far (tree *, tree, tree, int, bool *); static tree mep_validate_disinterrupt (tree *, tree, tree, int, bool *); @@ -226,11 +226,11 @@ static void mep_init_builtins (void); static void mep_intrinsic_unavailable (int); static bool mep_get_intrinsic_insn (int, const struct cgen_insn **); static bool mep_get_move_insn (int, const struct cgen_insn **); -static rtx mep_convert_arg (enum machine_mode, rtx); +static rtx mep_convert_arg (machine_mode, rtx); static rtx mep_convert_regnum (const struct cgen_regnum_operand *, rtx); static rtx mep_legitimize_arg (const struct insn_operand_data *, rtx, int); static void mep_incompatible_arg (const struct insn_operand_data *, rtx, int, tree); -static rtx mep_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx mep_expand_builtin (tree, rtx, rtx, machine_mode, int); static int mep_adjust_cost (rtx_insn *, rtx, rtx_insn *, int); static int mep_issue_rate (void); static rtx_insn *mep_find_ready_insn (rtx_insn **, int, enum attr_slot, int); @@ -239,16 +239,16 @@ static int mep_sched_reorder (FILE *, int, rtx_insn **, int *, int); static rtx_insn *mep_make_bundle (rtx, rtx_insn *); static void mep_bundle_insns (rtx_insn *); static bool mep_rtx_cost (rtx, int, int, int, int *, bool); -static int mep_address_cost (rtx, enum machine_mode, addr_space_t, bool); -static void mep_setup_incoming_varargs (cumulative_args_t, enum machine_mode, +static int mep_address_cost (rtx, machine_mode, addr_space_t, bool); +static void mep_setup_incoming_varargs (cumulative_args_t, machine_mode, tree, int *, int); -static bool mep_pass_by_reference (cumulative_args_t cum, enum machine_mode, +static bool mep_pass_by_reference (cumulative_args_t cum, machine_mode, const_tree, bool); -static rtx mep_function_arg (cumulative_args_t, enum machine_mode, +static rtx mep_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static void mep_function_arg_advance (cumulative_args_t, enum machine_mode, +static void mep_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static bool mep_vector_mode_supported_p (enum machine_mode); +static bool mep_vector_mode_supported_p (machine_mode); static rtx mep_allocate_initial_value (rtx); static void mep_asm_init_sections (void); static int mep_comp_type_attributes (const_tree, const_tree); @@ -810,7 +810,7 @@ mep_use_post_modify_for_set_p (rtx set, rtx gpr, rtx offset) { rtx *reg, *mem; unsigned int reg_bytes, mem_bytes; - enum machine_mode reg_mode, mem_mode; + machine_mode reg_mode, mem_mode; /* Only simple SETs can be converted. */ if (GET_CODE (set) != SET) @@ -993,7 +993,7 @@ mep_bit_position_p (rtx x, bool looking_for) static bool move_needs_splitting (rtx dest, rtx src, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { int s = mep_section_tag (src); @@ -1082,7 +1082,7 @@ mep_multi_slot (rtx_insn *x) /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ static bool -mep_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +mep_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { /* We can't convert symbol values to gp- or tp-rel values after reload, as reload might have used $gp or $tp for other @@ -1099,7 +1099,7 @@ mep_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) strict, and another way for not-strict, like REG_OK_FOR_BASE_P. */ bool -mep_legitimate_address (enum machine_mode mode, rtx x, int strict) +mep_legitimate_address (machine_mode mode, rtx x, int strict) { int the_tag; @@ -1207,7 +1207,7 @@ mep_legitimate_address (enum machine_mode mode, rtx x, int strict) } int -mep_legitimize_reload_address (rtx *x, enum machine_mode mode, int opnum, +mep_legitimize_reload_address (rtx *x, machine_mode mode, int opnum, int type_i, int ind_levels ATTRIBUTE_UNUSED) { @@ -1314,7 +1314,7 @@ mep_cop_address_length (rtx_insn *insn, int opn) #define DEBUG_EXPAND_MOV 0 bool -mep_expand_mov (rtx *operands, enum machine_mode mode) +mep_expand_mov (rtx *operands, machine_mode mode) { int i, t; int tag[2]; @@ -1508,7 +1508,7 @@ mep_expand_mov (rtx *operands, enum machine_mode mode) /* Cases where the pattern can't be made to use at all. */ bool -mep_mov_ok (rtx *operands, enum machine_mode mode ATTRIBUTE_UNUSED) +mep_mov_ok (rtx *operands, machine_mode mode ATTRIBUTE_UNUSED) { int i; @@ -1574,7 +1574,7 @@ mep_mov_ok (rtx *operands, enum machine_mode mode ATTRIBUTE_UNUSED) #define DEBUG_SPLIT_WIDE_MOVE 0 void -mep_split_wide_move (rtx *operands, enum machine_mode mode) +mep_split_wide_move (rtx *operands, machine_mode mode) { int i; @@ -1942,7 +1942,7 @@ mep_find_base_term (rtx x) modes FROM to TO. */ bool -mep_cannot_change_mode_class (enum machine_mode from, enum machine_mode to, +mep_cannot_change_mode_class (machine_mode from, machine_mode to, enum reg_class regclass) { if (from == to) @@ -2039,7 +2039,7 @@ mep_secondary_copro_reload_class (enum reg_class rclass, rtx x) enum reg_class mep_secondary_input_reload_class (enum reg_class rclass, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, rtx x) { int rv = NO_REGS; @@ -2065,7 +2065,7 @@ mep_secondary_input_reload_class (enum reg_class rclass, enum reg_class mep_secondary_output_reload_class (enum reg_class rclass, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, rtx x) { int rv = NO_REGS; @@ -2092,7 +2092,7 @@ mep_secondary_output_reload_class (enum reg_class rclass, bool mep_secondary_memory_needed (enum reg_class rclass1, enum reg_class rclass2, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (!mep_have_core_copro_moves_p) { @@ -2111,7 +2111,7 @@ mep_secondary_memory_needed (enum reg_class rclass1, enum reg_class rclass2, } void -mep_expand_reload (rtx *operands, enum machine_mode mode) +mep_expand_reload (rtx *operands, machine_mode mode) { /* There are three cases for each direction: register, farsym @@ -2198,7 +2198,7 @@ mep_preferred_reload_class (rtx x, enum reg_class rclass) that requires a temporary register or temporary stack slot. */ int -mep_register_move_cost (enum machine_mode mode, enum reg_class from, enum reg_class to) +mep_register_move_cost (machine_mode mode, enum reg_class from, enum reg_class to) { if (mep_have_copro_copro_moves_p && reg_class_subset_p (from, CR_REGS) @@ -2727,7 +2727,7 @@ mep_expand_prologue (void) { rtx mem; bool maybe_dead_p; - enum machine_mode rmode; + machine_mode rmode; rss = cfun->machine->reg_save_slot[i]; @@ -2967,7 +2967,7 @@ mep_expand_epilogue (void) for (i=FIRST_PSEUDO_REGISTER-1; i>=1; i--) if (mep_call_saves_register (i)) { - enum machine_mode rmode; + machine_mode rmode; int rss = cfun->machine->reg_save_slot[i]; if (mep_reg_size (i) == 8) @@ -3401,7 +3401,7 @@ mep_final_prescan_insn (rtx_insn *insn, rtx *operands ATTRIBUTE_UNUSED, static void mep_setup_incoming_varargs (cumulative_args_t cum, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, tree type ATTRIBUTE_UNUSED, int *pretend_size, int second_time ATTRIBUTE_UNUSED) { @@ -3413,7 +3413,7 @@ mep_setup_incoming_varargs (cumulative_args_t cum, } static int -bytesize (const_tree type, enum machine_mode mode) +bytesize (const_tree type, machine_mode mode) { if (mode == BLKmode) return int_size_in_bytes (type); @@ -3669,7 +3669,7 @@ mep_init_cumulative_args (CUMULATIVE_ARGS *pcum, tree fntype, first arg. For varargs, we copy $1..$4 to the stack. */ static rtx -mep_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +mep_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -3696,7 +3696,7 @@ mep_function_arg (cumulative_args_t cum_v, enum machine_mode mode, static bool mep_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { @@ -3719,7 +3719,7 @@ mep_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, static void mep_function_arg_advance (cumulative_args_t pcum, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -3755,7 +3755,7 @@ mep_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED) /* Implement LIBCALL_VALUE, using the same rules as mep_function_value. */ rtx -mep_libcall_value (enum machine_mode mode) +mep_libcall_value (machine_mode mode) { return gen_rtx_REG (mode, RETURN_VALUE_REGNUM); } @@ -6069,7 +6069,7 @@ mep_get_move_insn (int intrinsic, const struct cgen_insn **cgen_insn) to MODE using a subreg. Otherwise return ARG as-is. */ static rtx -mep_convert_arg (enum machine_mode mode, rtx arg) +mep_convert_arg (machine_mode mode, rtx arg) { if (GET_MODE (arg) != mode && register_operand (arg, VOIDmode) @@ -6190,7 +6190,7 @@ mep_incompatible_arg (const struct insn_operand_data *operand, rtx arg, static rtx mep_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { rtx pat, op[10], arg[10]; @@ -6287,7 +6287,7 @@ mep_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, if (cgen_insn->regnums[a].reference_p) { tree pointed_to = TREE_TYPE (TREE_TYPE (value)); - enum machine_mode pointed_mode = TYPE_MODE (pointed_to); + machine_mode pointed_mode = TYPE_MODE (pointed_to); arg[a] = gen_rtx_MEM (pointed_mode, arg[a]); } @@ -6368,7 +6368,7 @@ mep_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, } static bool -mep_vector_mode_supported_p (enum machine_mode mode ATTRIBUTE_UNUSED) +mep_vector_mode_supported_p (machine_mode mode ATTRIBUTE_UNUSED) { return false; } @@ -7163,7 +7163,7 @@ mep_rtx_cost (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, static int mep_address_cost (rtx addr ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool ATTRIBUTE_UNUSED speed_p) { diff --git a/gcc/config/microblaze/microblaze-protos.h b/gcc/config/microblaze/microblaze-protos.h index f3cc099..cbd2422 100644 --- a/gcc/config/microblaze/microblaze-protos.h +++ b/gcc/config/microblaze/microblaze-protos.h @@ -29,22 +29,22 @@ extern void microblaze_expand_prologue (void); extern void microblaze_expand_epilogue (void); extern void override_options (void); extern int microblaze_expand_shift (rtx *); -extern bool microblaze_expand_move (enum machine_mode, rtx *); +extern bool microblaze_expand_move (machine_mode, rtx *); extern bool microblaze_expand_block_move (rtx, rtx, rtx, rtx); extern void microblaze_expand_divide (rtx *); -extern void microblaze_expand_conditional_branch (enum machine_mode, rtx *); +extern void microblaze_expand_conditional_branch (machine_mode, rtx *); extern void microblaze_expand_conditional_branch_sf (rtx *); extern int microblaze_can_use_return_insn (void); extern void print_operand (FILE *, rtx, int); extern void print_operand_address (FILE *, rtx); extern void init_cumulative_args (CUMULATIVE_ARGS *,tree, rtx); -extern bool microblaze_legitimate_address_p (enum machine_mode, rtx, bool); +extern bool microblaze_legitimate_address_p (machine_mode, rtx, bool); extern int microblaze_is_interrupt_variant (void); extern int microblaze_is_break_handler (void); extern int microblaze_break_function_p (tree func); extern rtx microblaze_return_addr (int, rtx); -extern int simple_memory_operand (rtx, enum machine_mode); -extern int double_memory_operand (rtx, enum machine_mode); +extern int simple_memory_operand (rtx, machine_mode); +extern int double_memory_operand (rtx, machine_mode); extern void microblaze_order_regs_for_local_alloc (void); extern int microblaze_regno_ok_for_base_p (int, int); extern HOST_WIDE_INT microblaze_initial_elimination_offset (int, int); @@ -55,7 +55,7 @@ extern int microblaze_legitimate_pic_operand (rtx); extern bool microblaze_tls_referenced_p (rtx); extern int symbol_mentioned_p (rtx); extern int label_mentioned_p (rtx); -extern bool microblaze_cannot_force_const_mem (enum machine_mode, rtx); +extern bool microblaze_cannot_force_const_mem (machine_mode, rtx); #endif /* RTX_CODE */ /* Declare functions in microblaze-c.c. */ diff --git a/gcc/config/microblaze/microblaze.c b/gcc/config/microblaze/microblaze.c index f9fc6d2..48ebf86 100644 --- a/gcc/config/microblaze/microblaze.c +++ b/gcc/config/microblaze/microblaze.c @@ -261,7 +261,7 @@ section *sdata2_section; /* Return truth value if a CONST_DOUBLE is ok to be a legitimate constant. */ static bool -microblaze_const_double_ok (rtx op, enum machine_mode mode) +microblaze_const_double_ok (rtx op, machine_mode mode) { REAL_VALUE_TYPE d; @@ -303,7 +303,7 @@ microblaze_const_double_ok (rtx op, enum machine_mode mode) (ie, register + small offset) or (register + register). */ int -simple_memory_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +simple_memory_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) { rtx addr, plus0, plus1; @@ -364,7 +364,7 @@ simple_memory_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) a doubleword. */ int -double_memory_operand (rtx op, enum machine_mode mode) +double_memory_operand (rtx op, machine_mode mode) { rtx addr; @@ -423,7 +423,7 @@ microblaze_regno_ok_for_base_p (int regno, int strict) static bool microblaze_valid_base_register_p (rtx x, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int strict) { if (!strict && GET_CODE (x) == SUBREG) @@ -480,7 +480,7 @@ microblaze_tls_referenced_p (rtx x) } bool -microblaze_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +microblaze_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return microblaze_tls_referenced_p(x); } @@ -683,7 +683,7 @@ microblaze_classify_unspec (struct microblaze_address_info *info, rtx x) static bool microblaze_valid_index_register_p (rtx x, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int strict) { if (!strict && GET_CODE (x) == SUBREG) @@ -744,7 +744,7 @@ get_base_reg (rtx x) static bool microblaze_classify_address (struct microblaze_address_info *info, rtx x, - enum machine_mode mode, int strict) + machine_mode mode, int strict) { rtx xplus0; rtx xplus1; @@ -906,7 +906,7 @@ microblaze_classify_address (struct microblaze_address_info *info, rtx x, is called during reload. */ bool -microblaze_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +microblaze_legitimate_address_p (machine_mode mode, rtx x, bool strict) { struct microblaze_address_info addr; @@ -967,7 +967,7 @@ microblaze_legitimate_pic_operand (rtx x) static rtx microblaze_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { register rtx xinsn = x, result; @@ -1101,7 +1101,7 @@ microblaze_block_move_straight (rtx dest, rtx src, HOST_WIDE_INT length) HOST_WIDE_INT offset, delta; unsigned HOST_WIDE_INT bits; int i; - enum machine_mode mode; + machine_mode mode; rtx *regs; bits = BITS_PER_WORD; @@ -1244,7 +1244,7 @@ microblaze_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, int opno ATTRIBUTE_UNUSED, int *total, bool speed ATTRIBUTE_UNUSED) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); switch (code) { @@ -1388,7 +1388,7 @@ microblaze_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, of mode MODE at X. Return 0 if X isn't valid for MODE. */ static int -microblaze_address_insns (rtx x, enum machine_mode mode) +microblaze_address_insns (rtx x, machine_mode mode) { struct microblaze_address_info addr; @@ -1433,7 +1433,7 @@ microblaze_address_insns (rtx x, enum machine_mode mode) /* Provide the costs of an addressing mode that contains ADDR. If ADDR is not a valid address, its cost is irrelevant. */ static int -microblaze_address_cost (rtx addr, enum machine_mode mode ATTRIBUTE_UNUSED, +microblaze_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -1491,7 +1491,7 @@ init_cumulative_args (CUMULATIVE_ARGS * cum, tree fntype, static void microblaze_function_arg_advance (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1548,7 +1548,7 @@ microblaze_function_arg_advance (cumulative_args_t cum_v, or 0 if the argument is to be passed on the stack. */ static rtx -microblaze_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +microblaze_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1592,7 +1592,7 @@ microblaze_function_arg (cumulative_args_t cum_v, enum machine_mode mode, if (mode == VOIDmode) { if (cum->num_adjusts > 0) - ret = gen_rtx_PARALLEL ((enum machine_mode) cum->fp_code, + ret = gen_rtx_PARALLEL ((machine_mode) cum->fp_code, gen_rtvec_v (cum->num_adjusts, cum->adjust)); } @@ -1601,7 +1601,7 @@ microblaze_function_arg (cumulative_args_t cum_v, enum machine_mode mode, /* Return number of bytes of argument to put in registers. */ static int -function_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +function_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1694,7 +1694,7 @@ microblaze_option_override (void) { register int i, start; register int regno; - register enum machine_mode mode; + register machine_mode mode; int ver; microblaze_section_threshold = (global_options_set.x_g_switch_value @@ -1842,7 +1842,7 @@ microblaze_option_override (void) /* Set up array giving whether a given register can hold a given mode. */ for (mode = VOIDmode; - mode != MAX_MACHINE_MODE; mode = (enum machine_mode) ((int) mode + 1)) + mode != MAX_MACHINE_MODE; mode = (machine_mode) ((int) mode + 1)) { register int size = GET_MODE_SIZE (mode); @@ -2816,7 +2816,7 @@ microblaze_expand_prologue (void) for (cur_arg = fnargs; cur_arg != 0; cur_arg = next_arg) { tree passed_type = DECL_ARG_TYPE (cur_arg); - enum machine_mode passed_mode = TYPE_MODE (passed_type); + machine_mode passed_mode = TYPE_MODE (passed_type); rtx entry_parm; if (TREE_ADDRESSABLE (passed_type)) @@ -3082,7 +3082,7 @@ microblaze_can_use_return_insn (void) static reg_class_t microblaze_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED, - reg_class_t rclass, enum machine_mode mode ATTRIBUTE_UNUSED, + reg_class_t rclass, machine_mode mode ATTRIBUTE_UNUSED, secondary_reload_info *sri ATTRIBUTE_UNUSED) { if (rclass == ST_REGS) @@ -3171,7 +3171,7 @@ microblaze_encode_section_info (tree decl, rtx rtl, int first) } static rtx -expand_pic_symbol_ref (enum machine_mode mode ATTRIBUTE_UNUSED, rtx op) +expand_pic_symbol_ref (machine_mode mode ATTRIBUTE_UNUSED, rtx op) { rtx result; result = gen_rtx_UNSPEC (Pmode, gen_rtvec (1, op), UNSPEC_GOTOFF); @@ -3250,7 +3250,7 @@ microblaze_asm_output_mi_thunk (FILE *file, tree thunk_fndecl ATTRIBUTE_UNUSED, } bool -microblaze_expand_move (enum machine_mode mode, rtx operands[]) +microblaze_expand_move (machine_mode mode, rtx operands[]) { rtx op0, op1; @@ -3423,7 +3423,7 @@ microblaze_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) second, generate correct branch instruction. */ void -microblaze_expand_conditional_branch (enum machine_mode mode, rtx operands[]) +microblaze_expand_conditional_branch (machine_mode mode, rtx operands[]) { enum rtx_code code = GET_CODE (operands[0]); rtx cmp_op0 = operands[1]; @@ -3558,7 +3558,7 @@ microblaze_adjust_cost (rtx_insn *insn ATTRIBUTE_UNUSED, rtx link, At present, GAS doesn't understand li.[sd], so don't allow it to be generated at present. */ static bool -microblaze_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +microblaze_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { if (microblaze_cannot_force_const_mem(mode, x)) diff --git a/gcc/config/mips/mips-protos.h b/gcc/config/mips/mips-protos.h index ba4a850..db93913 100644 --- a/gcc/config/mips/mips-protos.h +++ b/gcc/config/mips/mips-protos.h @@ -192,9 +192,9 @@ enum mips_split_type { extern bool mips_symbolic_constant_p (rtx, enum mips_symbol_context, enum mips_symbol_type *); -extern int mips_regno_mode_ok_for_base_p (int, enum machine_mode, bool); -extern bool mips_stack_address_p (rtx, enum machine_mode); -extern int mips_address_insns (rtx, enum machine_mode, bool); +extern int mips_regno_mode_ok_for_base_p (int, machine_mode, bool); +extern bool mips_stack_address_p (rtx, machine_mode); +extern int mips_address_insns (rtx, machine_mode, bool); extern int mips_const_insns (rtx); extern int mips_split_const_insns (rtx); extern int mips_load_store_insns (rtx, rtx_insn *); @@ -205,11 +205,11 @@ extern void mips_emit_binary (enum rtx_code, rtx, rtx, rtx); #endif extern rtx mips_pic_base_register (rtx); extern rtx mips_got_load (rtx, rtx, enum mips_symbol_type); -extern bool mips_split_symbol (rtx, rtx, enum machine_mode, rtx *); +extern bool mips_split_symbol (rtx, rtx, machine_mode, rtx *); extern rtx mips_unspec_address (rtx, enum mips_symbol_type); extern rtx mips_strip_unspec_address (rtx); extern void mips_move_integer (rtx, rtx, unsigned HOST_WIDE_INT); -extern bool mips_legitimize_move (enum machine_mode, rtx, rtx); +extern bool mips_legitimize_move (machine_mode, rtx, rtx); extern rtx mips_subword (rtx, bool); extern bool mips_split_move_p (rtx, rtx, enum mips_split_type); @@ -240,14 +240,14 @@ extern bool mips_expand_block_move (rtx, rtx, rtx); extern void mips_expand_synci_loop (rtx, rtx); extern void mips_init_cumulative_args (CUMULATIVE_ARGS *, tree); -extern bool mips_pad_arg_upward (enum machine_mode, const_tree); -extern bool mips_pad_reg_upward (enum machine_mode, tree); +extern bool mips_pad_arg_upward (machine_mode, const_tree); +extern bool mips_pad_reg_upward (machine_mode, tree); extern bool mips_expand_ext_as_unaligned_load (rtx, rtx, HOST_WIDE_INT, HOST_WIDE_INT, bool); extern bool mips_expand_ins_as_unaligned_store (rtx, rtx, HOST_WIDE_INT, HOST_WIDE_INT); -extern bool mips_mem_fits_mode_p (enum machine_mode mode, rtx x); +extern bool mips_mem_fits_mode_p (machine_mode mode, rtx x); extern HOST_WIDE_INT mips_debugger_offset (rtx, HOST_WIDE_INT); extern void mips_push_asm_switch (struct mips_asm_switch *); @@ -278,14 +278,14 @@ extern void mips_expand_before_return (void); extern void mips_expand_epilogue (bool); extern bool mips_can_use_return_insn (void); -extern bool mips_cannot_change_mode_class (enum machine_mode, - enum machine_mode, enum reg_class); +extern bool mips_cannot_change_mode_class (machine_mode, + machine_mode, enum reg_class); extern bool mips_dangerous_for_la25_p (rtx); -extern bool mips_modes_tieable_p (enum machine_mode, enum machine_mode); +extern bool mips_modes_tieable_p (machine_mode, machine_mode); extern enum reg_class mips_secondary_reload_class (enum reg_class, - enum machine_mode, + machine_mode, rtx, bool); -extern int mips_class_max_nregs (enum reg_class, enum machine_mode); +extern int mips_class_max_nregs (enum reg_class, machine_mode); extern int mips_adjust_insn_length (rtx_insn *, int); extern void mips_output_load_label (rtx); @@ -298,7 +298,7 @@ extern const char *mips_output_sync_loop (rtx_insn *, rtx *); extern unsigned int mips_sync_loop_insns (rtx_insn *, rtx *); extern const char *mips_output_division (const char *, rtx *); extern const char *mips_output_probe_stack_range (rtx, rtx); -extern unsigned int mips_hard_regno_nregs (int, enum machine_mode); +extern unsigned int mips_hard_regno_nregs (int, machine_mode); extern bool mips_linked_madd_p (rtx_insn *, rtx_insn *); extern bool mips_store_data_bypass_p (rtx_insn *, rtx_insn *); extern int mips_dspalu_bypass_p (rtx, rtx); @@ -312,9 +312,9 @@ extern const char *mips16e_output_save_restore (rtx, HOST_WIDE_INT); extern bool mips16e_save_restore_pattern_p (rtx, HOST_WIDE_INT, struct mips16e_save_restore_info *); -extern bool mask_low_and_shift_p (enum machine_mode, rtx, rtx, int); -extern int mask_low_and_shift_len (enum machine_mode, rtx, rtx); -extern bool and_operands_ok (enum machine_mode, rtx, rtx); +extern bool mask_low_and_shift_p (machine_mode, rtx, rtx, int); +extern int mask_low_and_shift_len (machine_mode, rtx, rtx); +extern bool and_operands_ok (machine_mode, rtx, rtx); extern bool mips_fmadd_bypass (rtx_insn *, rtx_insn *); union mips_gen_fn_ptrs @@ -341,9 +341,9 @@ extern bool umips_save_restore_pattern_p (bool, rtx); extern bool umips_load_store_pair_p (bool, rtx *); extern void umips_output_load_store_pair (bool, rtx *); extern bool umips_movep_target_p (rtx, rtx); -extern bool umips_12bit_offset_address_p (rtx, enum machine_mode); -extern bool lwsp_swsp_address_p (rtx, enum machine_mode); -extern bool m16_based_address_p (rtx, enum machine_mode, +extern bool umips_12bit_offset_address_p (rtx, machine_mode); +extern bool lwsp_swsp_address_p (rtx, machine_mode); +extern bool m16_based_address_p (rtx, machine_mode, int (*)(rtx_def*, machine_mode)); extern rtx mips_expand_thread_pointer (rtx); extern void mips16_expand_get_fcsr (rtx); diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index 3c5ba86..3d9db92 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -1214,9 +1214,9 @@ static const struct mips_rtx_cost_data }; static rtx mips_find_pic_call_symbol (rtx_insn *, rtx, bool); -static int mips_register_move_cost (enum machine_mode, reg_class_t, +static int mips_register_move_cost (machine_mode, reg_class_t, reg_class_t); -static unsigned int mips_function_arg_boundary (enum machine_mode, const_tree); +static unsigned int mips_function_arg_boundary (machine_mode, const_tree); struct mips16_flip_traits : default_hashmap_traits { @@ -1630,7 +1630,7 @@ mips_build_integer (struct mips_integer_op *codes, /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ static bool -mips_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +mips_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return mips_const_insns (x) > 0; } @@ -1804,7 +1804,7 @@ mips_symbol_binds_local_p (const_rtx x) data section. */ static bool -mips_rtx_constant_in_small_data_p (enum machine_mode mode) +mips_rtx_constant_in_small_data_p (machine_mode mode) { return (!TARGET_EMBEDDED_DATA && TARGET_LOCAL_SDATA @@ -2057,7 +2057,7 @@ mips_symbolic_constant_p (rtx x, enum mips_symbol_context context, extended ones. */ static int -mips_symbol_insns_1 (enum mips_symbol_type type, enum machine_mode mode) +mips_symbol_insns_1 (enum mips_symbol_type type, machine_mode mode) { if (mips_use_pcrel_pool_p[(int) type]) { @@ -2169,7 +2169,7 @@ mips_symbol_insns_1 (enum mips_symbol_type type, enum machine_mode mode) In both cases, instruction counts are based off BASE_INSN_LENGTH. */ static int -mips_symbol_insns (enum mips_symbol_type type, enum machine_mode mode) +mips_symbol_insns (enum mips_symbol_type type, machine_mode mode) { return mips_symbol_insns_1 (type, mode) * (TARGET_MIPS16 ? 2 : 1); } @@ -2177,7 +2177,7 @@ mips_symbol_insns (enum mips_symbol_type type, enum machine_mode mode) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -mips_cannot_force_const_mem (enum machine_mode mode, rtx x) +mips_cannot_force_const_mem (machine_mode mode, rtx x) { enum mips_symbol_type type; rtx base, offset; @@ -2227,7 +2227,7 @@ mips_cannot_force_const_mem (enum machine_mode mode, rtx x) constants when we're using a per-function constant pool. */ static bool -mips_use_blocks_for_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, +mips_use_blocks_for_constant_p (machine_mode mode ATTRIBUTE_UNUSED, const_rtx x ATTRIBUTE_UNUSED) { return !TARGET_MIPS16_PCREL_LOADS; @@ -2237,7 +2237,7 @@ mips_use_blocks_for_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, STRICT_P is true if REG_OK_STRICT is in effect. */ int -mips_regno_mode_ok_for_base_p (int regno, enum machine_mode mode, +mips_regno_mode_ok_for_base_p (int regno, machine_mode mode, bool strict_p) { if (!HARD_REGISTER_NUM_P (regno)) @@ -2265,7 +2265,7 @@ mips_regno_mode_ok_for_base_p (int regno, enum machine_mode mode, STRICT_P is true if REG_OK_STRICT is in effect. */ static bool -mips_valid_base_register_p (rtx x, enum machine_mode mode, bool strict_p) +mips_valid_base_register_p (rtx x, machine_mode mode, bool strict_p) { if (!strict_p && GET_CODE (x) == SUBREG) x = SUBREG_REG (x); @@ -2278,7 +2278,7 @@ mips_valid_base_register_p (rtx x, enum machine_mode mode, bool strict_p) can address a value of mode MODE. */ static bool -mips_valid_offset_p (rtx x, enum machine_mode mode) +mips_valid_offset_p (rtx x, machine_mode mode) { /* Check that X is a signed 16-bit number. */ if (!const_arith_operand (x, Pmode)) @@ -2297,7 +2297,7 @@ mips_valid_offset_p (rtx x, enum machine_mode mode) LO_SUM symbol has type SYMBOL_TYPE. */ static bool -mips_valid_lo_sum_p (enum mips_symbol_type symbol_type, enum machine_mode mode) +mips_valid_lo_sum_p (enum mips_symbol_type symbol_type, machine_mode mode) { /* Check that symbols of type SYMBOL_TYPE can be used to access values of mode MODE. */ @@ -2325,7 +2325,7 @@ mips_valid_lo_sum_p (enum mips_symbol_type symbol_type, enum machine_mode mode) static bool mips_classify_address (struct mips_address_info *info, rtx x, - enum machine_mode mode, bool strict_p) + machine_mode mode, bool strict_p) { switch (GET_CODE (x)) { @@ -2384,7 +2384,7 @@ mips_classify_address (struct mips_address_info *info, rtx x, /* Implement TARGET_LEGITIMATE_ADDRESS_P. */ static bool -mips_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) +mips_legitimate_address_p (machine_mode mode, rtx x, bool strict_p) { struct mips_address_info addr; @@ -2394,7 +2394,7 @@ mips_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) /* Return true if X is a legitimate $sp-based address for mode MDOE. */ bool -mips_stack_address_p (rtx x, enum machine_mode mode) +mips_stack_address_p (rtx x, machine_mode mode) { struct mips_address_info addr; @@ -2431,7 +2431,7 @@ mips_lwxs_address_p (rtx addr) sense, because their use is so restricted. */ static bool -mips_lx_address_p (rtx addr, enum machine_mode mode) +mips_lx_address_p (rtx addr, machine_mode mode) { if (GET_CODE (addr) != PLUS || !REG_P (XEXP (addr, 0)) @@ -2458,7 +2458,7 @@ mips_lx_address_p (rtx addr, enum machine_mode mode) an 8-bit immediate field that's shifted left twice. */ static bool -mips16_unextended_reference_p (enum machine_mode mode, rtx base, +mips16_unextended_reference_p (machine_mode mode, rtx base, unsigned HOST_WIDE_INT offset) { if (mode != BLKmode && offset % GET_MODE_SIZE (mode) == 0) @@ -2478,7 +2478,7 @@ mips16_unextended_reference_p (enum machine_mode mode, rtx base, enough. */ int -mips_address_insns (rtx x, enum machine_mode mode, bool might_split_p) +mips_address_insns (rtx x, machine_mode mode, bool might_split_p) { struct mips_address_info addr; int factor; @@ -2538,7 +2538,7 @@ mips_signed_immediate_p (unsigned HOST_WIDE_INT x, int bits, int shift = 0) OFFSET_PREDICATE. */ bool -m16_based_address_p (rtx x, enum machine_mode mode, +m16_based_address_p (rtx x, machine_mode mode, insn_operand_predicate_fn offset_predicate) { struct mips_address_info addr; @@ -2553,7 +2553,7 @@ m16_based_address_p (rtx x, enum machine_mode mode, for a microMIPS LWSP or SWSP insn. */ bool -lwsp_swsp_address_p (rtx x, enum machine_mode mode) +lwsp_swsp_address_p (rtx x, machine_mode mode) { struct mips_address_info addr; @@ -2567,7 +2567,7 @@ lwsp_swsp_address_p (rtx x, enum machine_mode mode) MODE is the mode of the value being accessed. */ bool -umips_12bit_offset_address_p (rtx x, enum machine_mode mode) +umips_12bit_offset_address_p (rtx x, machine_mode mode) { struct mips_address_info addr; @@ -2682,7 +2682,7 @@ mips_split_const_insns (rtx x) int mips_load_store_insns (rtx mem, rtx_insn *insn) { - enum machine_mode mode; + machine_mode mode; bool might_split_p; rtx set; @@ -2762,7 +2762,7 @@ mips_emit_unary (enum rtx_code code, rtx target, rtx op0) Return that new register. */ static rtx -mips_force_unary (enum machine_mode mode, enum rtx_code code, rtx op0) +mips_force_unary (machine_mode mode, enum rtx_code code, rtx op0) { rtx reg; @@ -2784,7 +2784,7 @@ mips_emit_binary (enum rtx_code code, rtx target, rtx op0, rtx op1) of mode MODE. Return that new register. */ static rtx -mips_force_binary (enum machine_mode mode, enum rtx_code code, rtx op0, rtx op1) +mips_force_binary (machine_mode mode, enum rtx_code code, rtx op0, rtx op1) { rtx reg; @@ -3042,7 +3042,7 @@ mips_got_load (rtx temp, rtx addr, enum mips_symbol_type type) is guaranteed to be a legitimate address for mode MODE. */ bool -mips_split_symbol (rtx temp, rtx addr, enum machine_mode mode, rtx *low_out) +mips_split_symbol (rtx temp, rtx addr, machine_mode mode, rtx *low_out) { enum mips_symbol_context context; enum mips_symbol_type symbol_type; @@ -3302,7 +3302,7 @@ mips16_expand_set_fcsr (rtx newval) /* If X is not a valid address for mode MODE, force it into a register. */ static rtx -mips_force_address (rtx x, enum machine_mode mode) +mips_force_address (rtx x, machine_mode mode) { if (!mips_legitimate_address_p (mode, x, false)) x = force_reg (Pmode, x); @@ -3316,7 +3316,7 @@ mips_force_address (rtx x, enum machine_mode mode) static rtx mips_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { rtx base, addr; HOST_WIDE_INT offset; @@ -3347,7 +3347,7 @@ void mips_move_integer (rtx temp, rtx dest, unsigned HOST_WIDE_INT value) { struct mips_integer_op codes[MIPS_MAX_INTEGER_OPS]; - enum machine_mode mode; + machine_mode mode; unsigned int i, num_ops; rtx x; @@ -3377,7 +3377,7 @@ mips_move_integer (rtx temp, rtx dest, unsigned HOST_WIDE_INT value) move_operand. */ static void -mips_legitimize_const_move (enum machine_mode mode, rtx dest, rtx src) +mips_legitimize_const_move (machine_mode mode, rtx dest, rtx src) { rtx base, offset; @@ -3428,7 +3428,7 @@ mips_legitimize_const_move (enum machine_mode mode, rtx dest, rtx src) sequence that is valid. */ bool -mips_legitimize_move (enum machine_mode mode, rtx dest, rtx src) +mips_legitimize_move (machine_mode mode, rtx dest, rtx src) { if (!register_operand (dest, mode) && !reg_or_0_operand (src, mode)) { @@ -3678,7 +3678,7 @@ mips_binary_cost (rtx x, int single_cost, int double_cost, bool speed) /* Return the cost of floating-point multiplications of mode MODE. */ static int -mips_fp_mult_cost (enum machine_mode mode) +mips_fp_mult_cost (machine_mode mode) { return mode == DFmode ? mips_cost->fp_mult_df : mips_cost->fp_mult_sf; } @@ -3686,7 +3686,7 @@ mips_fp_mult_cost (enum machine_mode mode) /* Return the cost of floating-point divisions of mode MODE. */ static int -mips_fp_div_cost (enum machine_mode mode) +mips_fp_div_cost (machine_mode mode) { return mode == DFmode ? mips_cost->fp_div_df : mips_cost->fp_div_sf; } @@ -3695,7 +3695,7 @@ mips_fp_div_cost (enum machine_mode mode) cost of OP itself. */ static int -mips_sign_extend_cost (enum machine_mode mode, rtx op) +mips_sign_extend_cost (machine_mode mode, rtx op) { if (MEM_P (op)) /* Extended loads are as cheap as unextended ones. */ @@ -3717,7 +3717,7 @@ mips_sign_extend_cost (enum machine_mode mode, rtx op) cost of OP itself. */ static int -mips_zero_extend_cost (enum machine_mode mode, rtx op) +mips_zero_extend_cost (machine_mode mode, rtx op) { if (MEM_P (op)) /* Extended loads are as cheap as unextended ones. */ @@ -3743,7 +3743,7 @@ mips_zero_extend_cost (enum machine_mode mode, rtx op) assuming that the move will be in pieces of at most UNITS bytes. */ static int -mips_set_reg_reg_piece_cost (enum machine_mode mode, unsigned int units) +mips_set_reg_reg_piece_cost (machine_mode mode, unsigned int units) { return COSTS_N_INSNS ((GET_MODE_SIZE (mode) + units - 1) / units); } @@ -3751,7 +3751,7 @@ mips_set_reg_reg_piece_cost (enum machine_mode mode, unsigned int units) /* Return the cost of moving between two registers of mode MODE. */ static int -mips_set_reg_reg_cost (enum machine_mode mode) +mips_set_reg_reg_cost (machine_mode mode) { switch (GET_MODE_CLASS (mode)) { @@ -3776,7 +3776,7 @@ static bool mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); bool float_mode_p = FLOAT_MODE_P (mode); int cost; rtx addr; @@ -4198,7 +4198,7 @@ mips_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, /* Implement TARGET_ADDRESS_COST. */ static int -mips_address_cost (rtx addr, enum machine_mode mode, +mips_address_cost (rtx addr, machine_mode mode, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -4333,7 +4333,7 @@ rtx mips_subword (rtx op, bool high_p) { unsigned int byte, offset; - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (op); if (mode == VOIDmode) @@ -4508,7 +4508,7 @@ const char * mips_output_move (rtx dest, rtx src) { enum rtx_code dest_code, src_code; - enum machine_mode mode; + machine_mode mode; enum mips_symbol_type symbol_type; bool dbl_p; @@ -4729,7 +4729,7 @@ mips_int_order_operand_ok_p (enum rtx_code code, rtx cmp1) static bool mips_canonicalize_int_order_test (enum rtx_code *code, rtx *cmp1, - enum machine_mode mode) + machine_mode mode) { HOST_WIDE_INT plus_one; @@ -4774,7 +4774,7 @@ static void mips_emit_int_order_test (enum rtx_code code, bool *invert_ptr, rtx target, rtx cmp0, rtx cmp1) { - enum machine_mode mode; + machine_mode mode; /* First see if there is a MIPS instruction that can do this operation. If not, try doing the same for the inverse operation. If that also @@ -4878,7 +4878,7 @@ mips_reversed_fp_cond (enum rtx_code *code) a simple round-robin allocation scheme. */ static rtx -mips_allocate_fcc (enum machine_mode mode) +mips_allocate_fcc (machine_mode mode) { unsigned int regno, count; @@ -5066,7 +5066,7 @@ void mips_expand_conditional_trap (rtx comparison) { rtx op0, op1; - enum machine_mode mode; + machine_mode mode; enum rtx_code code; /* MIPS conditional trap instructions don't have GT or LE flavors, @@ -5116,7 +5116,7 @@ mips_init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype) static void mips_get_arg_info (struct mips_arg_info *info, const CUMULATIVE_ARGS *cum, - enum machine_mode mode, const_tree type, bool named) + machine_mode mode, const_tree type, bool named) { bool doubleword_aligned_p; unsigned int num_bytes, num_words, max_regs; @@ -5253,7 +5253,7 @@ mips_strict_argument_naming (cumulative_args_t ca ATTRIBUTE_UNUSED) /* Implement TARGET_FUNCTION_ARG. */ static rtx -mips_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +mips_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -5266,7 +5266,7 @@ mips_function_arg (cumulative_args_t cum_v, enum machine_mode mode, if (mode == VOIDmode) { if (TARGET_MIPS16 && cum->fp_code != 0) - return gen_rtx_REG ((enum machine_mode) cum->fp_code, 0); + return gen_rtx_REG ((machine_mode) cum->fp_code, 0); else return NULL; } @@ -5349,7 +5349,7 @@ mips_function_arg (cumulative_args_t cum_v, enum machine_mode mode, && GET_MODE_CLASS (mode) == MODE_COMPLEX_FLOAT) { rtx real, imag; - enum machine_mode inner; + machine_mode inner; unsigned int regno; inner = GET_MODE_INNER (mode); @@ -5380,7 +5380,7 @@ mips_function_arg (cumulative_args_t cum_v, enum machine_mode mode, /* Implement TARGET_FUNCTION_ARG_ADVANCE. */ static void -mips_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +mips_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -5418,7 +5418,7 @@ mips_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, static int mips_arg_partial_bytes (cumulative_args_t cum, - enum machine_mode mode, tree type, bool named) + machine_mode mode, tree type, bool named) { struct mips_arg_info info; @@ -5431,7 +5431,7 @@ mips_arg_partial_bytes (cumulative_args_t cum, to STACK_BOUNDARY bits if the type requires it. */ static unsigned int -mips_function_arg_boundary (enum machine_mode mode, const_tree type) +mips_function_arg_boundary (machine_mode mode, const_tree type) { unsigned int alignment; @@ -5449,7 +5449,7 @@ mips_function_arg_boundary (enum machine_mode mode, const_tree type) byte does. */ bool -mips_pad_arg_upward (enum machine_mode mode, const_tree type) +mips_pad_arg_upward (machine_mode mode, const_tree type) { /* On little-endian targets, the first byte of every stack argument is passed in the first byte of the stack slot. */ @@ -5487,7 +5487,7 @@ mips_pad_arg_upward (enum machine_mode mode, const_tree type) the opposite if the most significant byte does. */ bool -mips_pad_reg_upward (enum machine_mode mode, tree type) +mips_pad_reg_upward (machine_mode mode, tree type) { /* No shifting is required for floating-point arguments. */ if (type != 0 ? FLOAT_TYPE_P (type) : GET_MODE_CLASS (mode) == MODE_FLOAT) @@ -5502,7 +5502,7 @@ mips_pad_reg_upward (enum machine_mode mode, tree type) static bool mips_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { if (mips_abi == ABI_EABI) @@ -5529,7 +5529,7 @@ mips_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, static bool mips_callee_copies (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named) { return mips_abi == ABI_EABI && named; @@ -5598,7 +5598,7 @@ mips_return_in_msb (const_tree valtype) floating-point register. */ static bool -mips_return_mode_in_fpr_p (enum machine_mode mode) +mips_return_mode_in_fpr_p (machine_mode mode) { return ((GET_MODE_CLASS (mode) == MODE_FLOAT || mode == V2SFmode @@ -5617,8 +5617,8 @@ mips_return_mode_in_fpr_p (enum machine_mode mode) the structure itself has mode BLKmode. */ static rtx -mips_return_fpr_single (enum machine_mode type_mode, - enum machine_mode value_mode) +mips_return_fpr_single (machine_mode type_mode, + machine_mode value_mode) { rtx x; @@ -5640,9 +5640,9 @@ mips_return_fpr_single (enum machine_mode type_mode, Otherwise the values are packed together as closely as possible. */ static rtx -mips_return_fpr_pair (enum machine_mode mode, - enum machine_mode mode1, HOST_WIDE_INT offset1, - enum machine_mode mode2, HOST_WIDE_INT offset2) +mips_return_fpr_pair (machine_mode mode, + machine_mode mode1, HOST_WIDE_INT offset1, + machine_mode mode2, HOST_WIDE_INT offset2) { int inc; @@ -5665,7 +5665,7 @@ mips_return_fpr_pair (enum machine_mode mode, static rtx mips_function_value_1 (const_tree valtype, const_tree fn_decl_or_type, - enum machine_mode mode) + machine_mode mode) { if (valtype) { @@ -5755,7 +5755,7 @@ mips_function_value (const_tree valtype, const_tree fn_decl_or_type, /* Implement TARGET_LIBCALL_VALUE. */ static rtx -mips_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +mips_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return mips_function_value_1 (NULL_TREE, NULL_TREE, mode); } @@ -5795,7 +5795,7 @@ mips_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) /* Implement TARGET_SETUP_INCOMING_VARARGS. */ static void -mips_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, +mips_setup_incoming_varargs (cumulative_args_t cum, machine_mode mode, tree type, int *pretend_size ATTRIBUTE_UNUSED, int no_rtl) { @@ -5834,7 +5834,7 @@ mips_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, { /* We can't use move_block_from_reg, because it will use the wrong mode. */ - enum machine_mode mode; + machine_mode mode; int off, i; /* Set OFF to the offset from virtual_incoming_args_rtx of @@ -6471,7 +6471,7 @@ static struct mips16_stub *mips16_stubs; return mode MODE in the name of a MIPS16 function stub. */ static const char * -mips16_call_stub_mode_suffix (enum machine_mode mode) +mips16_call_stub_mode_suffix (machine_mode mode) { if (mode == SFmode) return "sf"; @@ -6542,7 +6542,7 @@ mips_output_args_xfer (int fp_code, char direction) for (f = (unsigned int) fp_code; f != 0; f >>= 2) { - enum machine_mode mode; + machine_mode mode; struct mips_arg_info info; if ((f & 3) == 1) @@ -6667,7 +6667,7 @@ mips16_copy_fpr_return_value (void) { rtx fn, insn, retval; tree return_type; - enum machine_mode return_mode; + machine_mode return_mode; const char *name; return_type = DECL_RESULT (current_function_decl); @@ -7267,7 +7267,7 @@ mips_block_move_straight (rtx dest, rtx src, HOST_WIDE_INT length) HOST_WIDE_INT offset, delta; unsigned HOST_WIDE_INT bits; int i; - enum machine_mode mode; + machine_mode mode; rtx *regs; /* Work out how many bits to move at a time. If both operands have @@ -7489,7 +7489,7 @@ mips_expand_atomic_qihi (union mips_gen_fn_ptrs generator, rtx orig_addr, memsi_addr, memsi, shift, shiftsi, unshifted_mask; rtx unshifted_mask_reg, mask, inverted_mask, si_op; rtx res = NULL; - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (mem); @@ -7674,7 +7674,7 @@ mips_expand_ins_as_unaligned_store (rtx dest, rtx src, HOST_WIDE_INT width, HOST_WIDE_INT bitpos) { rtx left, right; - enum machine_mode mode; + machine_mode mode; if (!mips_get_unaligned_mem (dest, width, bitpos, &left, &right)) return false; @@ -7697,7 +7697,7 @@ mips_expand_ins_as_unaligned_store (rtx dest, rtx src, HOST_WIDE_INT width, /* Return true if X is a MEM with the same size as MODE. */ bool -mips_mem_fits_mode_p (enum machine_mode mode, rtx x) +mips_mem_fits_mode_p (machine_mode mode, rtx x) { return (MEM_P (x) && MEM_SIZE_KNOWN_P (x) @@ -7739,7 +7739,7 @@ mips_use_ins_ext_p (rtx op, HOST_WIDE_INT width, HOST_WIDE_INT bitpos) mask_low_and_shift_len for the actual definition. */ bool -mask_low_and_shift_p (enum machine_mode mode, rtx mask, rtx shift, int maxlen) +mask_low_and_shift_p (machine_mode mode, rtx mask, rtx shift, int maxlen) { return IN_RANGE (mask_low_and_shift_len (mode, mask, shift), 1, maxlen); } @@ -7749,7 +7749,7 @@ mask_low_and_shift_p (enum machine_mode mode, rtx mask, rtx shift, int maxlen) see the table in the comment before the pattern. */ bool -and_operands_ok (enum machine_mode mode, rtx op1, rtx op2) +and_operands_ok (machine_mode mode, rtx op1, rtx op2) { return (memory_operand (op1, mode) ? and_load_operand (op2, mode) @@ -7763,7 +7763,7 @@ and_operands_ok (enum machine_mode mode, rtx op1, rtx op2) return the length of the mask, otherwise return -1. */ int -mask_low_and_shift_len (enum machine_mode mode, rtx mask, rtx shift) +mask_low_and_shift_len (machine_mode mode, rtx mask, rtx shift) { HOST_WIDE_INT shval; @@ -8413,7 +8413,7 @@ mips_encode_section_info (tree decl, rtx rtl, int first) /* Implement TARGET_SELECT_RTX_SECTION. */ static section * -mips_select_rtx_section (enum machine_mode mode, rtx x, +mips_select_rtx_section (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align) { /* ??? Consider using mergeable small data sections. */ @@ -8661,7 +8661,7 @@ static rtx mips_dwarf_register_span (rtx reg) { rtx high, low; - enum machine_mode mode; + machine_mode mode; /* By default, GCC maps increasing register numbers to increasing memory locations, but paired FPRs are always little-endian, @@ -10429,7 +10429,7 @@ typedef void (*mips_save_restore_fn) (rtx, rtx); stack pointer. */ static void -mips_save_restore_reg (enum machine_mode mode, int regno, +mips_save_restore_reg (machine_mode mode, int regno, HOST_WIDE_INT offset, mips_save_restore_fn fn) { rtx mem; @@ -10595,7 +10595,7 @@ static void mips_for_each_saved_gpr_and_fpr (HOST_WIDE_INT sp_offset, mips_save_restore_fn fn) { - enum machine_mode fpr_mode; + machine_mode fpr_mode; int regno; const struct mips_frame_info *frame = &cfun->machine->frame; HOST_WIDE_INT offset; @@ -11723,7 +11723,7 @@ mips_can_use_return_insn (void) The result of this function is cached in mips_hard_regno_mode_ok. */ static bool -mips_hard_regno_mode_ok_p (unsigned int regno, enum machine_mode mode) +mips_hard_regno_mode_ok_p (unsigned int regno, machine_mode mode) { unsigned int size; enum mode_class mclass; @@ -11813,7 +11813,7 @@ mips_hard_regno_mode_ok_p (unsigned int regno, enum machine_mode mode) /* Implement HARD_REGNO_NREGS. */ unsigned int -mips_hard_regno_nregs (int regno, enum machine_mode mode) +mips_hard_regno_nregs (int regno, machine_mode mode) { if (ST_REG_P (regno)) /* The size of FP status registers is always 4, because they only hold @@ -11831,7 +11831,7 @@ mips_hard_regno_nregs (int regno, enum machine_mode mode) in mips_hard_regno_nregs. */ int -mips_class_max_nregs (enum reg_class rclass, enum machine_mode mode) +mips_class_max_nregs (enum reg_class rclass, machine_mode mode) { int size; HARD_REG_SET left; @@ -11858,8 +11858,8 @@ mips_class_max_nregs (enum reg_class rclass, enum machine_mode mode) /* Implement CANNOT_CHANGE_MODE_CLASS. */ bool -mips_cannot_change_mode_class (enum machine_mode from, - enum machine_mode to, +mips_cannot_change_mode_class (machine_mode from, + machine_mode to, enum reg_class rclass) { /* Allow conversions between different Loongson integer vectors, @@ -11897,7 +11897,7 @@ mips_cannot_change_mode_class (enum machine_mode from, /* Implement target hook small_register_classes_for_mode_p. */ static bool -mips_small_register_classes_for_mode_p (enum machine_mode mode +mips_small_register_classes_for_mode_p (machine_mode mode ATTRIBUTE_UNUSED) { return TARGET_MIPS16; @@ -11906,7 +11906,7 @@ mips_small_register_classes_for_mode_p (enum machine_mode mode /* Return true if moves in mode MODE can use the FPU's mov.fmt instruction. */ static bool -mips_mode_ok_for_mov_fmt_p (enum machine_mode mode) +mips_mode_ok_for_mov_fmt_p (machine_mode mode) { switch (mode) { @@ -11927,7 +11927,7 @@ mips_mode_ok_for_mov_fmt_p (enum machine_mode mode) /* Implement MODES_TIEABLE_P. */ bool -mips_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) +mips_modes_tieable_p (machine_mode mode1, machine_mode mode2) { /* FPRs allow no mode punning, so it's not worth tying modes if we'd prefer to put one of them in FPRs. */ @@ -12048,7 +12048,7 @@ mips_move_from_gpr_cost (reg_class_t to) the maximum for us. */ static int -mips_register_move_cost (enum machine_mode mode, +mips_register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to) { reg_class_t dregs; @@ -12099,7 +12099,7 @@ mips_register_priority (int hard_regno) /* Implement TARGET_MEMORY_MOVE_COST. */ static int -mips_memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in) +mips_memory_move_cost (machine_mode mode, reg_class_t rclass, bool in) { return (mips_cost->memory_latency + memory_move_secondary_cost (mode, rclass, in)); @@ -12113,7 +12113,7 @@ mips_memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in) enum reg_class mips_secondary_reload_class (enum reg_class rclass, - enum machine_mode mode, rtx x, bool) + machine_mode mode, rtx x, bool) { int regno; @@ -12174,7 +12174,7 @@ mips_secondary_reload_class (enum reg_class rclass, /* Implement TARGET_MODE_REP_EXTENDED. */ static int -mips_mode_rep_extended (enum machine_mode mode, enum machine_mode mode_rep) +mips_mode_rep_extended (machine_mode mode, machine_mode mode_rep) { /* On 64-bit targets, SImode register values are sign-extended to DImode. */ if (TARGET_64BIT && mode == SImode && mode_rep == DImode) @@ -12186,7 +12186,7 @@ mips_mode_rep_extended (enum machine_mode mode, enum machine_mode mode_rep) /* Implement TARGET_VALID_POINTER_MODE. */ static bool -mips_valid_pointer_mode (enum machine_mode mode) +mips_valid_pointer_mode (machine_mode mode) { return mode == SImode || (TARGET_64BIT && mode == DImode); } @@ -12194,7 +12194,7 @@ mips_valid_pointer_mode (enum machine_mode mode) /* Implement TARGET_VECTOR_MODE_SUPPORTED_P. */ static bool -mips_vector_mode_supported_p (enum machine_mode mode) +mips_vector_mode_supported_p (machine_mode mode) { switch (mode) { @@ -12224,7 +12224,7 @@ mips_vector_mode_supported_p (enum machine_mode mode) /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */ static bool -mips_scalar_mode_supported_p (enum machine_mode mode) +mips_scalar_mode_supported_p (machine_mode mode) { if (ALL_FIXED_POINT_MODE_P (mode) && GET_MODE_PRECISION (mode) <= 2 * BITS_PER_WORD) @@ -12235,8 +12235,8 @@ mips_scalar_mode_supported_p (enum machine_mode mode) /* Implement TARGET_VECTORIZE_PREFERRED_SIMD_MODE. */ -static enum machine_mode -mips_preferred_simd_mode (enum machine_mode mode ATTRIBUTE_UNUSED) +static machine_mode +mips_preferred_simd_mode (machine_mode mode ATTRIBUTE_UNUSED) { if (TARGET_PAIRED_SINGLE_FLOAT && mode == SFmode) @@ -14230,7 +14230,7 @@ static GTY(()) tree mips_builtin_decls[ARRAY_SIZE (mips_builtins)]; of the vector itself. */ static tree -mips_builtin_vector_type (tree type, enum machine_mode mode) +mips_builtin_vector_type (tree type, machine_mode mode) { static tree types[2 * (int) MAX_MACHINE_MODE]; int mode_index; @@ -14574,7 +14574,7 @@ mips_expand_builtin_bposge (enum mips_builtin_type builtin_type, rtx target) static rtx mips_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode, int ignore) + machine_mode mode, int ignore) { tree fndecl; unsigned int fcode, avail; @@ -14625,7 +14625,7 @@ struct mips16_constant { struct mips16_constant *next; rtx value; rtx_code_label *label; - enum machine_mode mode; + machine_mode mode; }; /* Information about an incomplete MIPS16 constant pool. FIRST is the @@ -14643,7 +14643,7 @@ struct mips16_constant_pool { static rtx_code_label * mips16_add_constant (struct mips16_constant_pool *pool, - rtx value, enum machine_mode mode) + rtx value, machine_mode mode) { struct mips16_constant **p, *c; bool first_of_size_p; @@ -14699,7 +14699,7 @@ mips16_add_constant (struct mips16_constant_pool *pool, instruction emitted. MODE is the mode of the constant. */ static rtx_insn * -mips16_emit_constants_1 (enum machine_mode mode, rtx value, rtx_insn *insn) +mips16_emit_constants_1 (machine_mode mode, rtx value, rtx_insn *insn) { if (SCALAR_INT_MODE_P (mode) || ALL_SCALAR_FIXED_POINT_MODE_P (mode)) { @@ -15062,7 +15062,7 @@ r10k_safe_mem_expr_p (tree expr, unsigned HOST_WIDE_INT offset) { HOST_WIDE_INT bitoffset, bitsize; tree inner, var_offset; - enum machine_mode mode; + machine_mode mode; int unsigned_p, volatile_p; inner = get_inner_reference (expr, &bitsize, &bitoffset, &var_offset, &mode, @@ -15728,7 +15728,7 @@ mips_mult_zero_zero_cost (struct mips_sim *state, bool setting) mips_tuning_info.fast_mult_zero_zero_p = setting; start_sequence (); - enum machine_mode dword_mode = TARGET_64BIT ? TImode : DImode; + machine_mode dword_mode = TARGET_64BIT ? TImode : DImode; rtx hilo = gen_rtx_REG (dword_mode, MD_REG_FIRST); mips_emit_move_or_split (hilo, const0_rtx, SPLIT_FOR_SPEED); @@ -17288,7 +17288,7 @@ mips_option_override (void) for (mode = 0; mode < MAX_MACHINE_MODE; mode++) for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) mips_hard_regno_mode_ok[mode][regno] - = mips_hard_regno_mode_ok_p (regno, (enum machine_mode) mode); + = mips_hard_regno_mode_ok_p (regno, (machine_mode) mode); /* Function to allocate machine-dependent function status. */ init_machine_status = &mips_init_machine_status; @@ -18105,7 +18105,7 @@ void mips_function_profiler (FILE *file) when TARGET_LOONGSON_VECTORS is true. */ static unsigned HOST_WIDE_INT -mips_shift_truncation_mask (enum machine_mode mode) +mips_shift_truncation_mask (machine_mode mode) { if (TARGET_LOONGSON_VECTORS && VECTOR_MODE_P (mode)) return 0; @@ -18150,7 +18150,7 @@ struct expand_vec_perm_d { rtx target, op0, op1; unsigned char perm[MAX_VECT_LEN]; - enum machine_mode vmode; + machine_mode vmode; unsigned char nelt; bool one_vector_p; bool testing_p; @@ -18189,7 +18189,7 @@ static bool mips_expand_vselect_vconcat (rtx target, rtx op0, rtx op1, const unsigned char *perm, unsigned nelt) { - enum machine_mode v2mode; + machine_mode v2mode; rtx x; v2mode = GET_MODE_2XWIDER_MODE (GET_MODE (op0)); @@ -18463,7 +18463,7 @@ mips_expand_vec_perm_const (rtx operands[4]) /* Implement TARGET_VECTORIZE_VEC_PERM_CONST_OK. */ static bool -mips_vectorize_vec_perm_const_ok (enum machine_mode vmode, +mips_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel) { struct expand_vec_perm_d d; @@ -18508,7 +18508,7 @@ mips_vectorize_vec_perm_const_ok (enum machine_mode vmode, void mips_expand_vec_unpack (rtx operands[2], bool unsigned_p, bool high_p) { - enum machine_mode imode = GET_MODE (operands[1]); + machine_mode imode = GET_MODE (operands[1]); rtx (*unpack) (rtx, rtx, rtx); rtx (*cmpgt) (rtx, rtx, rtx); rtx tmp, dest, zero; @@ -18559,7 +18559,7 @@ mips_constant_elt_p (rtx x) /* A subroutine of mips_expand_vec_init, expand via broadcast. */ static void -mips_expand_vi_broadcast (enum machine_mode vmode, rtx target, rtx elt) +mips_expand_vi_broadcast (machine_mode vmode, rtx target, rtx elt) { struct expand_vec_perm_d d; rtx t1; @@ -18599,7 +18599,7 @@ mips_expand_vi_broadcast (enum machine_mode vmode, rtx target, rtx elt) elements of VALS with zeros, copy the constant vector to TARGET. */ static void -mips_expand_vi_constant (enum machine_mode vmode, unsigned nelt, +mips_expand_vi_constant (machine_mode vmode, unsigned nelt, rtx target, rtx vals) { rtvec vec = shallow_copy_rtvec (XVEC (vals, 0)); @@ -18629,7 +18629,7 @@ mips_expand_vi_loongson_one_pinsrh (rtx target, rtx vals, unsigned one_var) /* A subroutine of mips_expand_vec_init, expand anything via memory. */ static void -mips_expand_vi_general (enum machine_mode vmode, enum machine_mode imode, +mips_expand_vi_general (machine_mode vmode, machine_mode imode, unsigned nelt, unsigned nvar, rtx target, rtx vals) { rtx mem = assign_stack_temp (vmode, GET_MODE_SIZE (vmode)); @@ -18653,8 +18653,8 @@ mips_expand_vi_general (enum machine_mode vmode, enum machine_mode imode, void mips_expand_vector_init (rtx target, rtx vals) { - enum machine_mode vmode = GET_MODE (target); - enum machine_mode imode = GET_MODE_INNER (vmode); + machine_mode vmode = GET_MODE (target); + machine_mode imode = GET_MODE_INNER (vmode); unsigned i, nelt = GET_MODE_NUNITS (vmode); unsigned nvar = 0, one_var = -1u; bool all_same = true; @@ -18711,7 +18711,7 @@ mips_expand_vector_init (rtx target, rtx vals) void mips_expand_vec_reduc (rtx target, rtx in, rtx (*gen)(rtx, rtx, rtx)) { - enum machine_mode vmode = GET_MODE (in); + machine_mode vmode = GET_MODE (in); unsigned char perm2[2]; rtx last, next, fold, x; bool ok; @@ -18783,7 +18783,7 @@ void mips_expand_vec_minmax (rtx target, rtx op0, rtx op1, rtx (*cmp) (rtx, rtx, rtx), bool min_p) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); rtx tc, t0, t1, x; tc = gen_reg_rtx (vmode); @@ -18863,7 +18863,7 @@ mips_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update) static reg_class_t mips_spill_class (reg_class_t rclass ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (TARGET_MIPS16) return SPILL_REGS; diff --git a/gcc/config/mmix/mmix-protos.h b/gcc/config/mmix/mmix-protos.h index 62604df..3e54eb4 100644 --- a/gcc/config/mmix/mmix-protos.h +++ b/gcc/config/mmix/mmix-protos.h @@ -24,7 +24,7 @@ extern int mmix_initial_elimination_offset (int, int); extern int mmix_starting_frame_offset (void); extern int mmix_function_arg_regno_p (int, int); extern void mmix_function_profiler (FILE *, int); -extern int mmix_reversible_cc_mode (enum machine_mode); +extern int mmix_reversible_cc_mode (machine_mode); extern const char *mmix_text_section_asm_op (void); extern const char *mmix_data_section_asm_op (void); extern void mmix_output_quoted_string (FILE *, const char *, int); @@ -57,7 +57,7 @@ extern void mmix_asm_declare_register_global extern void mmix_asm_output_addr_diff_elt (FILE *, rtx, int, int); extern void mmix_asm_output_addr_vec_elt (FILE *, int); extern enum reg_class mmix_secondary_reload_class - (enum reg_class, enum machine_mode, rtx, int); + (enum reg_class, machine_mode, rtx, int); extern rtx mmix_dynamic_chain_address (rtx); extern rtx mmix_return_addr_rtx (int, rtx); extern rtx mmix_eh_return_stackadj_rtx (void); @@ -65,13 +65,13 @@ extern rtx mmix_eh_return_handler_rtx (void); extern int mmix_constant_address_p (rtx); extern void mmix_expand_prologue (void); extern void mmix_expand_epilogue (void); -extern rtx mmix_get_hard_reg_initial_val (enum machine_mode, int); +extern rtx mmix_get_hard_reg_initial_val (machine_mode, int); extern int mmix_asm_preferred_eh_data_format (int, int); extern void mmix_setup_frame_addresses (void); #ifdef RTX_CODE /* Needs to be ifdef:d for sake of enum rtx_code. */ -extern enum machine_mode mmix_select_cc_mode (enum rtx_code, rtx, rtx); +extern machine_mode mmix_select_cc_mode (enum rtx_code, rtx, rtx); extern void mmix_canonicalize_comparison (enum rtx_code *, rtx *, rtx *); extern rtx mmix_gen_compare_reg (enum rtx_code, rtx, rtx); #endif diff --git a/gcc/config/mmix/mmix.c b/gcc/config/mmix/mmix.c index 6d3099d..c143c8f 100644 --- a/gcc/config/mmix/mmix.c +++ b/gcc/config/mmix/mmix.c @@ -144,35 +144,35 @@ static void mmix_target_asm_function_end_prologue (FILE *); static void mmix_target_asm_function_epilogue (FILE *, HOST_WIDE_INT); static reg_class_t mmix_preferred_reload_class (rtx, reg_class_t); static reg_class_t mmix_preferred_output_reload_class (rtx, reg_class_t); -static bool mmix_legitimate_address_p (enum machine_mode, rtx, bool); -static bool mmix_legitimate_constant_p (enum machine_mode, rtx); +static bool mmix_legitimate_address_p (machine_mode, rtx, bool); +static bool mmix_legitimate_constant_p (machine_mode, rtx); static void mmix_reorg (void); static void mmix_asm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static void mmix_setup_incoming_varargs - (cumulative_args_t, enum machine_mode, tree, int *, int); + (cumulative_args_t, machine_mode, tree, int *, int); static void mmix_file_start (void); static void mmix_file_end (void); static bool mmix_rtx_costs (rtx, int, int, int, int *, bool); -static int mmix_register_move_cost (enum machine_mode, +static int mmix_register_move_cost (machine_mode, reg_class_t, reg_class_t); static rtx mmix_struct_value_rtx (tree, int); -static enum machine_mode mmix_promote_function_mode (const_tree, - enum machine_mode, +static machine_mode mmix_promote_function_mode (const_tree, + machine_mode, int *, const_tree, int); -static void mmix_function_arg_advance (cumulative_args_t, enum machine_mode, +static void mmix_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static rtx mmix_function_arg_1 (const cumulative_args_t, enum machine_mode, +static rtx mmix_function_arg_1 (const cumulative_args_t, machine_mode, const_tree, bool, bool); -static rtx mmix_function_incoming_arg (cumulative_args_t, enum machine_mode, +static rtx mmix_function_incoming_arg (cumulative_args_t, machine_mode, const_tree, bool); -static rtx mmix_function_arg (cumulative_args_t, enum machine_mode, +static rtx mmix_function_arg (cumulative_args_t, machine_mode, const_tree, bool); static rtx mmix_function_value (const_tree, const_tree, bool); -static rtx mmix_libcall_value (enum machine_mode, const_rtx); +static rtx mmix_libcall_value (machine_mode, const_rtx); static bool mmix_function_value_regno_p (const unsigned int); static bool mmix_pass_by_reference (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static bool mmix_frame_pointer_required (void); static void mmix_asm_trampoline_template (FILE *); static void mmix_trampoline_init (rtx, tree, rtx); @@ -479,7 +479,7 @@ mmix_preferred_output_reload_class (rtx x, reg_class_t rclass) enum reg_class mmix_secondary_reload_class (enum reg_class rclass, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED, int in_p ATTRIBUTE_UNUSED) { @@ -600,7 +600,7 @@ mmix_initial_elimination_offset (int fromreg, int toreg) } static void -mmix_function_arg_advance (cumulative_args_t argsp_v, enum machine_mode mode, +mmix_function_arg_advance (cumulative_args_t argsp_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); @@ -618,7 +618,7 @@ mmix_function_arg_advance (cumulative_args_t argsp_v, enum machine_mode mode, static rtx mmix_function_arg_1 (const cumulative_args_t argsp_v, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED, bool incoming) @@ -652,7 +652,7 @@ mmix_function_arg_1 (const cumulative_args_t argsp_v, static rtx mmix_function_arg (cumulative_args_t argsp, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named) { @@ -661,7 +661,7 @@ mmix_function_arg (cumulative_args_t argsp, static rtx mmix_function_incoming_arg (cumulative_args_t argsp, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named) { @@ -672,7 +672,7 @@ mmix_function_incoming_arg (cumulative_args_t argsp, everything that goes by value. */ static bool -mmix_pass_by_reference (cumulative_args_t argsp_v, enum machine_mode mode, +mmix_pass_by_reference (cumulative_args_t argsp_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *argsp = get_cumulative_args (argsp_v); @@ -710,8 +710,8 @@ mmix_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, bool outgoing) { - enum machine_mode mode = TYPE_MODE (valtype); - enum machine_mode cmode; + machine_mode mode = TYPE_MODE (valtype); + machine_mode cmode; int first_val_regnum = MMIX_OUTGOING_RETURN_VALUE_REGNUM; rtx vec[MMIX_MAX_REGS_FOR_VALUE]; int i; @@ -774,7 +774,7 @@ mmix_function_value (const_tree valtype, /* Implements TARGET_LIBCALL_VALUE. */ static rtx -mmix_libcall_value (enum machine_mode mode, +mmix_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, MMIX_RETURN_VALUE_REGNUM); @@ -940,7 +940,7 @@ mmix_function_profiler (FILE *stream ATTRIBUTE_UNUSED, static void mmix_setup_incoming_varargs (cumulative_args_t args_so_farp_v, - enum machine_mode mode, + machine_mode mode, tree vartype, int *pretend_sizep, int second_time ATTRIBUTE_UNUSED) @@ -1064,7 +1064,7 @@ mmix_constant_address_p (rtx x) /* Return 1 if the address is OK, otherwise 0. */ bool -mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, +mmix_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict_checking) { @@ -1124,7 +1124,7 @@ mmix_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ static bool -mmix_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +mmix_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { RTX_CODE code = GET_CODE (x); @@ -1139,7 +1139,7 @@ mmix_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) /* SELECT_CC_MODE. */ -enum machine_mode +machine_mode mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED) { /* We use CCmode, CC_UNSmode, CC_FPmode, CC_FPEQmode and CC_FUNmode to @@ -1167,7 +1167,7 @@ mmix_select_cc_mode (RTX_CODE op, rtx x, rtx y ATTRIBUTE_UNUSED) /* REVERSIBLE_CC_MODE. */ int -mmix_reversible_cc_mode (enum machine_mode mode) +mmix_reversible_cc_mode (machine_mode mode) { /* That is, all integer and the EQ, NE, ORDERED and UNORDERED float compares. */ @@ -1196,7 +1196,7 @@ mmix_rtx_costs (rtx x ATTRIBUTE_UNUSED, need to check that their constraints match, so say 3 for them. */ static int -mmix_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +mmix_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { @@ -1902,7 +1902,7 @@ mmix_dbx_register_number (unsigned regno) from insn-emit.c. */ rtx -mmix_get_hard_reg_initial_val (enum machine_mode mode, int regno) +mmix_get_hard_reg_initial_val (machine_mode mode, int regno) { return get_hard_reg_initial_val (mode, regno); } @@ -2447,7 +2447,7 @@ mmix_shiftable_wyde_value (uint64_t value) rtx mmix_gen_compare_reg (RTX_CODE code, rtx x, rtx y) { - enum machine_mode ccmode = SELECT_CC_MODE (code, x, y); + machine_mode ccmode = SELECT_CC_MODE (code, x, y); return gen_reg_rtx (ccmode); } @@ -2611,7 +2611,7 @@ mmix_output_condition (FILE *stream, const_rtx x, int reversed) struct cc_type_conv { - enum machine_mode cc_mode; + machine_mode cc_mode; /* Terminated with {UNKNOWN, NULL, NULL} */ const struct cc_conv *const convs; @@ -2669,7 +2669,7 @@ mmix_output_condition (FILE *stream, const_rtx x, int reversed) size_t i; int j; - enum machine_mode mode = GET_MODE (XEXP (x, 0)); + machine_mode mode = GET_MODE (XEXP (x, 0)); RTX_CODE cc = GET_CODE (x); for (i = 0; i < ARRAY_SIZE (cc_convs); i++) @@ -2747,9 +2747,9 @@ mmix_intval (const_rtx x) /* Worker function for TARGET_PROMOTE_FUNCTION_MODE. */ -enum machine_mode +machine_mode mmix_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, int *punsignedp ATTRIBUTE_UNUSED, const_tree fntype ATTRIBUTE_UNUSED, int for_return) diff --git a/gcc/config/mn10300/mn10300-protos.h b/gcc/config/mn10300/mn10300-protos.h index c63c9c5..14bd901 100644 --- a/gcc/config/mn10300/mn10300-protos.h +++ b/gcc/config/mn10300/mn10300-protos.h @@ -21,22 +21,22 @@ #ifdef RTX_CODE extern rtx mn10300_legitimize_pic_address (rtx, rtx); extern int mn10300_legitimate_pic_operand_p (rtx); -extern rtx mn10300_legitimize_reload_address (rtx, enum machine_mode, +extern rtx mn10300_legitimize_reload_address (rtx, machine_mode, int, int, int); extern bool mn10300_function_value_regno_p (const unsigned int); extern unsigned int mn10300_get_live_callee_saved_regs (unsigned int *); -extern bool mn10300_hard_regno_mode_ok (unsigned int, enum machine_mode); -extern bool mn10300_modes_tieable (enum machine_mode, enum machine_mode); +extern bool mn10300_hard_regno_mode_ok (unsigned int, machine_mode); +extern bool mn10300_modes_tieable (machine_mode, machine_mode); extern const char *mn10300_output_add (rtx[3], bool); extern void mn10300_print_operand (FILE *, rtx, int); extern void mn10300_print_operand_address (FILE *, rtx); extern void mn10300_print_reg_list (FILE *, int); -extern enum machine_mode mn10300_select_cc_mode (enum rtx_code, rtx, rtx); +extern machine_mode mn10300_select_cc_mode (enum rtx_code, rtx, rtx); extern unsigned int mn10300_store_multiple_regs (rtx); -extern int mn10300_symbolic_operand (rtx, enum machine_mode); -extern void mn10300_split_cbranch (enum machine_mode, rtx, rtx); +extern int mn10300_symbolic_operand (rtx, machine_mode); +extern void mn10300_split_cbranch (machine_mode, rtx, rtx); extern int mn10300_split_and_operand_count (rtx); -extern bool mn10300_match_ccmode (rtx, enum machine_mode); +extern bool mn10300_match_ccmode (rtx, machine_mode); #endif /* RTX_CODE */ extern bool mn10300_regno_in_class_p (unsigned, int, bool); diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c index b240fc1..3f9a7be 100644 --- a/gcc/config/mn10300/mn10300.c +++ b/gcc/config/mn10300/mn10300.c @@ -79,7 +79,7 @@ enum processor_type mn10300_tune_cpu = PROCESSOR_DEFAULT; #define CC_FLAG_C 4 #define CC_FLAG_V 8 -static int cc_flags_for_mode(enum machine_mode); +static int cc_flags_for_mode(machine_mode); static int cc_flags_for_code(enum rtx_code); /* Implement TARGET_OPTION_OVERRIDE. */ @@ -160,7 +160,7 @@ mn10300_print_operand (FILE *file, rtx x, int code) case 'B': { enum rtx_code cmp = GET_CODE (x); - enum machine_mode mode = GET_MODE (XEXP (x, 0)); + machine_mode mode = GET_MODE (XEXP (x, 0)); const char *str; int have_flags; @@ -1369,7 +1369,7 @@ mn10300_preferred_output_reload_class (rtx x, reg_class_t rclass) static reg_class_t mn10300_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { enum reg_class rclass = (enum reg_class) rclass_i; enum reg_class xclass = NO_REGS; @@ -1539,7 +1539,7 @@ mn10300_va_start (tree valist, rtx nextarg) static bool mn10300_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { unsigned HOST_WIDE_INT size; @@ -1556,7 +1556,7 @@ mn10300_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, from a function. If the result is NULL_RTX, the argument is pushed. */ static rtx -mn10300_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +mn10300_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1605,7 +1605,7 @@ mn10300_function_arg (cumulative_args_t cum_v, enum machine_mode mode, (TYPE is null for libcalls where that information may not be available.) */ static void -mn10300_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +mn10300_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1619,7 +1619,7 @@ mn10300_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, partially in registers and partially in memory. */ static int -mn10300_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +mn10300_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1665,7 +1665,7 @@ mn10300_function_value (const_tree valtype, bool outgoing) { rtx rv; - enum machine_mode mode = TYPE_MODE (valtype); + machine_mode mode = TYPE_MODE (valtype); if (! POINTER_TYPE_P (valtype)) return gen_rtx_REG (mode, FIRST_DATA_REGNUM); @@ -1689,7 +1689,7 @@ mn10300_function_value (const_tree valtype, /* Implements TARGET_LIBCALL_VALUE. */ static rtx -mn10300_libcall_value (enum machine_mode mode, +mn10300_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, FIRST_DATA_REGNUM); @@ -1801,7 +1801,7 @@ mn10300_output_add (rtx operands[3], bool need_flags) int mn10300_symbolic_operand (rtx op, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { switch (GET_CODE (op)) { @@ -1833,7 +1833,7 @@ mn10300_symbolic_operand (rtx op, static rtx mn10300_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (flag_pic && ! mn10300_legitimate_pic_operand_p (x)) x = mn10300_legitimize_pic_address (oldx, NULL_RTX); @@ -1964,7 +1964,7 @@ mn10300_legitimate_pic_operand_p (rtx x) function record_unscaled_index_insn_codes. */ static bool -mn10300_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +mn10300_legitimate_address_p (machine_mode mode, rtx x, bool strict) { rtx base, index; @@ -2032,7 +2032,7 @@ mn10300_regno_in_class_p (unsigned regno, int rclass, bool strict) rtx mn10300_legitimize_reload_address (rtx x, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -2069,7 +2069,7 @@ mn10300_legitimize_reload_address (rtx x, those here. */ static bool -mn10300_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +mn10300_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { switch (GET_CODE (x)) { @@ -2175,7 +2175,7 @@ mn10300_delegitimize_address (rtx orig_x) with an address register. */ static int -mn10300_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, +mn10300_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed) { HOST_WIDE_INT i; @@ -2240,7 +2240,7 @@ mn10300_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, early exit from reload meaning no work is required. */ static int -mn10300_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +mn10300_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t ifrom, reg_class_t ito) { enum reg_class from = (enum reg_class) ifrom; @@ -2327,7 +2327,7 @@ mn10300_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, move cost above. This is not a problem. */ static int -mn10300_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +mn10300_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t iclass, bool in ATTRIBUTE_UNUSED) { enum reg_class rclass = (enum reg_class) iclass; @@ -2639,7 +2639,7 @@ mn10300_can_output_mi_thunk (const_tree thunk_fndecl ATTRIBUTE_UNUSED, } bool -mn10300_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) +mn10300_hard_regno_mode_ok (unsigned int regno, machine_mode mode) { if (REGNO_REG_CLASS (regno) == FP_REGS || REGNO_REG_CLASS (regno) == FP_ACC_REGS) @@ -2661,7 +2661,7 @@ mn10300_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) } bool -mn10300_modes_tieable (enum machine_mode mode1, enum machine_mode mode2) +mn10300_modes_tieable (machine_mode mode1, machine_mode mode2) { if (GET_MODE_CLASS (mode1) == MODE_FLOAT && GET_MODE_CLASS (mode2) != MODE_FLOAT) @@ -2680,7 +2680,7 @@ mn10300_modes_tieable (enum machine_mode mode1, enum machine_mode mode2) } static int -cc_flags_for_mode (enum machine_mode mode) +cc_flags_for_mode (machine_mode mode) { switch (mode) { @@ -2738,7 +2738,7 @@ cc_flags_for_code (enum rtx_code code) } } -enum machine_mode +machine_mode mn10300_select_cc_mode (enum rtx_code code, rtx x, rtx y ATTRIBUTE_UNUSED) { int req; @@ -2884,7 +2884,7 @@ mn10300_md_asm_clobbers (tree outputs ATTRIBUTE_UNUSED, /* A helper function for splitting cbranch patterns after reload. */ void -mn10300_split_cbranch (enum machine_mode cmp_mode, rtx cmp_op, rtx label_ref) +mn10300_split_cbranch (machine_mode cmp_mode, rtx cmp_op, rtx label_ref) { rtx flags, x; @@ -2902,10 +2902,10 @@ mn10300_split_cbranch (enum machine_mode cmp_mode, rtx cmp_op, rtx label_ref) /* A helper function for matching parallels that set the flags. */ bool -mn10300_match_ccmode (rtx insn, enum machine_mode cc_mode) +mn10300_match_ccmode (rtx insn, machine_mode cc_mode) { rtx op1, flags; - enum machine_mode flags_mode; + machine_mode flags_mode; gcc_checking_assert (XVECLEN (PATTERN (insn), 0) == 2); diff --git a/gcc/config/moxie/moxie.c b/gcc/config/moxie/moxie.c index fdaa05f..ef1ed8f 100644 --- a/gcc/config/moxie/moxie.c +++ b/gcc/config/moxie/moxie.c @@ -101,7 +101,7 @@ moxie_function_value (const_tree valtype, We always return values in register $r0 for moxie. */ static rtx -moxie_libcall_value (enum machine_mode mode, +moxie_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, MOXIE_R0); @@ -402,7 +402,7 @@ moxie_initial_elimination_offset (int from, int to) static void moxie_setup_incoming_varargs (cumulative_args_t cum_v, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, tree type ATTRIBUTE_UNUSED, int *pretend_size, int no_rtl) { @@ -441,7 +441,7 @@ moxie_fixed_condition_code_regs (unsigned int *p1, unsigned int *p2) NULL_RTX if there's no more space. */ static rtx -moxie_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +moxie_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -458,7 +458,7 @@ moxie_function_arg (cumulative_args_t cum_v, enum machine_mode mode, : (unsigned) int_size_in_bytes (TYPE)) static void -moxie_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +moxie_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -473,7 +473,7 @@ moxie_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, static bool moxie_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { unsigned HOST_WIDE_INT size; @@ -496,7 +496,7 @@ moxie_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, static int moxie_arg_partial_bytes (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); diff --git a/gcc/config/msp430/msp430-protos.h b/gcc/config/msp430/msp430-protos.h index 6cdce09..88037d0 100644 --- a/gcc/config/msp430/msp430-protos.h +++ b/gcc/config/msp430/msp430-protos.h @@ -27,11 +27,11 @@ void msp430_expand_epilogue (int); void msp430_expand_helper (rtx *operands, const char *, bool); void msp430_expand_prologue (void); const char * msp430x_extendhisi (rtx *); -void msp430_fixup_compare_operands (enum machine_mode, rtx *); -int msp430_hard_regno_mode_ok (int, enum machine_mode); -int msp430_hard_regno_nregs (int, enum machine_mode); -int msp430_hard_regno_nregs_has_padding (int, enum machine_mode); -int msp430_hard_regno_nregs_with_padding (int, enum machine_mode); +void msp430_fixup_compare_operands (machine_mode, rtx *); +int msp430_hard_regno_mode_ok (int, machine_mode); +int msp430_hard_regno_nregs (int, machine_mode); +int msp430_hard_regno_nregs_has_padding (int, machine_mode); +int msp430_hard_regno_nregs_with_padding (int, machine_mode); bool msp430_hwmult_enabled (void); rtx msp430_incoming_return_addr_rtx (void); void msp430_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, int); @@ -39,13 +39,13 @@ int msp430_initial_elimination_offset (int, int); bool msp430_is_interrupt_func (void); const char * msp430x_logical_shift_right (rtx); const char * msp430_mcu_name (void); -bool msp430_modes_tieable_p (enum machine_mode, enum machine_mode); +bool msp430_modes_tieable_p (machine_mode, machine_mode); void msp430_output_labelref (FILE *, const char *); void msp430_register_pragmas (void); rtx msp430_return_addr_rtx (int); void msp430_split_movsi (rtx *); void msp430_start_function (FILE *, const char *, tree); -rtx msp430_subreg (enum machine_mode, rtx, enum machine_mode, int); +rtx msp430_subreg (machine_mode, rtx, machine_mode, int); bool msp430_use_f5_series_hwmult (void); #endif /* GCC_MSP430_PROTOS_H */ diff --git a/gcc/config/msp430/msp430.c b/gcc/config/msp430/msp430.c index 594967b..703bf9b 100644 --- a/gcc/config/msp430/msp430.c +++ b/gcc/config/msp430/msp430.c @@ -246,7 +246,7 @@ msp430_option_override (void) #define TARGET_SCALAR_MODE_SUPPORTED_P msp430_scalar_mode_supported_p static bool -msp430_scalar_mode_supported_p (enum machine_mode m) +msp430_scalar_mode_supported_p (machine_mode m) { if (m == PSImode && msp430x) return true; @@ -278,7 +278,7 @@ msp430_ms_bitfield_layout_p (const_tree record_type ATTRIBUTE_UNUSED) PSImode value, but not an SImode value. */ int msp430_hard_regno_nregs (int regno ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { if (mode == PSImode && msp430x) return 1; @@ -289,7 +289,7 @@ msp430_hard_regno_nregs (int regno ATTRIBUTE_UNUSED, /* Implements HARD_REGNO_NREGS_HAS_PADDING. */ int msp430_hard_regno_nregs_has_padding (int regno ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { if (mode == PSImode && msp430x) return 1; @@ -300,7 +300,7 @@ msp430_hard_regno_nregs_has_padding (int regno ATTRIBUTE_UNUSED, /* Implements HARD_REGNO_NREGS_WITH_PADDING. */ int msp430_hard_regno_nregs_with_padding (int regno ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { if (mode == PSImode) return 2; @@ -310,14 +310,14 @@ msp430_hard_regno_nregs_with_padding (int regno ATTRIBUTE_UNUSED, /* Implements HARD_REGNO_MODE_OK. */ int msp430_hard_regno_mode_ok (int regno ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { return regno <= (ARG_POINTER_REGNUM - msp430_hard_regno_nregs (regno, mode)); } /* Implements MODES_TIEABLE_P. */ bool -msp430_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) +msp430_modes_tieable_p (machine_mode mode1, machine_mode mode2) { if ((mode1 == PSImode || mode2 == SImode) || (mode1 == SImode || mode2 == PSImode)) @@ -397,7 +397,7 @@ msp430_initial_elimination_offset (int from, int to) #undef TARGET_ADDR_SPACE_ADDRESS_MODE #define TARGET_ADDR_SPACE_ADDRESS_MODE msp430_addr_space_pointer_mode -static enum machine_mode +static machine_mode msp430_addr_space_pointer_mode (addr_space_t addrspace) { switch (addrspace) @@ -417,7 +417,7 @@ msp430_addr_space_pointer_mode (addr_space_t addrspace) #undef TARGET_UNWIND_WORD_MODE #define TARGET_UNWIND_WORD_MODE msp430_unwind_word_mode -static enum machine_mode +static machine_mode msp430_unwind_word_mode (void) { return TARGET_LARGE ? PSImode : HImode; @@ -533,7 +533,7 @@ msp430_function_value (const_tree ret_type, #define TARGET_LIBCALL_VALUE msp430_libcall_value rtx -msp430_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +msp430_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, 12); } @@ -566,7 +566,7 @@ msp430_init_cumulative_args (CUMULATIVE_ARGS *ca, code that determines where an argument will be passed. */ static void msp430_evaluate_arg (cumulative_args_t cap, - enum machine_mode mode, + machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named) { @@ -651,7 +651,7 @@ msp430_promote_prototypes (const_tree fntype ATTRIBUTE_UNUSED) rtx msp430_function_arg (cumulative_args_t cap, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named) { @@ -670,7 +670,7 @@ msp430_function_arg (cumulative_args_t cap, int msp430_arg_partial_bytes (cumulative_args_t cap, - enum machine_mode mode, + machine_mode mode, tree type, bool named) { @@ -689,7 +689,7 @@ msp430_arg_partial_bytes (cumulative_args_t cap, static bool msp430_pass_by_reference (cumulative_args_t cap ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { @@ -703,7 +703,7 @@ msp430_pass_by_reference (cumulative_args_t cap ATTRIBUTE_UNUSED, static bool msp430_callee_copies (cumulative_args_t cap ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -715,7 +715,7 @@ msp430_callee_copies (cumulative_args_t cap ATTRIBUTE_UNUSED, void msp430_function_arg_advance (cumulative_args_t cap, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named) { @@ -735,7 +735,7 @@ msp430_function_arg_advance (cumulative_args_t cap, #define TARGET_FUNCTION_ARG_BOUNDARY msp430_function_arg_boundary static unsigned int -msp430_function_arg_boundary (enum machine_mode mode, const_tree type) +msp430_function_arg_boundary (machine_mode mode, const_tree type) { if (mode == BLKmode && int_size_in_bytes (type) > 1) @@ -751,7 +751,7 @@ msp430_function_arg_boundary (enum machine_mode mode, const_tree type) static bool msp430_return_in_memory (const_tree ret_type, const_tree fntype ATTRIBUTE_UNUSED) { - enum machine_mode mode = TYPE_MODE (ret_type); + machine_mode mode = TYPE_MODE (ret_type); if (mode == BLKmode || (fntype && TREE_CODE (TREE_TYPE (fntype)) == RECORD_TYPE) @@ -767,7 +767,7 @@ msp430_return_in_memory (const_tree ret_type, const_tree fntype ATTRIBUTE_UNUSED #undef TARGET_GET_RAW_ARG_MODE #define TARGET_GET_RAW_ARG_MODE msp430_get_raw_arg_mode -static enum machine_mode +static machine_mode msp430_get_raw_arg_mode (int regno) { return (regno == ARG_POINTER_REGNUM) ? VOIDmode : Pmode; @@ -776,7 +776,7 @@ msp430_get_raw_arg_mode (int regno) #undef TARGET_GET_RAW_RESULT_MODE #define TARGET_GET_RAW_RESULT_MODE msp430_get_raw_result_mode -static enum machine_mode +static machine_mode msp430_get_raw_result_mode (int regno ATTRIBUTE_UNUSED) { return Pmode; @@ -893,7 +893,7 @@ reg_ok_for_addr (rtx r, bool strict) } bool -msp430_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, +msp430_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED, bool strict ATTRIBUTE_UNUSED) { @@ -939,7 +939,7 @@ msp430_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, #define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P msp430_addr_space_legitimate_address_p bool -msp430_addr_space_legitimate_address_p (enum machine_mode mode, +msp430_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool strict, addr_space_t as ATTRIBUTE_UNUSED) @@ -985,7 +985,7 @@ msp430_asm_output_addr_const_extra (FILE *file, rtx x) #define TARGET_LEGITIMATE_CONSTANT_P msp430_legitimate_constant static bool -msp430_legitimate_constant (enum machine_mode mode, rtx x) +msp430_legitimate_constant (machine_mode mode, rtx x) { return ! CONST_INT_P (x) || mode != PSImode @@ -1538,7 +1538,7 @@ static rtx msp430_expand_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -1913,9 +1913,9 @@ msp430_expand_helper (rtx *operands, const char *helper_name, bool const_variant char *helper_const = NULL; int arg2 = 13; int arg1sz = 1; - enum machine_mode arg0mode = GET_MODE (operands[0]); - enum machine_mode arg1mode = GET_MODE (operands[1]); - enum machine_mode arg2mode = GET_MODE (operands[2]); + machine_mode arg0mode = GET_MODE (operands[0]); + machine_mode arg1mode = GET_MODE (operands[1]); + machine_mode arg2mode = GET_MODE (operands[2]); int have_430x = msp430x ? 1 : 0; if (CONST_INT_P (operands[2])) @@ -1980,7 +1980,7 @@ msp430_expand_helper (rtx *operands, const char *helper_name, bool const_variant /* Called by cbranch<mode>4 to coerce operands into usable forms. */ void -msp430_fixup_compare_operands (enum machine_mode my_mode, rtx * operands) +msp430_fixup_compare_operands (machine_mode my_mode, rtx * operands) { /* constants we're looking for, not constants which are allowed. */ int const_op_idx = 1; @@ -1997,7 +1997,7 @@ msp430_fixup_compare_operands (enum machine_mode my_mode, rtx * operands) need it to below, so we use this function for when we must get a valid subreg in a "natural" state. */ rtx -msp430_subreg (enum machine_mode mode, rtx r, enum machine_mode omode, int byte) +msp430_subreg (machine_mode mode, rtx r, machine_mode omode, int byte) { rtx rv; @@ -2005,7 +2005,7 @@ msp430_subreg (enum machine_mode mode, rtx r, enum machine_mode omode, int byte) && SUBREG_BYTE (r) == 0) { rtx ireg = SUBREG_REG (r); - enum machine_mode imode = GET_MODE (ireg); + machine_mode imode = GET_MODE (ireg); /* special case for (HI (SI (PSI ...), 0)) */ if (imode == PSImode diff --git a/gcc/config/nds32/nds32-cost.c b/gcc/config/nds32/nds32-cost.c index 0116dc3..907737c 100644 --- a/gcc/config/nds32/nds32-cost.c +++ b/gcc/config/nds32/nds32-cost.c @@ -204,7 +204,7 @@ size_cost: int nds32_address_cost_impl (rtx address, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed) { diff --git a/gcc/config/nds32/nds32-intrinsic.c b/gcc/config/nds32/nds32-intrinsic.c index 12fe1ce..4c45e96 100644 --- a/gcc/config/nds32/nds32-intrinsic.c +++ b/gcc/config/nds32/nds32-intrinsic.c @@ -211,7 +211,7 @@ rtx nds32_expand_builtin_impl (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); diff --git a/gcc/config/nds32/nds32-md-auxiliary.c b/gcc/config/nds32/nds32-md-auxiliary.c index 0d5a2d9..ca78283 100644 --- a/gcc/config/nds32/nds32-md-auxiliary.c +++ b/gcc/config/nds32/nds32-md-auxiliary.c @@ -91,7 +91,7 @@ nds32_byte_to_size (int byte) enum nds32_16bit_address_type nds32_mem_format (rtx op) { - enum machine_mode mode_test; + machine_mode mode_test; int val; int regno; @@ -817,7 +817,7 @@ nds32_output_stack_pop (rtx par_rtx ATTRIBUTE_UNUSED) const char * nds32_output_casesi_pc_relative (rtx *operands) { - enum machine_mode mode; + machine_mode mode; rtx diff_vec; diff_vec = PATTERN (NEXT_INSN (as_a <rtx_insn *> (operands[1]))); diff --git a/gcc/config/nds32/nds32-protos.h b/gcc/config/nds32/nds32-protos.h index 8984ea7..c456c40 100644 --- a/gcc/config/nds32/nds32-protos.h +++ b/gcc/config/nds32/nds32-protos.h @@ -30,8 +30,8 @@ extern void nds32_init_expanders (void); /* -- How Values Fit in Registers. */ -extern int nds32_hard_regno_nregs (int, enum machine_mode); -extern int nds32_hard_regno_mode_ok (int, enum machine_mode); +extern int nds32_hard_regno_nregs (int, machine_mode); +extern int nds32_hard_regno_mode_ok (int, machine_mode); /* Register Classes. */ @@ -66,7 +66,7 @@ extern void nds32_expand_epilogue_v3pop (void); /* Auxiliary functions for auxiliary macros in nds32.h. */ -extern bool nds32_ls_333_p (rtx, rtx, rtx, enum machine_mode); +extern bool nds32_ls_333_p (rtx, rtx, rtx, machine_mode); /* Auxiliary functions for expanding rtl used in nds32-multiple.md. */ @@ -128,7 +128,7 @@ extern int nds32_target_alignment (rtx); extern void nds32_init_builtins_impl (void); extern rtx nds32_expand_builtin_impl (tree, rtx, rtx, - enum machine_mode, int); + machine_mode, int); /* Auxiliary functions for ISR implementation. */ @@ -141,6 +141,6 @@ extern bool nds32_isr_function_p (tree); /* Auxiliary functions for cost calculation. */ extern bool nds32_rtx_costs_impl (rtx, int, int, int, int *, bool); -extern int nds32_address_cost_impl (rtx, enum machine_mode, addr_space_t, bool); +extern int nds32_address_cost_impl (rtx, machine_mode, addr_space_t, bool); /* ------------------------------------------------------------------------ */ diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c index 3c98e72..6fb2069 100644 --- a/gcc/config/nds32/nds32.c +++ b/gcc/config/nds32/nds32.c @@ -1019,7 +1019,7 @@ nds32_force_addi_stack_int (int full_value) /* Return true if MODE/TYPE need double word alignment. */ static bool -nds32_needs_double_word_align (enum machine_mode mode, const_tree type) +nds32_needs_double_word_align (machine_mode mode, const_tree type) { unsigned int align; @@ -1075,7 +1075,7 @@ nds32_address_register_rtx_p (rtx x, bool strict) INDEX : Check if this rtx is valid to be a index for address. STRICT : If it is true, we are in reload pass or after reload pass. */ static bool -nds32_legitimate_index_p (enum machine_mode outer_mode, +nds32_legitimate_index_p (machine_mode outer_mode, rtx index, bool strict) { @@ -1203,7 +1203,7 @@ nds32_legitimate_index_p (enum machine_mode outer_mode, static unsigned char nds32_class_max_nregs (reg_class_t rclass ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { /* Return the maximum number of consecutive registers needed to represent "mode" in a register of "rclass". */ @@ -1305,7 +1305,7 @@ nds32_can_eliminate (const int from_reg, const int to_reg) /* -- Passing Arguments in Registers. */ static rtx -nds32_function_arg (cumulative_args_t ca, enum machine_mode mode, +nds32_function_arg (cumulative_args_t ca, machine_mode mode, const_tree type, bool named) { unsigned int regno; @@ -1367,7 +1367,7 @@ nds32_function_arg (cumulative_args_t ca, enum machine_mode mode, } static bool -nds32_must_pass_in_stack (enum machine_mode mode, const_tree type) +nds32_must_pass_in_stack (machine_mode mode, const_tree type) { /* Return true if a type must be passed in memory. If it is NOT using hard float abi, small aggregates can be @@ -1380,7 +1380,7 @@ nds32_must_pass_in_stack (enum machine_mode mode, const_tree type) } static int -nds32_arg_partial_bytes (cumulative_args_t ca, enum machine_mode mode, +nds32_arg_partial_bytes (cumulative_args_t ca, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { /* Returns the number of bytes at the beginning of an argument that @@ -1424,10 +1424,10 @@ nds32_arg_partial_bytes (cumulative_args_t ca, enum machine_mode mode, } static void -nds32_function_arg_advance (cumulative_args_t ca, enum machine_mode mode, +nds32_function_arg_advance (cumulative_args_t ca, machine_mode mode, const_tree type, bool named) { - enum machine_mode sub_mode; + machine_mode sub_mode; CUMULATIVE_ARGS *cum = get_cumulative_args (ca); if (named) @@ -1470,7 +1470,7 @@ nds32_function_arg_advance (cumulative_args_t ca, enum machine_mode mode, } static unsigned int -nds32_function_arg_boundary (enum machine_mode mode, const_tree type) +nds32_function_arg_boundary (machine_mode mode, const_tree type) { return (nds32_needs_double_word_align (mode, type) ? NDS32_DOUBLE_WORD_ALIGNMENT @@ -1484,7 +1484,7 @@ nds32_function_value (const_tree ret_type, const_tree fn_decl_or_type ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; int unsignedp; mode = TYPE_MODE (ret_type); @@ -1496,7 +1496,7 @@ nds32_function_value (const_tree ret_type, } static rtx -nds32_libcall_value (enum machine_mode mode, +nds32_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, NDS32_GPR_RET_FIRST_REGNUM); @@ -1695,7 +1695,7 @@ nds32_warn_func_return (tree decl) static void nds32_setup_incoming_varargs (cumulative_args_t ca, - enum machine_mode mode, + machine_mode mode, tree type, int *pretend_args_size, int second_time ATTRIBUTE_UNUSED) @@ -1910,7 +1910,7 @@ nds32_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) /* Addressing Modes. */ static bool -nds32_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +nds32_legitimate_address_p (machine_mode mode, rtx x, bool strict) { /* For (mem:DI addr) or (mem:DF addr) case, we only allow 'addr' to be [reg], [symbol_ref], @@ -2043,7 +2043,7 @@ nds32_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) /* Describing Relative Costs of Operations. */ static int -nds32_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +nds32_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { @@ -2054,7 +2054,7 @@ nds32_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, } static int -nds32_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +nds32_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -2078,7 +2078,7 @@ nds32_rtx_costs (rtx x, static int nds32_address_cost (rtx address, - enum machine_mode mode, + machine_mode mode, addr_space_t as, bool speed) { @@ -2686,7 +2686,7 @@ static rtx nds32_expand_builtin (tree exp, rtx target, rtx subtarget, - enum machine_mode mode, + machine_mode mode, int ignore) { return nds32_expand_builtin_impl (exp, target, subtarget, mode, ignore); @@ -2714,13 +2714,13 @@ nds32_init_expanders (void) int nds32_hard_regno_nregs (int regno ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { return ((GET_MODE_SIZE (mode) + UNITS_PER_WORD - 1) / UNITS_PER_WORD); } int -nds32_hard_regno_mode_ok (int regno, enum machine_mode mode) +nds32_hard_regno_mode_ok (int regno, machine_mode mode) { /* Restrict double-word quantities to even register pairs. */ if (HARD_REGNO_NREGS (regno, mode) == 1 @@ -3383,7 +3383,7 @@ nds32_expand_epilogue_v3pop (void) This is auxiliary extern function for auxiliary macro in nds32.h. Because it is a little complicated, we use function instead of macro. */ bool -nds32_ls_333_p (rtx rt, rtx ra, rtx imm, enum machine_mode mode) +nds32_ls_333_p (rtx rt, rtx ra, rtx imm, machine_mode mode) { if (REGNO_REG_CLASS (REGNO (rt)) == LOW_REGS && REGNO_REG_CLASS (REGNO (ra)) == LOW_REGS) diff --git a/gcc/config/nios2/nios2-protos.h b/gcc/config/nios2/nios2-protos.h index 8782954..0c38fb9 100644 --- a/gcc/config/nios2/nios2-protos.h +++ b/gcc/config/nios2/nios2-protos.h @@ -29,15 +29,15 @@ extern void nios2_expand_epilogue (bool); extern void nios2_function_profiler (FILE *, int); #ifdef RTX_CODE -extern int nios2_emit_move_sequence (rtx *, enum machine_mode); -extern void nios2_emit_expensive_div (rtx *, enum machine_mode); +extern int nios2_emit_move_sequence (rtx *, machine_mode); +extern void nios2_emit_expensive_div (rtx *, machine_mode); extern void nios2_adjust_call_address (rtx *); extern rtx nios2_get_return_address (int); extern void nios2_set_return_address (rtx, rtx); -extern bool nios2_validate_compare (enum machine_mode, rtx *, rtx *, rtx *); -extern bool nios2_validate_fpu_compare (enum machine_mode, rtx *, rtx *, rtx *, +extern bool nios2_validate_compare (machine_mode, rtx *, rtx *, rtx *); +extern bool nios2_validate_fpu_compare (machine_mode, rtx *, rtx *, rtx *, bool); extern bool nios2_fpu_insn_enabled (enum n2fpu_code); @@ -51,8 +51,8 @@ extern bool nios2_unspec_reloc_p (rtx); #ifdef TREE_CODE #ifdef ARGS_SIZE_RTX /* expr.h defines both ARGS_SIZE_RTX and `enum direction' */ -extern enum direction nios2_function_arg_padding (enum machine_mode, const_tree); -extern enum direction nios2_block_reg_padding (enum machine_mode, tree, int); +extern enum direction nios2_function_arg_padding (machine_mode, const_tree); +extern enum direction nios2_block_reg_padding (machine_mode, tree, int); #endif /* ARGS_SIZE_RTX */ #endif /* TREE_CODE */ diff --git a/gcc/config/nios2/nios2.c b/gcc/config/nios2/nios2.c index c5e6cc6..03451fe 100644 --- a/gcc/config/nios2/nios2.c +++ b/gcc/config/nios2/nios2.c @@ -334,7 +334,7 @@ nios2_fpu_insn_enabled (enum n2fpu_code code) settings. */ static bool -nios2_fpu_compare_enabled (enum rtx_code cond, enum machine_mode mode) +nios2_fpu_compare_enabled (enum rtx_code cond, machine_mode mode) { if (mode == SFmode) switch (cond) @@ -1313,7 +1313,7 @@ nios2_legitimize_tls_address (rtx loc) sdata section we can save even more cycles by doing things gp relative. */ void -nios2_emit_expensive_div (rtx *operands, enum machine_mode mode) +nios2_emit_expensive_div (rtx *operands, machine_mode mode) { rtx or_result, shift_left_result; rtx lookup_value; @@ -1380,7 +1380,7 @@ nios2_emit_expensive_div (rtx *operands, enum machine_mode mode) static void nios2_alternate_compare_const (enum rtx_code code, rtx op, enum rtx_code *alt_code, rtx *alt_op, - enum machine_mode mode) + machine_mode mode) { HOST_WIDE_INT opval = INTVAL (op); enum rtx_code scode = signed_condition (code); @@ -1433,7 +1433,7 @@ nios2_valid_compare_const_p (enum rtx_code code, rtx op) Returns true if FPU compare can be done. */ bool -nios2_validate_fpu_compare (enum machine_mode mode, rtx *cmp, rtx *op1, rtx *op2, +nios2_validate_fpu_compare (machine_mode mode, rtx *cmp, rtx *op1, rtx *op2, bool modify_p) { bool rev_p = false; @@ -1466,7 +1466,7 @@ nios2_validate_fpu_compare (enum machine_mode mode, rtx *cmp, rtx *op1, rtx *op2 /* Checks and modifies the comparison in *CMP, *OP1, and *OP2 into valid nios2 supported form. Returns true if success. */ bool -nios2_validate_compare (enum machine_mode mode, rtx *cmp, rtx *op1, rtx *op2) +nios2_validate_compare (machine_mode mode, rtx *cmp, rtx *op1, rtx *op2) { enum rtx_code code = GET_CODE (*cmp); enum rtx_code alt_code; @@ -1525,7 +1525,7 @@ nios2_validate_compare (enum machine_mode mode, rtx *cmp, rtx *op1, rtx *op2) /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ static bool -nios2_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +nios2_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { rtx base, offset; split_const (x, &base, &offset); @@ -1534,7 +1534,7 @@ nios2_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -nios2_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +nios2_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return nios2_legitimate_constant_p (mode, x) == false; } @@ -1580,7 +1580,7 @@ nios2_valid_addr_expr_p (rtx base, rtx offset, bool strict_p) /* Implement TARGET_LEGITIMATE_ADDRESS_P. */ static bool -nios2_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, +nios2_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, rtx operand, bool strict_p) { switch (GET_CODE (operand)) @@ -1784,7 +1784,7 @@ nios2_legitimize_constant_address (rtx addr) /* Implement TARGET_LEGITIMIZE_ADDRESS. */ static rtx nios2_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (CONSTANT_P (x)) return nios2_legitimize_constant_address (x); @@ -1857,7 +1857,7 @@ nios2_delegitimize_address (rtx x) /* Main expander function for RTL moves. */ int -nios2_emit_move_sequence (rtx *operands, enum machine_mode mode) +nios2_emit_move_sequence (rtx *operands, machine_mode mode) { rtx to = operands[0]; rtx from = operands[1]; @@ -2184,8 +2184,8 @@ nios2_fpu_insn_asm (enum n2fpu_code code) int num_operands = N2FPU (code).num_operands; const char *insn_name = N2FPU_NAME (code); tree ftype = nios2_ftype (N2FPU_FTCODE (code)); - enum machine_mode dst_mode = TYPE_MODE (TREE_TYPE (ftype)); - enum machine_mode src_mode = TYPE_MODE (TREE_VALUE (TYPE_ARG_TYPES (ftype))); + machine_mode dst_mode = TYPE_MODE (TREE_TYPE (ftype)); + machine_mode src_mode = TYPE_MODE (TREE_VALUE (TYPE_ARG_TYPES (ftype))); /* Prepare X register for DF input operands. */ if (GET_MODE_SIZE (src_mode) == 8 && num_operands == 3) @@ -2274,7 +2274,7 @@ nios2_fpu_insn_asm (enum n2fpu_code code) (otherwise it is an extra parameter matching an ellipsis). */ static rtx -nios2_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +nios2_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -2293,7 +2293,7 @@ nios2_function_arg (cumulative_args_t cum_v, enum machine_mode mode, static int nios2_arg_partial_bytes (cumulative_args_t cum_v, - enum machine_mode mode, tree type ATTRIBUTE_UNUSED, + machine_mode mode, tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -2322,7 +2322,7 @@ nios2_arg_partial_bytes (cumulative_args_t cum_v, may not be available. */ static void -nios2_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +nios2_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -2347,7 +2347,7 @@ nios2_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, } enum direction -nios2_function_arg_padding (enum machine_mode mode, const_tree type) +nios2_function_arg_padding (machine_mode mode, const_tree type) { /* On little-endian targets, the first byte of every stack argument is passed in the first byte of the stack slot. */ @@ -2370,7 +2370,7 @@ nios2_function_arg_padding (enum machine_mode mode, const_tree type) } enum direction -nios2_block_reg_padding (enum machine_mode mode, tree type, +nios2_block_reg_padding (machine_mode mode, tree type, int first ATTRIBUTE_UNUSED) { return nios2_function_arg_padding (mode, type); @@ -2402,7 +2402,7 @@ nios2_function_value (const_tree ret_type, const_tree fn ATTRIBUTE_UNUSED, /* Implement TARGET_LIBCALL_VALUE. */ static rtx -nios2_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +nios2_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, FIRST_RETVAL_REGNO); } @@ -2426,7 +2426,7 @@ nios2_return_in_memory (const_tree type, const_tree fntype ATTRIBUTE_UNUSED) own va_arg type. */ static void nios2_setup_incoming_varargs (cumulative_args_t cum_v, - enum machine_mode mode, tree type, + machine_mode mode, tree type, int *pretend_size, int second_time) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -2484,7 +2484,7 @@ nios2_expand_fpu_builtin (tree exp, unsigned int code, rtx target) enum insn_code icode = N2FPU_ICODE (code); int nargs, argno, opno = 0; int num_operands = N2FPU (code).num_operands; - enum machine_mode dst_mode = TYPE_MODE (TREE_TYPE (exp)); + machine_mode dst_mode = TYPE_MODE (TREE_TYPE (exp)); bool has_target_p = (dst_mode != VOIDmode); if (N2FPU_N (code) < 0) @@ -2573,7 +2573,7 @@ static rtx nios2_expand_custom_builtin (tree exp, unsigned int index, rtx target) { bool has_target_p = (TREE_TYPE (exp) != void_type_node); - enum machine_mode tmode = VOIDmode; + machine_mode tmode = VOIDmode; int nargs, argno; rtx value, insn, unspec_args[3]; tree arg; @@ -2745,7 +2745,7 @@ nios2_expand_ldstio_builtin (tree exp, rtx target, bool has_target_p; rtx addr, mem, val; struct expand_operand ops[MAX_RECOG_OPERANDS]; - enum machine_mode mode = insn_data[d->icode].operand[0].mode; + machine_mode mode = insn_data[d->icode].operand[0].mode; addr = expand_normal (CALL_EXPR_ARG (exp, 0)); mem = gen_rtx_MEM (mode, addr); @@ -2808,7 +2808,7 @@ nios2_expand_rdwrctl_builtin (tree exp, rtx target, static rtx nios2_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); diff --git a/gcc/config/pa/pa-protos.h b/gcc/config/pa/pa-protos.h index cf78554..80e1efe 100644 --- a/gcc/config/pa/pa-protos.h +++ b/gcc/config/pa/pa-protos.h @@ -57,14 +57,14 @@ extern int pa_adjust_insn_length (rtx_insn *, int); extern int pa_fmpyaddoperands (rtx *); extern int pa_fmpysuboperands (rtx *); extern void pa_emit_bcond_fp (rtx[]); -extern int pa_emit_move_sequence (rtx *, enum machine_mode, rtx); +extern int pa_emit_move_sequence (rtx *, machine_mode, rtx); extern int pa_emit_hpdiv_const (rtx *, int); extern int pa_is_function_label_plus_const (rtx); extern int pa_fpstore_bypass_p (rtx_insn *, rtx_insn *); extern int pa_attr_length_millicode_call (rtx_insn *); extern int pa_attr_length_call (rtx_insn *, int); extern int pa_attr_length_indirect_call (rtx_insn *); -extern rtx pa_legitimize_reload_address (rtx, enum machine_mode, +extern rtx pa_legitimize_reload_address (rtx, machine_mode, int, int, int); /* Declare functions defined in pa.c and used in templates. */ @@ -74,7 +74,7 @@ extern rtx pa_return_addr_rtx (int, rtx); #ifdef ARGS_SIZE_RTX /* expr.h defines ARGS_SIZE_RTX and `enum direction' */ #ifdef TREE_CODE -extern enum direction pa_function_arg_padding (enum machine_mode, const_tree); +extern enum direction pa_function_arg_padding (machine_mode, const_tree); #endif #endif /* ARGS_SIZE_RTX */ extern int pa_insn_refs_are_delayed (rtx_insn *); @@ -110,9 +110,9 @@ extern void pa_asm_output_aligned_local (FILE *, const char *, unsigned HOST_WIDE_INT, unsigned int); extern void pa_hpux_asm_output_external (FILE *, tree, const char *); -extern bool pa_cannot_change_mode_class (enum machine_mode, enum machine_mode, +extern bool pa_cannot_change_mode_class (machine_mode, machine_mode, enum reg_class); -extern bool pa_modes_tieable_p (enum machine_mode, enum machine_mode); +extern bool pa_modes_tieable_p (machine_mode, machine_mode); extern HOST_WIDE_INT pa_initial_elimination_offset (int, int); extern const int pa_magic_milli[]; diff --git a/gcc/config/pa/pa.c b/gcc/config/pa/pa.c index 9ab6f23..7072722 100644 --- a/gcc/config/pa/pa.c +++ b/gcc/config/pa/pa.c @@ -72,8 +72,8 @@ along with GCC; see the file COPYING3. If not see int pa_fpstore_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn) { - enum machine_mode store_mode; - enum machine_mode other_mode; + machine_mode store_mode; + machine_mode other_mode; rtx set; if (recog_memoized (in_insn) < 0 @@ -105,11 +105,11 @@ pa_fpstore_bypass_p (rtx_insn *out_insn, rtx_insn *in_insn) static void pa_option_override (void); static void copy_reg_pointer (rtx, rtx); static void fix_range (const char *); -static int hppa_register_move_cost (enum machine_mode mode, reg_class_t, +static int hppa_register_move_cost (machine_mode mode, reg_class_t, reg_class_t); -static int hppa_address_cost (rtx, enum machine_mode mode, addr_space_t, bool); +static int hppa_address_cost (rtx, machine_mode mode, addr_space_t, bool); static bool hppa_rtx_costs (rtx, int, int, int, int *, bool); -static inline rtx force_mode (enum machine_mode, rtx); +static inline rtx force_mode (machine_mode, rtx); static void pa_reorg (void); static void pa_combine_instructions (void); static int pa_can_combine_p (rtx_insn *, rtx_insn *, rtx_insn *, int, rtx, @@ -126,7 +126,7 @@ static void store_reg_modify (int, int, HOST_WIDE_INT); static void load_reg (int, HOST_WIDE_INT, int); static void set_reg_plus_d (int, int, HOST_WIDE_INT, int); static rtx pa_function_value (const_tree, const_tree, bool); -static rtx pa_libcall_value (enum machine_mode, const_rtx); +static rtx pa_libcall_value (machine_mode, const_rtx); static bool pa_function_value_regno_p (const unsigned int); static void pa_output_function_prologue (FILE *, HOST_WIDE_INT); static void update_total_code_bytes (unsigned int); @@ -150,15 +150,15 @@ static void pa_asm_out_constructor (rtx, int); static void pa_asm_out_destructor (rtx, int); #endif static void pa_init_builtins (void); -static rtx pa_expand_builtin (tree, rtx, rtx, enum machine_mode mode, int); +static rtx pa_expand_builtin (tree, rtx, rtx, machine_mode mode, int); static rtx hppa_builtin_saveregs (void); static void hppa_va_start (tree, rtx); static tree hppa_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *); -static bool pa_scalar_mode_supported_p (enum machine_mode); +static bool pa_scalar_mode_supported_p (machine_mode); static bool pa_commutative_p (const_rtx x, int outer_code); static void copy_fp_args (rtx) ATTRIBUTE_UNUSED; static int length_fp_args (rtx) ATTRIBUTE_UNUSED; -static rtx hppa_legitimize_address (rtx, rtx, enum machine_mode); +static rtx hppa_legitimize_address (rtx, rtx, machine_mode); static inline void pa_file_start_level (void) ATTRIBUTE_UNUSED; static inline void pa_file_start_space (int) ATTRIBUTE_UNUSED; static inline void pa_file_start_file (int) ATTRIBUTE_UNUSED; @@ -175,22 +175,22 @@ static void pa_hpux_file_end (void); #endif static void pa_init_libfuncs (void); static rtx pa_struct_value_rtx (tree, int); -static bool pa_pass_by_reference (cumulative_args_t, enum machine_mode, +static bool pa_pass_by_reference (cumulative_args_t, machine_mode, const_tree, bool); -static int pa_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static int pa_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static void pa_function_arg_advance (cumulative_args_t, enum machine_mode, +static void pa_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static rtx pa_function_arg (cumulative_args_t, enum machine_mode, +static rtx pa_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static unsigned int pa_function_arg_boundary (enum machine_mode, const_tree); +static unsigned int pa_function_arg_boundary (machine_mode, const_tree); static struct machine_function * pa_init_machine_status (void); static reg_class_t pa_secondary_reload (bool, rtx, reg_class_t, - enum machine_mode, + machine_mode, secondary_reload_info *); static void pa_extra_live_on_entry (bitmap); -static enum machine_mode pa_promote_function_mode (const_tree, - enum machine_mode, int *, +static machine_mode pa_promote_function_mode (const_tree, + machine_mode, int *, const_tree, int); static void pa_asm_trampoline_template (FILE *); @@ -201,12 +201,12 @@ static bool pa_print_operand_punct_valid_p (unsigned char); static rtx pa_internal_arg_pointer (void); static bool pa_can_eliminate (const int, const int); static void pa_conditional_register_usage (void); -static enum machine_mode pa_c_mode_for_suffix (char); +static machine_mode pa_c_mode_for_suffix (char); static section *pa_function_section (tree, enum node_frequency, bool, bool); -static bool pa_cannot_force_const_mem (enum machine_mode, rtx); -static bool pa_legitimate_constant_p (enum machine_mode, rtx); +static bool pa_cannot_force_const_mem (machine_mode, rtx); +static bool pa_legitimate_constant_p (machine_mode, rtx); static unsigned int pa_section_type_flags (tree, const char *, int); -static bool pa_legitimate_address_p (enum machine_mode, rtx, bool); +static bool pa_legitimate_address_p (machine_mode, rtx, bool); /* The following extra sections are only used for SOM. */ static GTY(()) section *som_readonly_data_section; @@ -629,7 +629,7 @@ pa_init_builtins (void) static rtx pa_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -644,7 +644,7 @@ pa_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, case PA_BUILTIN_INFQ: case PA_BUILTIN_HUGE_VALQ: { - enum machine_mode target_mode = TYPE_MODE (TREE_TYPE (exp)); + machine_mode target_mode = TYPE_MODE (TREE_TYPE (exp)); REAL_VALUE_TYPE inf; rtx tmp; @@ -766,7 +766,7 @@ pa_ior_mask_p (unsigned HOST_WIDE_INT mask) than one register, we lose. */ static rtx -legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) +legitimize_pic_address (rtx orig, machine_mode mode, rtx reg) { rtx pic_ref = orig; @@ -1026,7 +1026,7 @@ legitimize_tls_address (rtx addr) rtx hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { rtx orig = x; @@ -1391,7 +1391,7 @@ hppa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, Other copies are reasonably cheap. */ static int -hppa_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +hppa_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { if (from == SHIFT_REGS) @@ -1414,7 +1414,7 @@ hppa_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, as pa_legitimate_address_p. */ static int -hppa_address_cost (rtx X, enum machine_mode mode ATTRIBUTE_UNUSED, +hppa_address_cost (rtx X, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -1537,7 +1537,7 @@ hppa_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, /* Ensure mode of ORIG, a REG rtx, is MODE. Returns either ORIG or a new rtx with the correct mode. */ static inline rtx -force_mode (enum machine_mode mode, rtx orig) +force_mode (machine_mode mode, rtx orig) { if (mode == GET_MODE (orig)) return orig; @@ -1550,7 +1550,7 @@ force_mode (enum machine_mode mode, rtx orig) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -pa_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +pa_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return tls_referenced_p (x); } @@ -1566,7 +1566,7 @@ pa_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) of SCRATCH_REG in the proper mode. */ int -pa_emit_move_sequence (rtx *operands, enum machine_mode mode, rtx scratch_reg) +pa_emit_move_sequence (rtx *operands, machine_mode mode, rtx scratch_reg) { register rtx operand0 = operands[0]; register rtx operand1 = operands[1]; @@ -5829,7 +5829,7 @@ void pa_output_arg_descriptor (rtx call_insn) { const char *arg_regs[4]; - enum machine_mode arg_mode; + machine_mode arg_mode; rtx link; int i, output_flag = 0; int regno; @@ -5905,7 +5905,7 @@ pa_output_arg_descriptor (rtx call_insn) static reg_class_t pa_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { int regno; enum reg_class rclass = (enum reg_class) rclass_i; @@ -6093,7 +6093,7 @@ pa_eh_return_handler_rtx (void) static bool pa_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { HOST_WIDE_INT size; @@ -6110,7 +6110,7 @@ pa_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, } enum direction -pa_function_arg_padding (enum machine_mode mode, const_tree type) +pa_function_arg_padding (machine_mode mode, const_tree type) { if (mode == BLKmode || (TARGET_64BIT @@ -6291,7 +6291,7 @@ hppa_gimplify_va_arg_expr (tree valist, tree type, gimple_seq *pre_p, 2 * BITS_PER_WORD isn't equal LONG_LONG_TYPE_SIZE. */ static bool -pa_scalar_mode_supported_p (enum machine_mode mode) +pa_scalar_mode_supported_p (machine_mode mode) { int precision = GET_MODE_PRECISION (mode); @@ -8478,7 +8478,7 @@ pa_commutative_p (const_rtx x, int outer_code) int pa_fmpyaddoperands (rtx *operands) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); /* Must be a floating point mode. */ if (mode != SFmode && mode != DFmode) @@ -8656,7 +8656,7 @@ pa_asm_output_aligned_local (FILE *stream, int pa_fmpysuboperands (rtx *operands) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); /* Must be a floating point mode. */ if (mode != SFmode && mode != DFmode) @@ -9144,9 +9144,9 @@ pa_insn_refs_are_delayed (rtx_insn *insn) /* Promote the return value, but not the arguments. */ -static enum machine_mode +static machine_mode pa_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, int *punsignedp ATTRIBUTE_UNUSED, const_tree fntype ATTRIBUTE_UNUSED, int for_return) @@ -9170,7 +9170,7 @@ pa_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode valmode; + machine_mode valmode; if (AGGREGATE_TYPE_P (valtype) || TREE_CODE (valtype) == COMPLEX_TYPE @@ -9235,7 +9235,7 @@ pa_function_value (const_tree valtype, /* Implement the TARGET_LIBCALL_VALUE hook. */ static rtx -pa_libcall_value (enum machine_mode mode, +pa_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { if (! TARGET_SOFT_FLOAT @@ -9262,7 +9262,7 @@ pa_function_value_regno_p (const unsigned int regno) (TYPE is null for libcalls where that information may not be available.) */ static void -pa_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +pa_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -9284,7 +9284,7 @@ pa_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, ??? We might want to restructure this so that it looks more like other ports. */ static rtx -pa_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +pa_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -9480,7 +9480,7 @@ pa_function_arg (cumulative_args_t cum_v, enum machine_mode mode, /* Arguments larger than one word are double word aligned. */ static unsigned int -pa_function_arg_boundary (enum machine_mode mode, const_tree type) +pa_function_arg_boundary (machine_mode mode, const_tree type) { bool singleword = (type ? (integer_zerop (TYPE_SIZE (type)) @@ -9495,7 +9495,7 @@ pa_function_arg_boundary (enum machine_mode mode, const_tree type) then this routine should return zero. */ static int -pa_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +pa_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -9780,7 +9780,7 @@ pa_hpux_file_end (void) in register class RCLASS is invalid. */ bool -pa_cannot_change_mode_class (enum machine_mode from, enum machine_mode to, +pa_cannot_change_mode_class (machine_mode from, machine_mode to, enum reg_class rclass) { if (from == to) @@ -9825,7 +9825,7 @@ pa_cannot_change_mode_class (enum machine_mode from, enum machine_mode to, in the floating-point registers. */ bool -pa_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) +pa_modes_tieable_p (machine_mode mode1, machine_mode mode2) { /* Don't tie modes in different classes. */ if (GET_MODE_CLASS (mode1) != GET_MODE_CLASS (mode2)) @@ -10091,7 +10091,7 @@ pa_conditional_register_usage (void) /* Target hook for c_mode_for_suffix. */ -static enum machine_mode +static machine_mode pa_c_mode_for_suffix (char suffix) { if (HPUX_LONG_DOUBLE_LIBRARY) @@ -10136,7 +10136,7 @@ pa_function_section (tree decl, enum node_frequency freq, to handle CONST_DOUBLES. */ static bool -pa_legitimate_constant_p (enum machine_mode mode, rtx x) +pa_legitimate_constant_p (machine_mode mode, rtx x) { if (GET_MODE_CLASS (mode) == MODE_FLOAT && x != CONST0_RTX (mode)) return false; @@ -10236,7 +10236,7 @@ pa_section_type_flags (tree decl, const char *name, int reloc) output as REG+SMALLINT. */ static bool -pa_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +pa_legitimate_address_p (machine_mode mode, rtx x, bool strict) { if ((REG_P (x) && (strict ? STRICT_REG_OK_FOR_BASE_P (x) @@ -10377,7 +10377,7 @@ pa_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) There may be more opportunities to improve code with this hook. */ rtx -pa_legitimize_reload_address (rtx ad, enum machine_mode mode, +pa_legitimize_reload_address (rtx ad, machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { diff --git a/gcc/config/pdp11/pdp11-protos.h b/gcc/config/pdp11/pdp11-protos.h index 5b1b1efa..53c8ea2 100644 --- a/gcc/config/pdp11/pdp11-protos.h +++ b/gcc/config/pdp11/pdp11-protos.h @@ -20,7 +20,7 @@ along with GCC; see the file COPYING3. If not see /* declarations */ #ifdef RTX_CODE -extern int simple_memory_operand (rtx, enum machine_mode); +extern int simple_memory_operand (rtx, machine_mode); extern int legitimate_const_double_p (rtx); extern void notice_update_cc_on_set (rtx, rtx); @@ -29,10 +29,10 @@ extern const char *output_move_multiple (rtx *); extern const char *output_block_move (rtx *); extern const char *output_jump (enum rtx_code, int, int); extern void print_operand_address (FILE *, rtx); -extern bool pdp11_cannot_change_mode_class (enum machine_mode, - enum machine_mode, enum reg_class); +extern bool pdp11_cannot_change_mode_class (machine_mode, + machine_mode, enum reg_class); extern bool pdp11_secondary_memory_needed (reg_class_t, reg_class_t, - enum machine_mode); + machine_mode); typedef enum { no_action, dec_before, inc_after } pdp11_action; typedef enum { little, either, big } pdp11_partorder; extern bool pdp11_expand_operands (rtx *, rtx [][2], int, diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c index fd4cb74..5e66e78 100644 --- a/gcc/config/pdp11/pdp11.c +++ b/gcc/config/pdp11/pdp11.c @@ -162,17 +162,17 @@ static bool pdp11_assemble_integer (rtx, unsigned int, int); static bool pdp11_rtx_costs (rtx, int, int, int, int *, bool); static bool pdp11_return_in_memory (const_tree, const_tree); static rtx pdp11_function_value (const_tree, const_tree, bool); -static rtx pdp11_libcall_value (enum machine_mode, const_rtx); +static rtx pdp11_libcall_value (machine_mode, const_rtx); static bool pdp11_function_value_regno_p (const unsigned int); static void pdp11_trampoline_init (rtx, tree, rtx); -static rtx pdp11_function_arg (cumulative_args_t, enum machine_mode, +static rtx pdp11_function_arg (cumulative_args_t, machine_mode, const_tree, bool); static void pdp11_function_arg_advance (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static void pdp11_conditional_register_usage (void); -static bool pdp11_legitimate_constant_p (enum machine_mode, rtx); +static bool pdp11_legitimate_constant_p (machine_mode, rtx); -static bool pdp11_scalar_mode_supported_p (enum machine_mode); +static bool pdp11_scalar_mode_supported_p (machine_mode); /* Initialize the GCC target structure. */ #undef TARGET_ASM_BYTE_OP @@ -904,7 +904,7 @@ static const int move_costs[N_REG_CLASSES][N_REG_CLASSES] = -- as we do here with 10 -- or not ? */ static int -pdp11_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +pdp11_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t c1, reg_class_t c2) { return move_costs[(int)c1][(int)c2]; @@ -1127,7 +1127,7 @@ notice_update_cc_on_set(rtx exp, rtx insn ATTRIBUTE_UNUSED) int -simple_memory_operand(rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +simple_memory_operand(rtx op, machine_mode mode ATTRIBUTE_UNUSED) { rtx addr; @@ -1375,8 +1375,8 @@ legitimate_const_double_p (rtx address) /* Implement CANNOT_CHANGE_MODE_CLASS. */ bool -pdp11_cannot_change_mode_class (enum machine_mode from, - enum machine_mode to, +pdp11_cannot_change_mode_class (machine_mode from, + machine_mode to, enum reg_class rclass) { /* Also, FPU registers contain a whole float value and the parts of @@ -1447,7 +1447,7 @@ static reg_class_t pdp11_secondary_reload (bool in_p ATTRIBUTE_UNUSED, rtx x, reg_class_t reload_class, - enum machine_mode reload_mode ATTRIBUTE_UNUSED, + machine_mode reload_mode ATTRIBUTE_UNUSED, secondary_reload_info *sri ATTRIBUTE_UNUSED) { if (reload_class != NO_LOAD_FPU_REGS || GET_CODE (x) != REG || @@ -1464,7 +1464,7 @@ pdp11_secondary_reload (bool in_p ATTRIBUTE_UNUSED, */ bool pdp11_secondary_memory_needed (reg_class_t c1, reg_class_t c2, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { int fromfloat = (c1 == LOAD_FPU_REGS || c1 == NO_LOAD_FPU_REGS || c1 == FPU_REGS); @@ -1482,7 +1482,7 @@ pdp11_secondary_memory_needed (reg_class_t c1, reg_class_t c2, */ static bool -pdp11_legitimate_address_p (enum machine_mode mode, +pdp11_legitimate_address_p (machine_mode mode, rtx operand, bool strict) { rtx xfoob; @@ -1783,7 +1783,7 @@ pdp11_function_value (const_tree valtype, /* Worker function for TARGET_LIBCALL_VALUE. */ static rtx -pdp11_libcall_value (enum machine_mode mode, +pdp11_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, BASE_RETURN_VALUE_REG(mode)); @@ -1846,7 +1846,7 @@ pdp11_trampoline_init (rtx m_tramp, tree fndecl, rtx chain_value) static rtx pdp11_function_arg (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1860,7 +1860,7 @@ pdp11_function_arg (cumulative_args_t cum ATTRIBUTE_UNUSED, may not be available.) */ static void -pdp11_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +pdp11_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1915,7 +1915,7 @@ pdp11_function_section (tree decl ATTRIBUTE_UNUSED, /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ static bool -pdp11_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +pdp11_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return GET_CODE (x) != CONST_DOUBLE || legitimate_const_double_p (x); } @@ -1923,7 +1923,7 @@ pdp11_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */ static bool -pdp11_scalar_mode_supported_p (enum machine_mode mode) +pdp11_scalar_mode_supported_p (machine_mode mode) { /* Support SFmode even with -mfloat64. */ if (mode == SFmode) diff --git a/gcc/config/rl78/rl78-protos.h b/gcc/config/rl78/rl78-protos.h index a74bda1..c7126a3 100644 --- a/gcc/config/rl78/rl78-protos.h +++ b/gcc/config/rl78/rl78-protos.h @@ -28,18 +28,18 @@ void rl78_expand_eh_epilogue (rtx); void rl78_expand_epilogue (void); void rl78_expand_prologue (void); int rl78_far_p (rtx x); -int rl78_hard_regno_mode_ok (int, enum machine_mode); -int rl78_hard_regno_nregs (int, enum machine_mode); +int rl78_hard_regno_mode_ok (int, machine_mode); +int rl78_hard_regno_nregs (int, machine_mode); bool rl78_hl_b_c_addr_p (rtx); int rl78_initial_elimination_offset (int, int); -bool rl78_as_legitimate_address (enum machine_mode, rtx, +bool rl78_as_legitimate_address (machine_mode, rtx, bool, addr_space_t); -int rl78_legitimize_reload_address (rtx *, enum machine_mode, int,int, int); -enum reg_class rl78_mode_code_base_reg_class (enum machine_mode, addr_space_t, int, int); +int rl78_legitimize_reload_address (rtx *, machine_mode, int,int, int); +enum reg_class rl78_mode_code_base_reg_class (machine_mode, addr_space_t, int, int); bool rl78_peep_movhi_p (rtx *); bool rl78_real_insns_ok (void); void rl78_register_pragmas (void); -bool rl78_regno_mode_code_ok_for_base_p (int, enum machine_mode, addr_space_t, int, int); +bool rl78_regno_mode_code_ok_for_base_p (int, machine_mode, addr_space_t, int, int); void rl78_setup_peep_movhi (rtx *); bool rl78_virt_insns_ok (void); diff --git a/gcc/config/rl78/rl78.c b/gcc/config/rl78/rl78.c index fe05405..9e7c628 100644 --- a/gcc/config/rl78/rl78.c +++ b/gcc/config/rl78/rl78.c @@ -364,7 +364,7 @@ rl78_real_insns_ok (void) /* Implements HARD_REGNO_NREGS. */ int -rl78_hard_regno_nregs (int regno, enum machine_mode mode) +rl78_hard_regno_nregs (int regno, machine_mode mode) { int rs = register_sizes[regno]; if (rs < 1) @@ -374,7 +374,7 @@ rl78_hard_regno_nregs (int regno, enum machine_mode mode) /* Implements HARD_REGNO_MODE_OK. */ int -rl78_hard_regno_mode_ok (int regno, enum machine_mode mode) +rl78_hard_regno_mode_ok (int regno, machine_mode mode) { int s = GET_MODE_SIZE (mode); @@ -406,7 +406,7 @@ rl78_hard_regno_mode_ok (int regno, enum machine_mode mode) need it to below, so we use this function for when we must get a valid subreg in a "natural" state. */ static rtx -rl78_subreg (enum machine_mode mode, rtx r, enum machine_mode omode, int byte) +rl78_subreg (machine_mode mode, rtx r, machine_mode omode, int byte) { if (GET_CODE (r) == MEM) return adjust_address (r, mode, byte); @@ -831,7 +831,7 @@ rl78_far_p (rtx x) /* Return the appropriate mode for a named address pointer. */ #undef TARGET_ADDR_SPACE_POINTER_MODE #define TARGET_ADDR_SPACE_POINTER_MODE rl78_addr_space_pointer_mode -static enum machine_mode +static machine_mode rl78_addr_space_pointer_mode (addr_space_t addrspace) { switch (addrspace) @@ -849,7 +849,7 @@ rl78_addr_space_pointer_mode (addr_space_t addrspace) #undef TARGET_VALID_POINTER_MODE #define TARGET_VALID_POINTER_MODE rl78_valid_pointer_mode static bool -rl78_valid_pointer_mode (enum machine_mode m) +rl78_valid_pointer_mode (machine_mode m) { return (m == HImode || m == SImode); } @@ -857,7 +857,7 @@ rl78_valid_pointer_mode (enum machine_mode m) /* Return the appropriate mode for a named address address. */ #undef TARGET_ADDR_SPACE_ADDRESS_MODE #define TARGET_ADDR_SPACE_ADDRESS_MODE rl78_addr_space_address_mode -static enum machine_mode +static machine_mode rl78_addr_space_address_mode (addr_space_t addrspace) { switch (addrspace) @@ -875,7 +875,7 @@ rl78_addr_space_address_mode (addr_space_t addrspace) #define TARGET_LEGITIMATE_CONSTANT_P rl78_is_legitimate_constant static bool -rl78_is_legitimate_constant (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED) +rl78_is_legitimate_constant (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED) { return true; } @@ -884,7 +884,7 @@ rl78_is_legitimate_constant (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTR #define TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P rl78_as_legitimate_address bool -rl78_as_legitimate_address (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x, +rl78_as_legitimate_address (machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED) { rtx base, index, addend; @@ -984,7 +984,7 @@ rl78_addr_space_convert (rtx op, tree from_type, tree to_type) /* Implements REGNO_MODE_CODE_OK_FOR_BASE_P. */ bool -rl78_regno_mode_code_ok_for_base_p (int regno, enum machine_mode mode ATTRIBUTE_UNUSED, +rl78_regno_mode_code_ok_for_base_p (int regno, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t address_space ATTRIBUTE_UNUSED, int outer_code ATTRIBUTE_UNUSED, int index_code) { @@ -999,7 +999,7 @@ rl78_regno_mode_code_ok_for_base_p (int regno, enum machine_mode mode ATTRIBUTE_ /* Implements MODE_CODE_BASE_REG_CLASS. */ enum reg_class -rl78_mode_code_base_reg_class (enum machine_mode mode ATTRIBUTE_UNUSED, +rl78_mode_code_base_reg_class (machine_mode mode ATTRIBUTE_UNUSED, addr_space_t address_space ATTRIBUTE_UNUSED, int outer_code ATTRIBUTE_UNUSED, int index_code ATTRIBUTE_UNUSED) @@ -1246,7 +1246,7 @@ rl78_function_value (const_tree ret_type, const_tree fn_decl_or_type ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode = TYPE_MODE (ret_type); + machine_mode mode = TYPE_MODE (ret_type); return gen_rtx_REG (mode, 8); } @@ -1254,9 +1254,9 @@ rl78_function_value (const_tree ret_type, #undef TARGET_PROMOTE_FUNCTION_MODE #define TARGET_PROMOTE_FUNCTION_MODE rl78_promote_function_mode -static enum machine_mode +static machine_mode rl78_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, int *punsignedp ATTRIBUTE_UNUSED, const_tree funtype ATTRIBUTE_UNUSED, int for_return ATTRIBUTE_UNUSED) { @@ -1275,7 +1275,7 @@ rl78_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, static rtx rl78_function_arg (cumulative_args_t cum_v ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -1286,7 +1286,7 @@ rl78_function_arg (cumulative_args_t cum_v ATTRIBUTE_UNUSED, #define TARGET_FUNCTION_ARG_ADVANCE rl78_function_arg_advance static void -rl78_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, const_tree type, +rl78_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { int rounded_size; @@ -1303,7 +1303,7 @@ rl78_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, cons #define TARGET_FUNCTION_ARG_BOUNDARY rl78_function_arg_boundary static unsigned int -rl78_function_arg_boundary (enum machine_mode mode ATTRIBUTE_UNUSED, +rl78_function_arg_boundary (machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED) { return 16; @@ -1933,7 +1933,7 @@ static unsigned char content_memory [32 + NUM_STACK_LOCS]; static unsigned char saved_update_index = NOT_KNOWN; static unsigned char saved_update_value; -static enum machine_mode saved_update_mode; +static machine_mode saved_update_mode; static inline void @@ -1951,7 +1951,7 @@ clear_content_memory (void) static unsigned char get_content_index (rtx loc) { - enum machine_mode mode; + machine_mode mode; if (loc == NULL_RTX) return NOT_KNOWN; @@ -1986,7 +1986,7 @@ get_content_index (rtx loc) /* Return a string describing content INDEX in mode MODE. WARNING: Can return a pointer to a static buffer. */ static const char * -get_content_name (unsigned char index, enum machine_mode mode) +get_content_name (unsigned char index, machine_mode mode) { static char buffer [128]; @@ -2023,7 +2023,7 @@ display_content_memory (FILE * file) #endif static void -update_content (unsigned char index, unsigned char val, enum machine_mode mode) +update_content (unsigned char index, unsigned char val, machine_mode mode) { unsigned int i; @@ -2088,7 +2088,7 @@ update_content (unsigned char index, unsigned char val, enum machine_mode mode) static void record_content (rtx loc, rtx value) { - enum machine_mode mode; + machine_mode mode; unsigned char index; unsigned char val; @@ -2356,7 +2356,7 @@ process_postponed_content_update (void) static rtx gen_and_emit_move (rtx to, rtx from, rtx where, bool before) { - enum machine_mode mode = GET_MODE (to); + machine_mode mode = GET_MODE (to); if (optimize && before && already_contains (to, from)) { @@ -2511,7 +2511,7 @@ static rtx move_to_acc (int opno, rtx before) { rtx src = OP (opno); - enum machine_mode mode = GET_MODE (src); + machine_mode mode = GET_MODE (src); if (REG_P (src) && REGNO (src) < 2) return src; @@ -2525,7 +2525,7 @@ move_to_acc (int opno, rtx before) static void force_into_acc (rtx src, rtx before) { - enum machine_mode mode = GET_MODE (src); + machine_mode mode = GET_MODE (src); rtx move; if (REG_P (src) && REGNO (src) < 2) @@ -2545,7 +2545,7 @@ static rtx move_from_acc (unsigned int opno, rtx after) { rtx dest = OP (opno); - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); if (REG_P (dest) && REGNO (dest) < 2) return dest; @@ -2558,7 +2558,7 @@ move_from_acc (unsigned int opno, rtx after) static rtx move_acc_to_reg (rtx acc, int regno, rtx before) { - enum machine_mode mode = GET_MODE (acc); + machine_mode mode = GET_MODE (acc); rtx reg; reg = gen_rtx_REG (mode, regno); @@ -2572,7 +2572,7 @@ static rtx move_to_x (int opno, rtx before) { rtx src = OP (opno); - enum machine_mode mode = GET_MODE (src); + machine_mode mode = GET_MODE (src); rtx reg; if (mode == VOIDmode) @@ -2595,7 +2595,7 @@ static rtx move_to_hl (int opno, rtx before) { rtx src = OP (opno); - enum machine_mode mode = GET_MODE (src); + machine_mode mode = GET_MODE (src); rtx reg; if (mode == VOIDmode) @@ -2618,7 +2618,7 @@ static rtx move_to_de (int opno, rtx before) { rtx src = OP (opno); - enum machine_mode mode = GET_MODE (src); + machine_mode mode = GET_MODE (src); rtx reg; if (mode == VOIDmode) @@ -3746,7 +3746,7 @@ static bool rl78_rtx_costs (rtx x, #undef TARGET_UNWIND_WORD_MODE #define TARGET_UNWIND_WORD_MODE rl78_unwind_word_mode -static enum machine_mode +static machine_mode rl78_unwind_word_mode (void) { return HImode; diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index 02ea142..d46ef19 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -244,7 +244,7 @@ [(const_int 0)] { rtx dest = operands[0]; - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); rtvec v; int i, num_elements; @@ -273,7 +273,7 @@ { rtx dup = gen_easy_altivec_constant (operands[1]); rtx const_vec; - enum machine_mode op_mode = <MODE>mode; + machine_mode op_mode = <MODE>mode; /* Divide the operand of the resulting VEC_DUPLICATE, and use simplify_rtx to make a CONST_VECTOR. */ diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c index 18a2688..8fa791e 100644 --- a/gcc/config/rs6000/rs6000-c.c +++ b/gcc/config/rs6000/rs6000-c.c @@ -4436,7 +4436,7 @@ assignment for unaligned loads and stores"); tree arg1_inner_type; tree decl, stmt; tree innerptrtype; - enum machine_mode mode; + machine_mode mode; /* No second argument. */ if (nargs != 2) @@ -4538,7 +4538,7 @@ assignment for unaligned loads and stores"); tree arg1_inner_type; tree decl, stmt; tree innerptrtype; - enum machine_mode mode; + machine_mode mode; /* No second or third arguments. */ if (nargs != 3) diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h index 04ddfa9..8d27a69 100644 --- a/gcc/config/rs6000/rs6000-protos.h +++ b/gcc/config/rs6000/rs6000-protos.h @@ -27,24 +27,24 @@ #ifdef TREE_CODE extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, int, int, int, - tree, enum machine_mode); + tree, machine_mode); #endif /* TREE_CODE */ -extern bool easy_altivec_constant (rtx, enum machine_mode); +extern bool easy_altivec_constant (rtx, machine_mode); extern HOST_WIDE_INT const_vector_elt_as_int (rtx, unsigned int); -extern bool macho_lo_sum_memory_operand (rtx, enum machine_mode); -extern int num_insns_constant (rtx, enum machine_mode); +extern bool macho_lo_sum_memory_operand (rtx, machine_mode); +extern int num_insns_constant (rtx, machine_mode); extern int num_insns_constant_wide (HOST_WIDE_INT); -extern int small_data_operand (rtx, enum machine_mode); -extern bool mem_operand_gpr (rtx, enum machine_mode); +extern int small_data_operand (rtx, machine_mode); +extern bool mem_operand_gpr (rtx, machine_mode); extern bool toc_relative_expr_p (const_rtx, bool); -extern bool invalid_e500_subreg (rtx, enum machine_mode); -extern void validate_condition_mode (enum rtx_code, enum machine_mode); -extern bool legitimate_constant_pool_address_p (const_rtx, enum machine_mode, +extern bool invalid_e500_subreg (rtx, machine_mode); +extern void validate_condition_mode (enum rtx_code, machine_mode); +extern bool legitimate_constant_pool_address_p (const_rtx, machine_mode, bool); extern bool legitimate_indirect_address_p (rtx, int); extern bool legitimate_indexed_address_p (rtx, int); -extern bool avoiding_indexed_address_p (enum machine_mode); +extern bool avoiding_indexed_address_p (machine_mode); extern rtx rs6000_got_register (rtx); extern rtx find_addr_reg (rtx); @@ -60,9 +60,9 @@ extern void rs6000_expand_vector_extract (rtx, rtx, int); extern bool altivec_expand_vec_perm_const (rtx op[4]); extern void altivec_expand_vec_perm_le (rtx op[4]); extern bool rs6000_expand_vec_perm_const (rtx op[4]); -extern void altivec_expand_lvx_be (rtx, rtx, enum machine_mode, unsigned); -extern void altivec_expand_stvx_be (rtx, rtx, enum machine_mode, unsigned); -extern void altivec_expand_stvex_be (rtx, rtx, enum machine_mode, unsigned); +extern void altivec_expand_lvx_be (rtx, rtx, machine_mode, unsigned); +extern void altivec_expand_stvx_be (rtx, rtx, machine_mode, unsigned); +extern void altivec_expand_stvex_be (rtx, rtx, machine_mode, unsigned); extern void rs6000_expand_extract_even (rtx, rtx, rtx); extern void rs6000_expand_interleave (rtx, rtx, rtx, bool); extern void rs6000_scale_v2df (rtx, rtx, int); @@ -86,13 +86,13 @@ extern const char *emit_fusion_gpr_load (rtx, rtx); extern enum reg_class (*rs6000_preferred_reload_class_ptr) (rtx, enum reg_class); extern enum reg_class (*rs6000_secondary_reload_class_ptr) (enum reg_class, - enum machine_mode, + machine_mode, rtx); extern bool (*rs6000_secondary_memory_needed_ptr) (enum reg_class, enum reg_class, - enum machine_mode); -extern bool (*rs6000_cannot_change_mode_class_ptr) (enum machine_mode, - enum machine_mode, + machine_mode); +extern bool (*rs6000_cannot_change_mode_class_ptr) (machine_mode, + machine_mode, enum reg_class); extern void rs6000_secondary_reload_inner (rtx, rtx, rtx, bool); extern void rs6000_secondary_reload_gpr (rtx, rtx, rtx, bool); @@ -107,11 +107,11 @@ extern int extract_ME (rtx); extern void rs6000_output_function_entry (FILE *, const char *); extern void print_operand (FILE *, rtx, int); extern void print_operand_address (FILE *, rtx); -extern enum rtx_code rs6000_reverse_condition (enum machine_mode, +extern enum rtx_code rs6000_reverse_condition (machine_mode, enum rtx_code); -extern void rs6000_emit_sISEL (enum machine_mode, rtx[]); -extern void rs6000_emit_sCOND (enum machine_mode, rtx[]); -extern void rs6000_emit_cbranch (enum machine_mode, rtx[]); +extern void rs6000_emit_sISEL (machine_mode, rtx[]); +extern void rs6000_emit_sCOND (machine_mode, rtx[]); +extern void rs6000_emit_cbranch (machine_mode, rtx[]); extern char * output_cbranch (rtx, const char *, int, rtx_insn *); extern char * output_e500_flip_gt_bit (rtx, rtx); extern const char * output_probe_stack_range (rtx, rtx); @@ -124,19 +124,19 @@ extern void rs6000_expand_atomic_exchange (rtx op[]); extern void rs6000_expand_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx); extern void rs6000_emit_swdiv (rtx, rtx, rtx, bool); extern void rs6000_emit_swrsqrt (rtx, rtx); -extern void output_toc (FILE *, rtx, int, enum machine_mode); +extern void output_toc (FILE *, rtx, int, machine_mode); extern rtx rs6000_longcall_ref (rtx); extern void rs6000_fatal_bad_address (rtx); extern rtx create_TOC_reference (rtx, rtx); extern void rs6000_split_multireg_move (rtx, rtx); -extern void rs6000_emit_le_vsx_move (rtx, rtx, enum machine_mode); -extern void rs6000_emit_move (rtx, rtx, enum machine_mode); -extern rtx rs6000_secondary_memory_needed_rtx (enum machine_mode); -extern enum machine_mode rs6000_secondary_memory_needed_mode (enum +extern void rs6000_emit_le_vsx_move (rtx, rtx, machine_mode); +extern void rs6000_emit_move (rtx, rtx, machine_mode); +extern rtx rs6000_secondary_memory_needed_rtx (machine_mode); +extern machine_mode rs6000_secondary_memory_needed_mode (enum machine_mode); -extern rtx (*rs6000_legitimize_reload_address_ptr) (rtx, enum machine_mode, +extern rtx (*rs6000_legitimize_reload_address_ptr) (rtx, machine_mode, int, int, int, int *); -extern bool rs6000_legitimate_offset_address_p (enum machine_mode, rtx, +extern bool rs6000_legitimate_offset_address_p (machine_mode, rtx, bool, bool); extern rtx rs6000_find_base_term (rtx); extern rtx rs6000_return_addr (int, rtx); @@ -145,11 +145,11 @@ extern HOST_WIDE_INT rs6000_initial_elimination_offset (int, int); extern void rs6000_emit_popcount (rtx, rtx); extern void rs6000_emit_parity (rtx, rtx); -extern rtx rs6000_machopic_legitimize_pic_address (rtx, enum machine_mode, +extern rtx rs6000_machopic_legitimize_pic_address (rtx, machine_mode, rtx); extern rtx rs6000_address_for_fpconvert (rtx); extern rtx rs6000_address_for_altivec (rtx); -extern rtx rs6000_allocate_stack_temp (enum machine_mode, bool, bool); +extern rtx rs6000_allocate_stack_temp (machine_mode, bool, bool); extern int rs6000_loop_align (rtx); extern void rs6000_split_logical (rtx [], enum rtx_code, bool, bool, bool); #endif /* RTX_CODE */ @@ -162,7 +162,7 @@ extern unsigned int rs6000_special_round_type_align (tree, unsigned int, extern unsigned int darwin_rs6000_special_round_type_align (tree, unsigned int, unsigned int); extern tree altivec_resolve_overloaded_builtin (location_t, tree, void *); -extern rtx rs6000_libcall_value (enum machine_mode); +extern rtx rs6000_libcall_value (machine_mode); extern rtx rs6000_va_arg (tree, tree); extern int function_ok_for_sibcall (tree); extern int rs6000_reg_parm_stack_space (tree, bool); @@ -172,7 +172,7 @@ extern void rs6000_elf_declare_function_name (FILE *, const char *, tree); extern bool rs6000_elf_in_small_data_p (const_tree); #ifdef ARGS_SIZE_RTX /* expr.h defines ARGS_SIZE_RTX and `enum direction' */ -extern enum direction function_arg_padding (enum machine_mode, const_tree); +extern enum direction function_arg_padding (machine_mode, const_tree); #endif /* ARGS_SIZE_RTX */ #endif /* TREE_CODE */ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index cd13e77..4adb168 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -409,7 +409,7 @@ static struct rs6000_reg_addr reg_addr[NUM_MACHINE_MODES]; /* Helper function to say whether a mode supports PRE_INC or PRE_DEC. */ static inline bool -mode_supports_pre_incdec_p (enum machine_mode mode) +mode_supports_pre_incdec_p (machine_mode mode) { return ((reg_addr[mode].addr_mask[RELOAD_REG_ANY] & RELOAD_REG_PRE_INCDEC) != 0); @@ -417,7 +417,7 @@ mode_supports_pre_incdec_p (enum machine_mode mode) /* Helper function to say whether a mode supports PRE_MODIFY. */ static inline bool -mode_supports_pre_modify_p (enum machine_mode mode) +mode_supports_pre_modify_p (machine_mode mode) { return ((reg_addr[mode].addr_mask[RELOAD_REG_ANY] & RELOAD_REG_PRE_MODIFY) != 0); @@ -1075,7 +1075,7 @@ static const struct rs6000_builtin_info_type rs6000_builtin_info[] = static tree (*rs6000_veclib_handler) (tree, tree, tree); -static bool rs6000_debug_legitimate_address_p (enum machine_mode, rtx, bool); +static bool rs6000_debug_legitimate_address_p (machine_mode, rtx, bool); static bool spe_func_has_64bit_regs_p (void); static struct machine_function * rs6000_init_machine_status (void); static int rs6000_ra_ever_killed (void); @@ -1084,9 +1084,9 @@ static tree rs6000_handle_altivec_attribute (tree *, tree, tree, int, bool *); static tree rs6000_handle_struct_attribute (tree *, tree, tree, int, bool *); static tree rs6000_builtin_vectorized_libmass (tree, tree, tree); static void rs6000_emit_set_long_const (rtx, HOST_WIDE_INT); -static int rs6000_memory_move_cost (enum machine_mode, reg_class_t, bool); +static int rs6000_memory_move_cost (machine_mode, reg_class_t, bool); static bool rs6000_debug_rtx_costs (rtx, int, int, int, int *, bool); -static int rs6000_debug_address_cost (rtx, enum machine_mode, addr_space_t, +static int rs6000_debug_address_cost (rtx, machine_mode, addr_space_t, bool); static int rs6000_debug_adjust_cost (rtx_insn *, rtx, rtx_insn *, int); static bool is_microcoded_insn (rtx_insn *); @@ -1099,8 +1099,8 @@ static bool insn_terminates_group_p (rtx_insn *, enum group_termination); static bool insn_must_be_first_in_group (rtx_insn *); static bool insn_must_be_last_in_group (rtx_insn *); static void altivec_init_builtins (void); -static tree builtin_function_type (enum machine_mode, enum machine_mode, - enum machine_mode, enum machine_mode, +static tree builtin_function_type (machine_mode, machine_mode, + machine_mode, machine_mode, enum rs6000_builtins, const char *name); static void rs6000_common_init_builtins (void); static void paired_init_builtins (void); @@ -1112,42 +1112,42 @@ static rtx spe_expand_evsel_builtin (enum insn_code, tree, rtx); static int rs6000_emit_int_cmove (rtx, rtx, rtx, rtx); static rs6000_stack_t *rs6000_stack_info (void); static void is_altivec_return_reg (rtx, void *); -int easy_vector_constant (rtx, enum machine_mode); -static rtx rs6000_debug_legitimize_address (rtx, rtx, enum machine_mode); +int easy_vector_constant (rtx, machine_mode); +static rtx rs6000_debug_legitimize_address (rtx, rtx, machine_mode); static rtx rs6000_legitimize_tls_address (rtx, enum tls_model); static rtx rs6000_darwin64_record_arg (CUMULATIVE_ARGS *, const_tree, bool, bool); #if TARGET_MACHO static void macho_branch_islands (void); #endif -static rtx rs6000_legitimize_reload_address (rtx, enum machine_mode, int, int, +static rtx rs6000_legitimize_reload_address (rtx, machine_mode, int, int, int, int *); -static rtx rs6000_debug_legitimize_reload_address (rtx, enum machine_mode, int, +static rtx rs6000_debug_legitimize_reload_address (rtx, machine_mode, int, int, int, int *); static bool rs6000_mode_dependent_address (const_rtx); static bool rs6000_debug_mode_dependent_address (const_rtx); static enum reg_class rs6000_secondary_reload_class (enum reg_class, - enum machine_mode, rtx); + machine_mode, rtx); static enum reg_class rs6000_debug_secondary_reload_class (enum reg_class, - enum machine_mode, + machine_mode, rtx); static enum reg_class rs6000_preferred_reload_class (rtx, enum reg_class); static enum reg_class rs6000_debug_preferred_reload_class (rtx, enum reg_class); static bool rs6000_secondary_memory_needed (enum reg_class, enum reg_class, - enum machine_mode); + machine_mode); static bool rs6000_debug_secondary_memory_needed (enum reg_class, enum reg_class, - enum machine_mode); -static bool rs6000_cannot_change_mode_class (enum machine_mode, - enum machine_mode, + machine_mode); +static bool rs6000_cannot_change_mode_class (machine_mode, + machine_mode, enum reg_class); -static bool rs6000_debug_cannot_change_mode_class (enum machine_mode, - enum machine_mode, +static bool rs6000_debug_cannot_change_mode_class (machine_mode, + machine_mode, enum reg_class); static bool rs6000_save_toc_in_prologue_p (void); -rtx (*rs6000_legitimize_reload_address_ptr) (rtx, enum machine_mode, int, int, +rtx (*rs6000_legitimize_reload_address_ptr) (rtx, machine_mode, int, int, int, int *) = rs6000_legitimize_reload_address; @@ -1155,18 +1155,18 @@ static bool (*rs6000_mode_dependent_address_ptr) (const_rtx) = rs6000_mode_dependent_address; enum reg_class (*rs6000_secondary_reload_class_ptr) (enum reg_class, - enum machine_mode, rtx) + machine_mode, rtx) = rs6000_secondary_reload_class; enum reg_class (*rs6000_preferred_reload_class_ptr) (rtx, enum reg_class) = rs6000_preferred_reload_class; bool (*rs6000_secondary_memory_needed_ptr) (enum reg_class, enum reg_class, - enum machine_mode) + machine_mode) = rs6000_secondary_memory_needed; -bool (*rs6000_cannot_change_mode_class_ptr) (enum machine_mode, - enum machine_mode, +bool (*rs6000_cannot_change_mode_class_ptr) (machine_mode, + machine_mode, enum reg_class) = rs6000_cannot_change_mode_class; @@ -1180,7 +1180,7 @@ static void rs6000_print_builtin_options (FILE *, int, const char *, static enum rs6000_reg_type register_to_reg_type (rtx, bool *); static bool rs6000_secondary_reload_move (enum rs6000_reg_type, enum rs6000_reg_type, - enum machine_mode, + machine_mode, secondary_reload_info *, bool); rtl_opt_pass *make_pass_analyze_swaps (gcc::context*); @@ -1192,7 +1192,7 @@ struct GTY((for_user)) toc_hash_struct /* `key' will satisfy CONSTANT_P; in fact, it will satisfy ASM_OUTPUT_SPECIAL_POOL_ENTRY_P. */ rtx key; - enum machine_mode key_mode; + machine_mode key_mode; int labelno; }; @@ -1209,7 +1209,7 @@ static GTY (()) hash_table<toc_hasher> *toc_hash_table; struct GTY((for_user)) builtin_hash_struct { tree type; - enum machine_mode mode[4]; /* return value + 3 arguments. */ + machine_mode mode[4]; /* return value + 3 arguments. */ unsigned char uns_p[4]; /* and whether the types are unsigned. */ }; @@ -1709,7 +1709,7 @@ rs6000_cpu_name_lookup (const char *name) PowerPC64 GPRs and FPRs point register holds 64 bits worth. */ static int -rs6000_hard_regno_nregs_internal (int regno, enum machine_mode mode) +rs6000_hard_regno_nregs_internal (int regno, machine_mode mode) { unsigned HOST_WIDE_INT reg_size; @@ -1743,7 +1743,7 @@ rs6000_hard_regno_nregs_internal (int regno, enum machine_mode mode) /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */ static int -rs6000_hard_regno_mode_ok (int regno, enum machine_mode mode) +rs6000_hard_regno_mode_ok (int regno, machine_mode mode) { int last_regno = regno + rs6000_hard_regno_nregs[mode][regno] - 1; @@ -1990,7 +1990,7 @@ rs6000_debug_reg_global (void) struct cl_target_option cl_opts; /* Modes we want tieable information on. */ - static const enum machine_mode print_tieable_modes[] = { + static const machine_mode print_tieable_modes[] = { QImode, HImode, SImode, @@ -2124,13 +2124,13 @@ rs6000_debug_reg_global (void) for (m1 = 0; m1 < ARRAY_SIZE (print_tieable_modes); m1++) { - enum machine_mode mode1 = print_tieable_modes[m1]; + machine_mode mode1 = print_tieable_modes[m1]; bool first_time = true; nl = (const char *)0; for (m2 = 0; m2 < ARRAY_SIZE (print_tieable_modes); m2++) { - enum machine_mode mode2 = print_tieable_modes[m2]; + machine_mode mode2 = print_tieable_modes[m2]; if (mode1 != mode2 && MODES_TIEABLE_P (mode1, mode2)) { if (first_time) @@ -2392,7 +2392,7 @@ rs6000_setup_reg_addr_masks (void) for (m = 0; m < NUM_MACHINE_MODES; ++m) { - enum machine_mode m2 = (enum machine_mode)m; + machine_mode m2 = (machine_mode)m; /* SDmode is special in that we want to access it only via REG+REG addressing on power7 and above, since we want to use the LFIWZX and @@ -2872,12 +2872,12 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p) for (r = 0; r < FIRST_PSEUDO_REGISTER; ++r) for (m = 0; m < NUM_MACHINE_MODES; ++m) rs6000_hard_regno_nregs[m][r] - = rs6000_hard_regno_nregs_internal (r, (enum machine_mode)m); + = rs6000_hard_regno_nregs_internal (r, (machine_mode)m); /* Precalculate HARD_REGNO_MODE_OK. */ for (r = 0; r < FIRST_PSEUDO_REGISTER; ++r) for (m = 0; m < NUM_MACHINE_MODES; ++m) - if (rs6000_hard_regno_mode_ok (r, (enum machine_mode)m)) + if (rs6000_hard_regno_mode_ok (r, (machine_mode)m)) rs6000_hard_regno_mode_ok_p[m][r] = true; /* Precalculate CLASS_MAX_NREGS sizes. */ @@ -2899,7 +2899,7 @@ rs6000_init_hard_regno_mode_ok (bool global_init_p) for (m = 0; m < NUM_MACHINE_MODES; ++m) { - enum machine_mode m2 = (enum machine_mode)m; + machine_mode m2 = (machine_mode)m; int reg_size2 = reg_size; /* TFmode/TDmode always takes 2 registers, even in VSX. */ @@ -4200,7 +4200,7 @@ rs6000_vector_alignment_reachable (const_tree type ATTRIBUTE_UNUSED, bool is_pac /* Return true if the vector misalignment factor is supported by the target. */ static bool -rs6000_builtin_support_vector_misalignment (enum machine_mode mode, +rs6000_builtin_support_vector_misalignment (machine_mode mode, const_tree type, int misalignment, bool is_packed) @@ -4358,8 +4358,8 @@ rs6000_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost, /* Implement targetm.vectorize.preferred_simd_mode. */ -static enum machine_mode -rs6000_preferred_simd_mode (enum machine_mode mode) +static machine_mode +rs6000_preferred_simd_mode (machine_mode mode) { if (TARGET_VSX) switch (mode) @@ -4531,7 +4531,7 @@ rs6000_builtin_vectorized_libmass (tree fndecl, tree type_out, tree type_in) tree fntype, new_fndecl, bdecl = NULL_TREE; int n_args = 1; const char *bname; - enum machine_mode el_mode, in_mode; + machine_mode el_mode, in_mode; int n, in_n; /* Libmass is suitable for unsafe math only as it does not correctly support @@ -4671,7 +4671,7 @@ static tree rs6000_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) { - enum machine_mode in_mode, out_mode; + machine_mode in_mode, out_mode; int in_n, out_n; if (TARGET_DEBUG_BUILTIN) @@ -5030,7 +5030,7 @@ num_insns_constant_wide (HOST_WIDE_INT value) } int -num_insns_constant (rtx op, enum machine_mode mode) +num_insns_constant (rtx op, machine_mode mode) { HOST_WIDE_INT low, high; @@ -5133,8 +5133,8 @@ const_vector_elt_as_int (rtx op, unsigned int elt) static bool vspltis_constant (rtx op, unsigned step, unsigned copies) { - enum machine_mode mode = GET_MODE (op); - enum machine_mode inner = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (op); + machine_mode inner = GET_MODE_INNER (mode); unsigned i; unsigned nunits; @@ -5210,7 +5210,7 @@ vspltis_constant (rtx op, unsigned step, unsigned copies) with a vspltisb, vspltish or vspltisw. */ bool -easy_altivec_constant (rtx op, enum machine_mode mode) +easy_altivec_constant (rtx op, machine_mode mode) { unsigned step, copies; @@ -5278,7 +5278,7 @@ easy_altivec_constant (rtx op, enum machine_mode mode) rtx gen_easy_altivec_constant (rtx op) { - enum machine_mode mode = GET_MODE (op); + machine_mode mode = GET_MODE (op); int nunits = GET_MODE_NUNITS (mode); rtx val = CONST_VECTOR_ELT (op, BYTES_BIG_ENDIAN ? nunits - 1 : 0); unsigned step = nunits / 4; @@ -5313,7 +5313,7 @@ const char * output_vec_const_move (rtx *operands) { int cst, cst2; - enum machine_mode mode; + machine_mode mode; rtx dest, vec; dest = operands[0]; @@ -5383,7 +5383,7 @@ output_vec_const_move (rtx *operands) void paired_expand_vector_init (rtx target, rtx vals) { - enum machine_mode mode = GET_MODE (target); + machine_mode mode = GET_MODE (target); int n_elts = GET_MODE_NUNITS (mode); int n_var = 0; rtx x, new_rtx, tmp, constant_op, op1, op2; @@ -5533,8 +5533,8 @@ paired_emit_vector_cond_expr (rtx dest, rtx op1, rtx op2, void rs6000_expand_vector_init (rtx target, rtx vals) { - enum machine_mode mode = GET_MODE (target); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (target); + machine_mode inner_mode = GET_MODE_INNER (mode); int n_elts = GET_MODE_NUNITS (mode); int n_var = 0, one_var = -1; bool all_same = true, all_const_zero = true; @@ -5694,8 +5694,8 @@ rs6000_expand_vector_init (rtx target, rtx vals) void rs6000_expand_vector_set (rtx target, rtx val, int elt) { - enum machine_mode mode = GET_MODE (target); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (target); + machine_mode inner_mode = GET_MODE_INNER (mode); rtx reg = gen_reg_rtx (mode); rtx mask, mem, x; int width = GET_MODE_SIZE (inner_mode); @@ -5768,8 +5768,8 @@ rs6000_expand_vector_set (rtx target, rtx val, int elt) void rs6000_expand_vector_extract (rtx target, rtx vec, int elt) { - enum machine_mode mode = GET_MODE (vec); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (vec); + machine_mode inner_mode = GET_MODE_INNER (mode); rtx mem; if (VECTOR_MEM_VSX_P (mode)) @@ -5871,7 +5871,7 @@ build_mask64_2_operands (rtx in, rtx *out) /* Return TRUE if OP is an invalid SUBREG operation on the e500. */ bool -invalid_e500_subreg (rtx op, enum machine_mode mode) +invalid_e500_subreg (rtx op, machine_mode mode) { if (TARGET_E500_DOUBLE) { @@ -6043,7 +6043,7 @@ darwin_rs6000_special_round_type_align (tree type, unsigned int computed, int small_data_operand (rtx op ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { #if TARGET_ELF rtx sym_ref; @@ -6211,7 +6211,7 @@ address_offset (rtx op) of the address calculation. */ bool -mem_operand_gpr (rtx op, enum machine_mode mode) +mem_operand_gpr (rtx op, machine_mode mode) { unsigned HOST_WIDE_INT offset; int extra; @@ -6240,7 +6240,7 @@ mem_operand_gpr (rtx op, enum machine_mode mode) /* Subroutines of rs6000_legitimize_address and rs6000_legitimate_address_p. */ static bool -reg_offset_addressing_ok_p (enum machine_mode mode) +reg_offset_addressing_ok_p (machine_mode mode) { switch (mode) { @@ -6308,7 +6308,7 @@ virtual_stack_registers_memory_p (rtx op) static bool offsettable_ok_by_alignment (rtx op, HOST_WIDE_INT offset, - enum machine_mode mode) + machine_mode mode) { tree decl, type; unsigned HOST_WIDE_INT dsize, dalign, lsb, mask; @@ -6340,7 +6340,7 @@ offsettable_ok_by_alignment (rtx op, HOST_WIDE_INT offset, else if (CONSTANT_POOL_ADDRESS_P (op)) { /* It would be nice to have get_pool_align().. */ - enum machine_mode cmode = get_pool_mode (op); + machine_mode cmode = get_pool_mode (op); dalign = GET_MODE_ALIGNMENT (cmode); } @@ -6452,7 +6452,7 @@ toc_relative_expr_p (const_rtx op, bool strict) if X is a toc-relative address known to be offsettable within MODE. */ bool -legitimate_constant_pool_address_p (const_rtx x, enum machine_mode mode, +legitimate_constant_pool_address_p (const_rtx x, machine_mode mode, bool strict) { return (toc_relative_expr_p (x, strict) @@ -6464,7 +6464,7 @@ legitimate_constant_pool_address_p (const_rtx x, enum machine_mode mode, } static bool -legitimate_small_data_p (enum machine_mode mode, rtx x) +legitimate_small_data_p (machine_mode mode, rtx x) { return (DEFAULT_ABI == ABI_V4 && !flag_pic && !TARGET_TOC @@ -6476,7 +6476,7 @@ legitimate_small_data_p (enum machine_mode mode, rtx x) #define SPE_CONST_OFFSET_OK(x) (((x) & ~0xf8) == 0) bool -rs6000_legitimate_offset_address_p (enum machine_mode mode, rtx x, +rs6000_legitimate_offset_address_p (machine_mode mode, rtx x, bool strict, bool worst_case) { unsigned HOST_WIDE_INT offset; @@ -6583,7 +6583,7 @@ legitimate_indexed_address_p (rtx x, int strict) } bool -avoiding_indexed_address_p (enum machine_mode mode) +avoiding_indexed_address_p (machine_mode mode) { /* Avoid indexed addressing for modes that have non-indexed load/store instruction forms. */ @@ -6597,7 +6597,7 @@ legitimate_indirect_address_p (rtx x, int strict) } bool -macho_lo_sum_memory_operand (rtx x, enum machine_mode mode) +macho_lo_sum_memory_operand (rtx x, machine_mode mode) { if (!TARGET_MACHO || !flag_pic || mode != SImode || GET_CODE (x) != MEM) @@ -6616,7 +6616,7 @@ macho_lo_sum_memory_operand (rtx x, enum machine_mode mode) } static bool -legitimate_lo_sum_address_p (enum machine_mode mode, rtx x, int strict) +legitimate_lo_sum_address_p (machine_mode mode, rtx x, int strict) { if (GET_CODE (x) != LO_SUM) return false; @@ -6685,7 +6685,7 @@ legitimate_lo_sum_address_p (enum machine_mode mode, rtx x, int strict) static rtx rs6000_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { unsigned int extra; @@ -6836,7 +6836,7 @@ rs6000_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, /* Debug version of rs6000_legitimize_address. */ static rtx -rs6000_debug_legitimize_address (rtx x, rtx oldx, enum machine_mode mode) +rs6000_debug_legitimize_address (rtx x, rtx oldx, machine_mode mode) { rtx ret; rtx_insn *insns; @@ -7009,7 +7009,7 @@ rs6000_const_not_ok_for_debug_p (rtx x) && CONSTANT_POOL_ADDRESS_P (x)) { rtx c = get_pool_constant (x); - enum machine_mode cmode = get_pool_mode (x); + machine_mode cmode = get_pool_mode (x); if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (c, cmode)) return true; } @@ -7329,7 +7329,7 @@ rs6000_legitimize_tls_address (rtx addr, enum tls_model model) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -rs6000_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +rs6000_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { if (GET_CODE (x) == HIGH && GET_CODE (XEXP (x, 0)) == UNSPEC) @@ -7374,7 +7374,7 @@ use_toc_relative_ref (rtx sym) The Darwin code is inside #if TARGET_MACHO because only then are the machopic_* functions defined. */ static rtx -rs6000_legitimize_reload_address (rtx x, enum machine_mode mode, +rs6000_legitimize_reload_address (rtx x, machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED, int *win) { @@ -7574,7 +7574,7 @@ rs6000_legitimize_reload_address (rtx x, enum machine_mode mode, /* Debug version of rs6000_legitimize_reload_address. */ static rtx -rs6000_debug_legitimize_reload_address (rtx x, enum machine_mode mode, +rs6000_debug_legitimize_reload_address (rtx x, machine_mode mode, int opnum, int type, int ind_levels, int *win) { @@ -7617,7 +7617,7 @@ rs6000_debug_legitimize_reload_address (rtx x, enum machine_mode mode, because adjacent memory cells are accessed by adding word-sized offsets during assembly output. */ static bool -rs6000_legitimate_address_p (enum machine_mode mode, rtx x, bool reg_ok_strict) +rs6000_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict) { bool reg_offset_p = reg_offset_addressing_ok_p (mode); @@ -7691,7 +7691,7 @@ rs6000_legitimate_address_p (enum machine_mode mode, rtx x, bool reg_ok_strict) /* Debug version of rs6000_legitimate_address_p. */ static bool -rs6000_debug_legitimate_address_p (enum machine_mode mode, rtx x, +rs6000_debug_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict) { bool ret = rs6000_legitimate_address_p (mode, x, reg_ok_strict); @@ -7818,7 +7818,7 @@ rs6000_find_base_term (rtx op) in 32-bit mode, that the recog predicate rejects. */ static bool -rs6000_offsettable_memref_p (rtx op, enum machine_mode reg_mode) +rs6000_offsettable_memref_p (rtx op, machine_mode reg_mode) { bool worst_case; @@ -7937,7 +7937,7 @@ rs6000_conditional_register_usage (void) bool rs6000_emit_set_const (rtx dest, rtx source) { - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); rtx temp, set; rtx_insn *insn; HOST_WIDE_INT c; @@ -8113,7 +8113,7 @@ rs6000_eliminate_indexed_memrefs (rtx operands[2]) /* Generate a vector of constants to permute MODE for a little-endian storage operation by swapping the two halves of a vector. */ static rtvec -rs6000_const_vec (enum machine_mode mode) +rs6000_const_vec (machine_mode mode) { int i, subparts; rtvec v; @@ -8154,7 +8154,7 @@ rs6000_const_vec (enum machine_mode mode) /* Generate a permute rtx that represents an lxvd2x, stxvd2x, or xxpermdi for a VSX load or store operation. */ rtx -rs6000_gen_le_vsx_permute (rtx source, enum machine_mode mode) +rs6000_gen_le_vsx_permute (rtx source, machine_mode mode) { rtx par = gen_rtx_PARALLEL (VOIDmode, rs6000_const_vec (mode)); return gen_rtx_VEC_SELECT (mode, source, par); @@ -8164,7 +8164,7 @@ rs6000_gen_le_vsx_permute (rtx source, enum machine_mode mode) register DEST in mode MODE. The load is done with two permuting insn's that represent an lxvd2x and xxpermdi. */ void -rs6000_emit_le_vsx_load (rtx dest, rtx source, enum machine_mode mode) +rs6000_emit_le_vsx_load (rtx dest, rtx source, machine_mode mode) { rtx tmp, permute_mem, permute_reg; @@ -8188,7 +8188,7 @@ rs6000_emit_le_vsx_load (rtx dest, rtx source, enum machine_mode mode) register SOURCE in mode MODE. The store is done with two permuting insn's that represent an xxpermdi and an stxvd2x. */ void -rs6000_emit_le_vsx_store (rtx dest, rtx source, enum machine_mode mode) +rs6000_emit_le_vsx_store (rtx dest, rtx source, machine_mode mode) { rtx tmp, permute_src, permute_tmp; @@ -8215,7 +8215,7 @@ rs6000_emit_le_vsx_store (rtx dest, rtx source, enum machine_mode mode) handled with a split. The expand-time RTL generation allows us to optimize away redundant pairs of register-permutes. */ void -rs6000_emit_le_vsx_move (rtx dest, rtx source, enum machine_mode mode) +rs6000_emit_le_vsx_move (rtx dest, rtx source, machine_mode mode) { gcc_assert (!BYTES_BIG_ENDIAN && VECTOR_MEM_VSX_P (mode) @@ -8237,7 +8237,7 @@ rs6000_emit_le_vsx_move (rtx dest, rtx source, enum machine_mode mode) /* Emit a move from SOURCE to DEST in mode MODE. */ void -rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode) +rs6000_emit_move (rtx dest, rtx source, machine_mode mode) { rtx operands[2]; operands[0] = dest; @@ -8736,7 +8736,7 @@ rs6000_emit_move (rtx dest, rtx source, enum machine_mode mode) fit into 1, whereas DI still needs two. */ static bool -rs6000_member_type_forces_blk (const_tree field, enum machine_mode mode) +rs6000_member_type_forces_blk (const_tree field, machine_mode mode) { return ((TARGET_SPE && TREE_CODE (TREE_TYPE (field)) == VECTOR_TYPE) || (TARGET_E500_DOUBLE && mode == DFmode)); @@ -8763,9 +8763,9 @@ rs6000_member_type_forces_blk (const_tree field, enum machine_mode mode) sub-tree. */ static int -rs6000_aggregate_candidate (const_tree type, enum machine_mode *modep) +rs6000_aggregate_candidate (const_tree type, machine_mode *modep) { - enum machine_mode mode; + machine_mode mode; HOST_WIDE_INT size; switch (TREE_CODE (type)) @@ -8930,8 +8930,8 @@ rs6000_aggregate_candidate (const_tree type, enum machine_mode *modep) Otherwise, set *ELT_MODE to MODE and *N_ELTS to 1, and return FALSE. */ static bool -rs6000_discover_homogeneous_aggregate (enum machine_mode mode, const_tree type, - enum machine_mode *elt_mode, +rs6000_discover_homogeneous_aggregate (machine_mode mode, const_tree type, + machine_mode *elt_mode, int *n_elts) { /* Note that we do not accept complex types at the top level as @@ -8940,7 +8940,7 @@ rs6000_discover_homogeneous_aggregate (enum machine_mode mode, const_tree type, can be elements of homogeneous aggregates, however. */ if (DEFAULT_ABI == ABI_ELFv2 && type && AGGREGATE_TYPE_P (type)) { - enum machine_mode field_mode = VOIDmode; + machine_mode field_mode = VOIDmode; int field_count = rs6000_aggregate_candidate (type, &field_mode); if (field_count > 0) @@ -9114,7 +9114,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, rtx libname ATTRIBUTE_UNUSED, int incoming, int libcall, int n_named_args, tree fndecl ATTRIBUTE_UNUSED, - enum machine_mode return_mode ATTRIBUTE_UNUSED) + machine_mode return_mode ATTRIBUTE_UNUSED) { static CUMULATIVE_ARGS zero_cumulative; @@ -9208,7 +9208,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, tree fntype, /* Return true if TYPE must be passed on the stack and not in registers. */ static bool -rs6000_must_pass_in_stack (enum machine_mode mode, const_tree type) +rs6000_must_pass_in_stack (machine_mode mode, const_tree type) { if (DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_ELFv2 || TARGET_64BIT) return must_pass_in_stack_var_size (mode, type); @@ -9226,7 +9226,7 @@ rs6000_must_pass_in_stack (enum machine_mode mode, const_tree type) argument slot. */ enum direction -function_arg_padding (enum machine_mode mode, const_tree type) +function_arg_padding (machine_mode mode, const_tree type) { #ifndef AGGREGATE_PADDING_FIXED #define AGGREGATE_PADDING_FIXED 0 @@ -9289,9 +9289,9 @@ function_arg_padding (enum machine_mode mode, const_tree type) Quadword align large synthetic vector types. */ static unsigned int -rs6000_function_arg_boundary (enum machine_mode mode, const_tree type) +rs6000_function_arg_boundary (machine_mode mode, const_tree type) { - enum machine_mode elt_mode; + machine_mode elt_mode; int n_elts; rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); @@ -9369,7 +9369,7 @@ rs6000_parm_offset (void) the parameter area. NWORDS of the parameter area are already used. */ static unsigned int -rs6000_parm_start (enum machine_mode mode, const_tree type, +rs6000_parm_start (machine_mode mode, const_tree type, unsigned int nwords) { unsigned int align; @@ -9381,7 +9381,7 @@ rs6000_parm_start (enum machine_mode mode, const_tree type, /* Compute the size (in words) of a function argument. */ static unsigned long -rs6000_arg_size (enum machine_mode mode, const_tree type) +rs6000_arg_size (machine_mode mode, const_tree type) { unsigned long size; @@ -9404,7 +9404,7 @@ rs6000_darwin64_record_arg_advance_flush (CUMULATIVE_ARGS *cum, { unsigned int startbit, endbit; int intregs, intoffset; - enum machine_mode mode; + machine_mode mode; /* Handle the situations where a float is taking up the first half of the GPR, and the other half is empty (typically due to @@ -9469,7 +9469,7 @@ rs6000_darwin64_record_arg_advance_recurse (CUMULATIVE_ARGS *cum, { HOST_WIDE_INT bitpos = startbitpos; tree ftype = TREE_TYPE (f); - enum machine_mode mode; + machine_mode mode; if (ftype == error_mark_node) continue; mode = TYPE_MODE (ftype); @@ -9538,7 +9538,7 @@ rs6000_darwin64_record_arg_advance_recurse (CUMULATIVE_ARGS *cum, bit ABI. These are record types where the mode is BLK or the structure is 8 bytes in size. */ static int -rs6000_darwin64_struct_check_p (enum machine_mode mode, const_tree type) +rs6000_darwin64_struct_check_p (machine_mode mode, const_tree type) { return rs6000_darwin64_abi && ((mode == BLKmode @@ -9557,10 +9557,10 @@ rs6000_darwin64_struct_check_p (enum machine_mode mode, const_tree type) itself. */ static void -rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode, +rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, machine_mode mode, const_tree type, bool named, int depth) { - enum machine_mode elt_mode; + machine_mode elt_mode; int n_elts; rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); @@ -9770,7 +9770,7 @@ rs6000_function_arg_advance_1 (CUMULATIVE_ARGS *cum, enum machine_mode mode, } static void -rs6000_function_arg_advance (cumulative_args_t cum, enum machine_mode mode, +rs6000_function_arg_advance (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { rs6000_function_arg_advance_1 (get_cumulative_args (cum), mode, type, named, @@ -9778,7 +9778,7 @@ rs6000_function_arg_advance (cumulative_args_t cum, enum machine_mode mode, } static rtx -spe_build_register_parallel (enum machine_mode mode, int gregno) +spe_build_register_parallel (machine_mode mode, int gregno) { rtx r1, r3, r5, r7; @@ -9815,7 +9815,7 @@ spe_build_register_parallel (enum machine_mode mode, int gregno) /* Determine where to put a SIMD argument on the SPE. */ static rtx -rs6000_spe_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode, +rs6000_spe_function_arg (const CUMULATIVE_ARGS *cum, machine_mode mode, const_tree type) { int gregno = cum->sysv_gregno; @@ -9848,7 +9848,7 @@ rs6000_spe_function_arg (const CUMULATIVE_ARGS *cum, enum machine_mode mode, if (gregno + n_words - 1 <= GP_ARG_MAX_REG) { rtx r1, r2; - enum machine_mode m = SImode; + machine_mode m = SImode; r1 = gen_rtx_REG (m, gregno); r1 = gen_rtx_EXPR_LIST (m, r1, const0_rtx); @@ -9875,7 +9875,7 @@ static void rs6000_darwin64_record_arg_flush (CUMULATIVE_ARGS *cum, HOST_WIDE_INT bitpos, rtx rvec[], int *k) { - enum machine_mode mode; + machine_mode mode; unsigned int regno; unsigned int startbit, endbit; int this_regno, intregs, intoffset; @@ -9951,7 +9951,7 @@ rs6000_darwin64_record_arg_recurse (CUMULATIVE_ARGS *cum, const_tree type, { HOST_WIDE_INT bitpos = startbitpos; tree ftype = TREE_TYPE (f); - enum machine_mode mode; + machine_mode mode; if (ftype == error_mark_node) continue; mode = TYPE_MODE (ftype); @@ -10065,7 +10065,7 @@ rs6000_darwin64_record_arg (CUMULATIVE_ARGS *orig_cum, const_tree type, /* Determine where to place an argument in 64-bit mode with 32-bit ABI. */ static rtx -rs6000_mixed_function_arg (enum machine_mode mode, const_tree type, +rs6000_mixed_function_arg (machine_mode mode, const_tree type, int align_words) { int n_units; @@ -10115,7 +10115,7 @@ rs6000_mixed_function_arg (enum machine_mode mode, const_tree type, to the GPRs and/or memory. Return the number of elements used. */ static int -rs6000_psave_function_arg (enum machine_mode mode, const_tree type, +rs6000_psave_function_arg (machine_mode mode, const_tree type, int align_words, rtx *rvec) { int k = 0; @@ -10130,7 +10130,7 @@ rs6000_psave_function_arg (enum machine_mode mode, const_tree type, { /* If this is partially on the stack, then we only include the portion actually in registers here. */ - enum machine_mode rmode = TARGET_32BIT ? SImode : DImode; + machine_mode rmode = TARGET_32BIT ? SImode : DImode; int i = 0; if (align_words + n_words > GP_ARG_NUM_REG) @@ -10170,7 +10170,7 @@ rs6000_psave_function_arg (enum machine_mode mode, const_tree type, Construct the final function_arg return value from it. */ static rtx -rs6000_finish_function_arg (enum machine_mode mode, rtx *rvec, int k) +rs6000_finish_function_arg (machine_mode mode, rtx *rvec, int k) { gcc_assert (k >= 1); @@ -10216,12 +10216,12 @@ rs6000_finish_function_arg (enum machine_mode mode, rtx *rvec, int k) itself. */ static rtx -rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +rs6000_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); enum rs6000_abi abi = DEFAULT_ABI; - enum machine_mode elt_mode; + machine_mode elt_mode; int n_elts; /* Return a marker to indicate whether CR1 needs to set or clear the @@ -10295,7 +10295,7 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, /* Vector parameters to varargs functions under AIX or Darwin get passed in memory and possibly also in GPRs. */ int align, align_words, n_words; - enum machine_mode part_mode; + machine_mode part_mode; /* Vector parameters must be 16-byte aligned. In 32-bit mode this means we need to take into account the offset @@ -10407,7 +10407,7 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, /* Check if the argument is split over registers and memory. This can only ever happen for long double or _Decimal128; complex types are handled via split_complex_arg. */ - enum machine_mode fmode = elt_mode; + machine_mode fmode = elt_mode; if (cum->fregno + (i + 1) * n_fpreg > FP_ARG_MAX_REG + 1) { gcc_assert (fmode == TFmode || fmode == TDmode); @@ -10437,7 +10437,7 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, { static bool warned; - enum machine_mode rmode = TARGET_32BIT ? SImode : DImode; + machine_mode rmode = TARGET_32BIT ? SImode : DImode; int n_words = rs6000_arg_size (mode, type); align_words += fpr_words; @@ -10481,14 +10481,14 @@ rs6000_function_arg (cumulative_args_t cum_v, enum machine_mode mode, returns the number of bytes used by the first element of the PARALLEL. */ static int -rs6000_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +rs6000_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); bool passed_in_gprs = true; int ret = 0; int align_words; - enum machine_mode elt_mode; + machine_mode elt_mode; int n_elts; rs6000_discover_homogeneous_aggregate (mode, type, &elt_mode, &n_elts); @@ -10581,7 +10581,7 @@ rs6000_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, static bool rs6000_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { if (DEFAULT_ABI == ABI_V4 && TARGET_IEEEQUAD && mode == TFmode) @@ -10643,7 +10643,7 @@ rs6000_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, static bool rs6000_parm_needs_stack (cumulative_args_t args_so_far, tree type) { - enum machine_mode mode; + machine_mode mode; int unsignedp; rtx entry_parm; @@ -10803,7 +10803,7 @@ static void rs6000_move_block_from_reg (int regno, rtx x, int nregs) { int i; - enum machine_mode reg_mode = TARGET_32BIT ? SImode : DImode; + machine_mode reg_mode = TARGET_32BIT ? SImode : DImode; if (nregs == 0) return; @@ -10843,7 +10843,7 @@ rs6000_move_block_from_reg (int regno, rtx x, int nregs) stack and set PRETEND_SIZE to the length of the registers pushed. */ static void -setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, +setup_incoming_varargs (cumulative_args_t cum, machine_mode mode, tree type, int *pretend_size ATTRIBUTE_UNUSED, int no_rtl) { @@ -11216,7 +11216,7 @@ rs6000_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, if (targetm.calls.split_complex_arg && TREE_CODE (type) == COMPLEX_TYPE) { tree elem_type = TREE_TYPE (type); - enum machine_mode elem_mode = TYPE_MODE (elem_type); + machine_mode elem_mode = TYPE_MODE (elem_type); int elem_size = GET_MODE_SIZE (elem_mode); if (elem_size < UNITS_PER_WORD) @@ -11816,7 +11816,7 @@ static rtx rs6000_expand_zeroop_builtin (enum insn_code icode, rtx target) { rtx pat; - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; if (icode == CODE_FOR_nothing) /* Builtin not supported on this processor. */ @@ -11844,8 +11844,8 @@ rs6000_expand_mtfsf_builtin (enum insn_code icode, tree exp) tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode mode0 = insn_data[icode].operand[0].mode; - enum machine_mode mode1 = insn_data[icode].operand[1].mode; + machine_mode mode0 = insn_data[icode].operand[0].mode; + machine_mode mode1 = insn_data[icode].operand[1].mode; if (icode == CODE_FOR_nothing) /* Builtin not supported on this processor. */ @@ -11884,8 +11884,8 @@ rs6000_expand_unop_builtin (enum insn_code icode, tree exp, rtx target) rtx pat; tree arg0 = CALL_EXPR_ARG (exp, 0); rtx op0 = expand_normal (arg0); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; if (icode == CODE_FOR_nothing) /* Builtin not supported on this processor. */ @@ -11933,8 +11933,8 @@ altivec_expand_abs_builtin (enum insn_code icode, tree exp, rtx target) rtx pat, scratch1, scratch2; tree arg0 = CALL_EXPR_ARG (exp, 0); rtx op0 = expand_normal (arg0); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; /* If we have invalid arguments, bail out before generating bad rtl. */ if (arg0 == error_mark_node) @@ -11967,9 +11967,9 @@ rs6000_expand_binop_builtin (enum insn_code icode, tree exp, rtx target) tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; if (icode == CODE_FOR_nothing) /* Builtin not supported on this processor. */ @@ -12041,9 +12041,9 @@ altivec_expand_predicate_builtin (enum insn_code icode, tree exp, rtx target) tree arg1 = CALL_EXPR_ARG (exp, 2); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode tmode = SImode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode tmode = SImode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; int cr6_form_int; if (TREE_CODE (cr6_form) != INTEGER_CST) @@ -12113,9 +12113,9 @@ paired_expand_lv_builtin (enum insn_code icode, tree exp, rtx target) rtx pat, addr; tree arg0 = CALL_EXPR_ARG (exp, 0); tree arg1 = CALL_EXPR_ARG (exp, 1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = Pmode; - enum machine_mode mode1 = Pmode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = Pmode; + machine_mode mode1 = Pmode; rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); @@ -12156,7 +12156,7 @@ paired_expand_lv_builtin (enum insn_code icode, tree exp, rtx target) /* Return a constant vector for use as a little-endian permute control vector to reverse the order of elements of the given vector mode. */ static rtx -swap_selector_for_mode (enum machine_mode mode) +swap_selector_for_mode (machine_mode mode) { /* These are little endian vectors, so their elements are reversed from what you would normally expect for a permute control vector. */ @@ -12197,7 +12197,7 @@ swap_selector_for_mode (enum machine_mode mode) with -maltivec=be specified. Issue the load followed by an element-reversing permute. */ void -altivec_expand_lvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec) +altivec_expand_lvx_be (rtx op0, rtx op1, machine_mode mode, unsigned unspec) { rtx tmp = gen_reg_rtx (mode); rtx load = gen_rtx_SET (VOIDmode, tmp, op1); @@ -12215,7 +12215,7 @@ altivec_expand_lvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec with -maltivec=be specified. Issue the store preceded by an element-reversing permute. */ void -altivec_expand_stvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec) +altivec_expand_stvx_be (rtx op0, rtx op1, machine_mode mode, unsigned unspec) { rtx tmp = gen_reg_rtx (mode); rtx store = gen_rtx_SET (VOIDmode, op0, tmp); @@ -12233,9 +12233,9 @@ altivec_expand_stvx_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspe /* Generate code for a "stve*x" built-in for a little endian target with -maltivec=be specified. Issue the store preceded by an element-reversing permute. */ void -altivec_expand_stvex_be (rtx op0, rtx op1, enum machine_mode mode, unsigned unspec) +altivec_expand_stvex_be (rtx op0, rtx op1, machine_mode mode, unsigned unspec) { - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode inner_mode = GET_MODE_INNER (mode); rtx tmp = gen_reg_rtx (mode); rtx stvx = gen_rtx_UNSPEC (inner_mode, gen_rtvec (1, tmp), unspec); rtx sel = swap_selector_for_mode (mode); @@ -12253,9 +12253,9 @@ altivec_expand_lv_builtin (enum insn_code icode, tree exp, rtx target, bool blk) rtx pat, addr; tree arg0 = CALL_EXPR_ARG (exp, 0); tree arg1 = CALL_EXPR_ARG (exp, 1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = Pmode; - enum machine_mode mode1 = Pmode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = Pmode; + machine_mode mode1 = Pmode; rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); @@ -12303,9 +12303,9 @@ spe_expand_stv_builtin (enum insn_code icode, tree exp) rtx op1 = expand_normal (arg1); rtx op2 = expand_normal (arg2); rtx pat; - enum machine_mode mode0 = insn_data[icode].operand[0].mode; - enum machine_mode mode1 = insn_data[icode].operand[1].mode; - enum machine_mode mode2 = insn_data[icode].operand[2].mode; + machine_mode mode0 = insn_data[icode].operand[0].mode; + machine_mode mode1 = insn_data[icode].operand[1].mode; + machine_mode mode2 = insn_data[icode].operand[2].mode; /* Invalid arguments. Bail before doing anything stoopid! */ if (arg0 == error_mark_node @@ -12336,9 +12336,9 @@ paired_expand_stv_builtin (enum insn_code icode, tree exp) rtx op1 = expand_normal (arg1); rtx op2 = expand_normal (arg2); rtx pat, addr; - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode1 = Pmode; - enum machine_mode mode2 = Pmode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode1 = Pmode; + machine_mode mode2 = Pmode; /* Invalid arguments. Bail before doing anything stoopid! */ if (arg0 == error_mark_node @@ -12377,10 +12377,10 @@ altivec_expand_stv_builtin (enum insn_code icode, tree exp) rtx op1 = expand_normal (arg1); rtx op2 = expand_normal (arg2); rtx pat, addr; - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode smode = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = Pmode; - enum machine_mode mode2 = Pmode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode smode = insn_data[icode].operand[1].mode; + machine_mode mode1 = Pmode; + machine_mode mode2 = Pmode; /* Invalid arguments. Bail before doing anything stoopid! */ if (arg0 == error_mark_node @@ -12485,7 +12485,7 @@ htm_expand_builtin (tree exp, rtx target, bool * expandedp) if (nonvoid) { - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; if (!target || GET_MODE (target) != tmode || !(*insn_data[icode].operand[0].predicate) (target, tmode)) @@ -12607,10 +12607,10 @@ rs6000_expand_ternop_builtin (enum insn_code icode, tree exp, rtx target) rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); rtx op2 = expand_normal (arg2); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; - enum machine_mode mode2 = insn_data[icode].operand[3].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode mode2 = insn_data[icode].operand[3].mode; if (icode == CODE_FOR_nothing) /* Builtin not supported on this processor. */ @@ -12769,7 +12769,7 @@ altivec_expand_ld_builtin (tree exp, rtx target, bool *expandedp) tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); unsigned int fcode = DECL_FUNCTION_CODE (fndecl); tree arg0; - enum machine_mode tmode, mode0; + machine_mode tmode, mode0; rtx pat, op0; enum insn_code icode; @@ -12830,7 +12830,7 @@ altivec_expand_st_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); unsigned int fcode = DECL_FUNCTION_CODE (fndecl); tree arg0, arg1; - enum machine_mode mode0, mode1; + machine_mode mode0, mode1; rtx pat, op0, op1; enum insn_code icode; @@ -12889,7 +12889,7 @@ altivec_expand_dst_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); enum rs6000_builtins fcode = (enum rs6000_builtins) DECL_FUNCTION_CODE (fndecl); tree arg0, arg1, arg2; - enum machine_mode mode0, mode1; + machine_mode mode0, mode1; rtx pat, op0, op1, op2; const struct builtin_description *d; size_t i; @@ -12944,8 +12944,8 @@ altivec_expand_dst_builtin (tree exp, rtx target ATTRIBUTE_UNUSED, static rtx altivec_expand_vec_init_builtin (tree type, tree exp, rtx target) { - enum machine_mode tmode = TYPE_MODE (type); - enum machine_mode inner_mode = GET_MODE_INNER (tmode); + machine_mode tmode = TYPE_MODE (type); + machine_mode inner_mode = GET_MODE_INNER (tmode); int i, n_elt = GET_MODE_NUNITS (tmode); gcc_assert (VECTOR_MODE_P (tmode)); @@ -12999,7 +12999,7 @@ get_element_number (tree vec_type, tree arg) static rtx altivec_expand_vec_set_builtin (tree exp) { - enum machine_mode tmode, mode1; + machine_mode tmode, mode1; tree arg0, arg1, arg2; int elt; rtx op0, op1; @@ -13031,7 +13031,7 @@ altivec_expand_vec_set_builtin (tree exp) static rtx altivec_expand_vec_ext_builtin (tree exp, rtx target) { - enum machine_mode tmode, mode0; + machine_mode tmode, mode0; tree arg0, arg1; int elt; rtx op0; @@ -13067,7 +13067,7 @@ altivec_expand_builtin (tree exp, rtx target, bool *expandedp) tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); tree arg0; rtx op0, pat; - enum machine_mode tmode, mode0; + machine_mode tmode, mode0; enum rs6000_builtins fcode = (enum rs6000_builtins) DECL_FUNCTION_CODE (fndecl); @@ -13430,7 +13430,7 @@ spe_expand_builtin (tree exp, rtx target, bool *expandedp) tree arg1, arg0; enum rs6000_builtins fcode = (enum rs6000_builtins) DECL_FUNCTION_CODE (fndecl); enum insn_code icode; - enum machine_mode tmode, mode0; + machine_mode tmode, mode0; rtx pat, op0; const struct builtin_description *d; size_t i; @@ -13564,8 +13564,8 @@ paired_expand_predicate_builtin (enum insn_code icode, tree exp, rtx target) tree arg1 = CALL_EXPR_ARG (exp, 2); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; int form_int; enum rtx_code code; @@ -13636,8 +13636,8 @@ spe_expand_predicate_builtin (enum insn_code icode, tree exp, rtx target) tree arg1 = CALL_EXPR_ARG (exp, 2); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; int form_int; enum rtx_code code; @@ -13747,8 +13747,8 @@ spe_expand_evsel_builtin (enum insn_code icode, tree exp, rtx target) rtx op1 = expand_normal (arg1); rtx op2 = expand_normal (arg2); rtx op3 = expand_normal (arg3); - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; gcc_assert (mode0 == mode1); @@ -13835,7 +13835,7 @@ rs6000_invalid_builtin (enum rs6000_builtins fncode) static rtx rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -13928,8 +13928,8 @@ rs6000_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, { int icode = (BYTES_BIG_ENDIAN ? (int) CODE_FOR_altivec_lvsr_direct : (int) CODE_FOR_altivec_lvsl_direct); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode = insn_data[icode].operand[1].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode = insn_data[icode].operand[1].mode; tree arg; rtx op, addr, pat; @@ -14040,7 +14040,7 @@ rs6000_init_builtins (void) { tree tdecl; tree ftype; - enum machine_mode mode; + machine_mode mode; if (TARGET_DEBUG_BUILTIN) fprintf (stderr, "rs6000_init_builtins%s%s%s%s\n", @@ -14854,7 +14854,7 @@ altivec_init_builtins (void) d = bdesc_altivec_preds; for (i = 0; i < ARRAY_SIZE (bdesc_altivec_preds); i++, d++) { - enum machine_mode mode1; + machine_mode mode1; tree type; if (rs6000_overloaded_builtin_p (d->code)) @@ -14896,7 +14896,7 @@ altivec_init_builtins (void) d = bdesc_abs; for (i = 0; i < ARRAY_SIZE (bdesc_abs); i++, d++) { - enum machine_mode mode0; + machine_mode mode0; tree type; mode0 = insn_data[d->icode].operand[0].mode; @@ -15174,8 +15174,8 @@ builtin_hasher::equal (builtin_hash_struct *p1, builtin_hash_struct *p2) arguments. Functions with fewer than 3 arguments use VOIDmode as the type of the argument. */ static tree -builtin_function_type (enum machine_mode mode_ret, enum machine_mode mode_arg0, - enum machine_mode mode_arg1, enum machine_mode mode_arg2, +builtin_function_type (machine_mode mode_ret, machine_mode mode_arg0, + machine_mode mode_arg1, machine_mode mode_arg2, enum rs6000_builtins builtin, const char *name) { struct builtin_hash_struct h; @@ -15445,7 +15445,7 @@ rs6000_common_init_builtins (void) d = bdesc_2arg; for (i = 0; i < ARRAY_SIZE (bdesc_2arg); i++, d++) { - enum machine_mode mode0, mode1, mode2; + machine_mode mode0, mode1, mode2; tree type; HOST_WIDE_INT mask = d->mask; @@ -15523,7 +15523,7 @@ rs6000_common_init_builtins (void) d = bdesc_1arg; for (i = 0; i < ARRAY_SIZE (bdesc_1arg); i++, d++) { - enum machine_mode mode0, mode1; + machine_mode mode0, mode1; tree type; HOST_WIDE_INT mask = d->mask; @@ -15710,7 +15710,7 @@ expand_block_clear (rtx operands[]) for (offset = 0; bytes > 0; offset += clear_bytes, bytes -= clear_bytes) { - enum machine_mode mode = BLKmode; + machine_mode mode = BLKmode; rtx dest; if (bytes >= 16 && TARGET_ALTIVEC && align >= 128) @@ -15818,7 +15818,7 @@ expand_block_move (rtx operands[]) rtx (*movmemsi) (rtx, rtx, rtx, rtx); rtx (*mov) (rtx, rtx); } gen_func; - enum machine_mode mode = BLKmode; + machine_mode mode = BLKmode; rtx src, dest; /* Altivec first, since it will be faster than a string move @@ -16042,7 +16042,7 @@ rs6000_output_load_multiple (rtx operands[3]) never be generated. */ void -validate_condition_mode (enum rtx_code code, enum machine_mode mode) +validate_condition_mode (enum rtx_code code, machine_mode mode) { gcc_assert ((GET_RTX_CLASS (code) == RTX_COMPARE || GET_RTX_CLASS (code) == RTX_COMM_COMPARE) @@ -16288,7 +16288,7 @@ mems_ok_for_quad_peep (rtx mem1, rtx mem2) rtx -rs6000_secondary_memory_needed_rtx (enum machine_mode mode) +rs6000_secondary_memory_needed_rtx (machine_mode mode) { static bool eliminated = false; rtx ret; @@ -16325,8 +16325,8 @@ rs6000_secondary_memory_needed_rtx (enum machine_mode mode) /* Return the mode to be used for memory when a secondary memory location is needed. For SDmode values we need to use DDmode, in all other cases we can use the same mode. */ -enum machine_mode -rs6000_secondary_memory_needed_mode (enum machine_mode mode) +machine_mode +rs6000_secondary_memory_needed_mode (machine_mode mode) { if (lra_in_progress && mode == SDmode) return DDmode; @@ -16406,7 +16406,7 @@ register_to_reg_type (rtx reg, bool *is_altivec) static bool rs6000_secondary_reload_simple_move (enum rs6000_reg_type to_type, enum rs6000_reg_type from_type, - enum machine_mode mode) + machine_mode mode) { int size; @@ -16444,7 +16444,7 @@ rs6000_secondary_reload_simple_move (enum rs6000_reg_type to_type, static bool rs6000_secondary_reload_direct_move (enum rs6000_reg_type to_type, enum rs6000_reg_type from_type, - enum machine_mode mode, + machine_mode mode, secondary_reload_info *sri, bool altivec_p) { @@ -16549,7 +16549,7 @@ rs6000_secondary_reload_direct_move (enum rs6000_reg_type to_type, static bool rs6000_secondary_reload_move (enum rs6000_reg_type to_type, enum rs6000_reg_type from_type, - enum machine_mode mode, + machine_mode mode, secondary_reload_info *sri, bool altivec_p) { @@ -16599,7 +16599,7 @@ static reg_class_t rs6000_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, - enum machine_mode mode, + machine_mode mode, secondary_reload_info *sri) { enum reg_class rclass = (enum reg_class) rclass_i; @@ -16897,7 +16897,7 @@ void rs6000_secondary_reload_inner (rtx reg, rtx mem, rtx scratch, bool store_p) { int regno = true_regnum (reg); - enum machine_mode mode = GET_MODE (reg); + machine_mode mode = GET_MODE (reg); enum reg_class rclass; rtx addr; rtx and_op2 = NULL_RTX; @@ -17292,7 +17292,7 @@ rs6000_instantiate_decls (void) static enum reg_class rs6000_preferred_reload_class (rtx x, enum reg_class rclass) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_VSX && x == CONST0_RTX (mode) && VSX_REG_CLASS_P (rclass)) return rclass; @@ -17365,7 +17365,7 @@ rs6000_debug_preferred_reload_class (rtx x, enum reg_class rclass) static bool rs6000_secondary_memory_needed (enum reg_class from_class, enum reg_class to_class, - enum machine_mode mode) + machine_mode mode) { enum rs6000_reg_type from_type, to_type; bool altivec_p = ((from_class == ALTIVEC_REGS) @@ -17391,7 +17391,7 @@ rs6000_secondary_memory_needed (enum reg_class from_class, static bool rs6000_debug_secondary_memory_needed (enum reg_class from_class, enum reg_class to_class, - enum machine_mode mode) + machine_mode mode) { bool ret = rs6000_secondary_memory_needed (from_class, to_class, mode); @@ -17411,7 +17411,7 @@ rs6000_debug_secondary_memory_needed (enum reg_class from_class, NO_REGS is returned. */ static enum reg_class -rs6000_secondary_reload_class (enum reg_class rclass, enum machine_mode mode, +rs6000_secondary_reload_class (enum reg_class rclass, machine_mode mode, rtx in) { int regno; @@ -17497,7 +17497,7 @@ rs6000_secondary_reload_class (enum reg_class rclass, enum machine_mode mode, /* Debug version of rs6000_secondary_reload_class. */ static enum reg_class rs6000_debug_secondary_reload_class (enum reg_class rclass, - enum machine_mode mode, rtx in) + machine_mode mode, rtx in) { enum reg_class ret = rs6000_secondary_reload_class (rclass, mode, in); fprintf (stderr, @@ -17513,8 +17513,8 @@ rs6000_debug_secondary_reload_class (enum reg_class rclass, /* Return nonzero if for CLASS a mode change from FROM to TO is invalid. */ static bool -rs6000_cannot_change_mode_class (enum machine_mode from, - enum machine_mode to, +rs6000_cannot_change_mode_class (machine_mode from, + machine_mode to, enum reg_class rclass) { unsigned from_size = GET_MODE_SIZE (from); @@ -17598,8 +17598,8 @@ rs6000_cannot_change_mode_class (enum machine_mode from, /* Debug version of rs6000_cannot_change_mode_class. */ static bool -rs6000_debug_cannot_change_mode_class (enum machine_mode from, - enum machine_mode to, +rs6000_debug_cannot_change_mode_class (machine_mode from, + machine_mode to, enum reg_class rclass) { bool ret = rs6000_cannot_change_mode_class (from, to, rclass); @@ -17621,7 +17621,7 @@ rs6000_output_move_128bit (rtx operands[]) { rtx dest = operands[0]; rtx src = operands[1]; - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); int dest_regno; int src_regno; bool dest_gpr_p, dest_fp_p, dest_vmx_p, dest_vsx_p; @@ -17773,7 +17773,7 @@ rs6000_output_move_128bit (rtx operands[]) bool rs6000_move_128bit_ok_p (rtx operands[]) { - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); return (gpc_reg_operand (operands[0], mode) || gpc_reg_operand (operands[1], mode)); } @@ -17807,7 +17807,7 @@ int ccr_bit (rtx op, int scc_p) { enum rtx_code code = GET_CODE (op); - enum machine_mode cc_mode; + machine_mode cc_mode; int cc_regnum; int base_bit; rtx reg; @@ -18844,7 +18844,7 @@ rs6000_assemble_visibility (tree decl, int vis) #endif enum rtx_code -rs6000_reverse_condition (enum machine_mode mode, enum rtx_code code) +rs6000_reverse_condition (machine_mode mode, enum rtx_code code) { /* Reversal of FP compares takes care -- an ordered compare becomes an unordered compare and vice versa. */ @@ -18861,9 +18861,9 @@ rs6000_reverse_condition (enum machine_mode mode, enum rtx_code code) represents the result of the compare. */ static rtx -rs6000_generate_compare (rtx cmp, enum machine_mode mode) +rs6000_generate_compare (rtx cmp, machine_mode mode) { - enum machine_mode comp_mode; + machine_mode comp_mode; rtx compare_result; enum rtx_code code = GET_CODE (cmp); rtx op0 = XEXP (cmp, 0); @@ -18902,7 +18902,7 @@ rs6000_generate_compare (rtx cmp, enum machine_mode mode) && FLOAT_MODE_P (mode)) { rtx cmp, or_result, compare_result2; - enum machine_mode op_mode = GET_MODE (op0); + machine_mode op_mode = GET_MODE (op0); bool reverse_p; if (op_mode == VOIDmode) @@ -19149,16 +19149,16 @@ rs6000_generate_compare (rtx cmp, enum machine_mode mode) /* Emit the RTL for an sISEL pattern. */ void -rs6000_emit_sISEL (enum machine_mode mode ATTRIBUTE_UNUSED, rtx operands[]) +rs6000_emit_sISEL (machine_mode mode ATTRIBUTE_UNUSED, rtx operands[]) { rs6000_emit_int_cmove (operands[0], operands[1], const1_rtx, const0_rtx); } void -rs6000_emit_sCOND (enum machine_mode mode, rtx operands[]) +rs6000_emit_sCOND (machine_mode mode, rtx operands[]) { rtx condition_rtx; - enum machine_mode op_mode; + machine_mode op_mode; enum rtx_code cond_code; rtx result = operands[0]; @@ -19195,7 +19195,7 @@ rs6000_emit_sCOND (enum machine_mode mode, rtx operands[]) { rtx not_result = gen_reg_rtx (CCEQmode); rtx not_op, rev_cond_rtx; - enum machine_mode cc_mode; + machine_mode cc_mode; cc_mode = GET_MODE (XEXP (condition_rtx, 0)); @@ -19225,7 +19225,7 @@ rs6000_emit_sCOND (enum machine_mode mode, rtx operands[]) /* Emit a branch of kind CODE to location LOC. */ void -rs6000_emit_cbranch (enum machine_mode mode, rtx operands[]) +rs6000_emit_cbranch (machine_mode mode, rtx operands[]) { rtx condition_rtx, loc_ref; @@ -19254,7 +19254,7 @@ output_cbranch (rtx op, const char *label, int reversed, rtx_insn *insn) static char string[64]; enum rtx_code code = GET_CODE (op); rtx cc_reg = XEXP (op, 0); - enum machine_mode mode = GET_MODE (cc_reg); + machine_mode mode = GET_MODE (cc_reg); int cc_regno = REGNO (cc_reg) - CR0_REGNO; int need_longbranch = label != NULL && get_attr_length (insn) == 8; int really_reversed = reversed ^ need_longbranch; @@ -19396,7 +19396,7 @@ static rtx rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) { rtx mask; - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); switch (code) { @@ -19430,7 +19430,7 @@ rs6000_emit_vector_compare_inner (enum rtx_code code, rtx op0, rtx op1) static rtx rs6000_emit_vector_compare (enum rtx_code rcode, rtx op0, rtx op1, - enum machine_mode dmode) + machine_mode dmode) { rtx mask; bool swap_operands = false; @@ -19565,10 +19565,10 @@ int rs6000_emit_vector_cond_expr (rtx dest, rtx op_true, rtx op_false, rtx cond, rtx cc_op0, rtx cc_op1) { - enum machine_mode dest_mode = GET_MODE (dest); - enum machine_mode mask_mode = GET_MODE (cc_op0); + machine_mode dest_mode = GET_MODE (dest); + machine_mode mask_mode = GET_MODE (cc_op0); enum rtx_code rcode = GET_CODE (cond); - enum machine_mode cc_mode = CCmode; + machine_mode cc_mode = CCmode; rtx mask; rtx cond2; rtx tmp; @@ -19644,8 +19644,8 @@ rs6000_emit_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) rtx op0 = XEXP (op, 0); rtx op1 = XEXP (op, 1); REAL_VALUE_TYPE c1; - enum machine_mode compare_mode = GET_MODE (op0); - enum machine_mode result_mode = GET_MODE (dest); + machine_mode compare_mode = GET_MODE (op0); + machine_mode result_mode = GET_MODE (dest); rtx temp; bool is_against_zero; @@ -19830,7 +19830,7 @@ static int rs6000_emit_int_cmove (rtx dest, rtx op, rtx true_cond, rtx false_cond) { rtx condition_rtx, cr; - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); enum rtx_code cond_code; rtx (*isel_func) (rtx, rtx, rtx, rtx, rtx); bool signedp; @@ -19897,7 +19897,7 @@ output_isel (rtx *operands) void rs6000_emit_minmax (rtx dest, enum rtx_code code, rtx op0, rtx op1) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); enum rtx_code c; rtx target; @@ -19947,7 +19947,7 @@ emit_unlikely_jump (rtx cond, rtx label) the zero_extend operation. */ static void -emit_load_locked (enum machine_mode mode, rtx reg, rtx mem) +emit_load_locked (machine_mode mode, rtx reg, rtx mem) { rtx (*fn) (rtx, rtx) = NULL; @@ -19983,7 +19983,7 @@ emit_load_locked (enum machine_mode mode, rtx reg, rtx mem) instruction in MODE. */ static void -emit_store_conditional (enum machine_mode mode, rtx res, rtx mem, rtx val) +emit_store_conditional (machine_mode mode, rtx res, rtx mem, rtx val) { rtx (*fn) (rtx, rtx, rtx) = NULL; @@ -20078,7 +20078,7 @@ rs6000_adjust_atomic_subword (rtx orig_mem, rtx *pshift, rtx *pmask) { rtx addr, align, shift, mask, mem; HOST_WIDE_INT shift_mask; - enum machine_mode mode = GET_MODE (orig_mem); + machine_mode mode = GET_MODE (orig_mem); /* For smaller modes, we have to implement this via SImode. */ shift_mask = (mode == QImode ? 0x18 : 0x10); @@ -20150,7 +20150,7 @@ rs6000_expand_atomic_compare_and_swap (rtx operands[]) { rtx boolval, retval, mem, oldval, newval, cond; rtx label1, label2, x, mask, shift; - enum machine_mode mode, orig_mode; + machine_mode mode, orig_mode; enum memmodel mod_s, mod_f; bool is_weak; @@ -20273,7 +20273,7 @@ void rs6000_expand_atomic_exchange (rtx operands[]) { rtx retval, mem, val, cond; - enum machine_mode mode; + machine_mode mode; enum memmodel model; rtx label, x, mask, shift; @@ -20332,8 +20332,8 @@ rs6000_expand_atomic_op (enum rtx_code code, rtx mem, rtx val, rtx orig_before, rtx orig_after, rtx model_rtx) { enum memmodel model = (enum memmodel) INTVAL (model_rtx); - enum machine_mode mode = GET_MODE (mem); - enum machine_mode store_mode = mode; + machine_mode mode = GET_MODE (mem); + machine_mode store_mode = mode; rtx label, x, cond, mask, shift; rtx before = orig_before, after = orig_after; @@ -20474,9 +20474,9 @@ rs6000_split_multireg_move (rtx dst, rtx src) /* The register number of the first register being moved. */ int reg; /* The mode that is to be moved. */ - enum machine_mode mode; + machine_mode mode; /* The mode that the move is being done in, and its size. */ - enum machine_mode reg_mode; + machine_mode reg_mode; int reg_mode_size; /* The number of registers that will be moved. */ int nregs; @@ -21584,7 +21584,7 @@ spe_func_has_64bit_regs_p (void) i = PATTERN (insn); if (GET_CODE (i) == SET) { - enum machine_mode mode = GET_MODE (SET_SRC (i)); + machine_mode mode = GET_MODE (SET_SRC (i)); if (SPE_VECTOR_MODE (mode)) return true; @@ -22554,7 +22554,7 @@ gen_frame_store (rtx reg, rtx frame_reg, int offset) Save REGNO into [FRAME_REG + OFFSET] in mode MODE. */ static rtx -emit_frame_save (rtx frame_reg, enum machine_mode mode, +emit_frame_save (rtx frame_reg, machine_mode mode, unsigned int regno, int offset, HOST_WIDE_INT frame_reg_to_sp) { rtx reg, insn; @@ -22577,7 +22577,7 @@ emit_frame_save (rtx frame_reg, enum machine_mode mode, converting to a valid addressing mode. */ static rtx -gen_frame_mem_offset (enum machine_mode mode, rtx reg, int offset) +gen_frame_mem_offset (machine_mode mode, rtx reg, int offset) { rtx int_rtx, offset_rtx; @@ -22839,7 +22839,7 @@ ptr_regno_for_savres (int sel) static rtx rs6000_emit_savres_rtx (rs6000_stack_t *info, rtx frame_reg_rtx, int save_area_offset, int lr_offset, - enum machine_mode reg_mode, int sel) + machine_mode reg_mode, int sel) { int i; int offset, start_reg, end_reg, n_regs, use_reg; @@ -22976,7 +22976,7 @@ void rs6000_emit_prologue (void) { rs6000_stack_t *info = rs6000_stack_info (); - enum machine_mode reg_mode = Pmode; + machine_mode reg_mode = Pmode; int reg_size = TARGET_32BIT ? 4 : 8; rtx sp_reg_rtx = gen_rtx_REG (Pmode, STACK_POINTER_REGNUM); rtx frame_reg_rtx = sp_reg_rtx; @@ -24229,7 +24229,7 @@ rs6000_emit_epilogue (int sibcall) rtx cfa_restores = NULL_RTX; rtx insn; rtx cr_save_reg = NULL_RTX; - enum machine_mode reg_mode = Pmode; + machine_mode reg_mode = Pmode; int reg_size = TARGET_32BIT ? 4 : 8; int i; bool exit_func; @@ -25236,7 +25236,7 @@ rs6000_output_function_epilogue (FILE *file, decl; decl = DECL_CHAIN (decl)) { rtx parameter = DECL_INCOMING_RTL (decl); - enum machine_mode mode = GET_MODE (parameter); + machine_mode mode = GET_MODE (parameter); if (GET_CODE (parameter) == REG) { @@ -25504,7 +25504,7 @@ static unsigned rs6000_hash_constant (rtx k) { enum rtx_code code = GET_CODE (k); - enum machine_mode mode = GET_MODE (k); + machine_mode mode = GET_MODE (k); unsigned result = (code << 3) ^ mode; const char *format; int flen, fidx; @@ -25667,7 +25667,7 @@ rs6000_output_symbol_ref (FILE *file, rtx x) written. */ void -output_toc (FILE *file, rtx x, int labelno, enum machine_mode mode) +output_toc (FILE *file, rtx x, int labelno, machine_mode mode) { char buf[256]; const char *name = buf; @@ -28348,7 +28348,7 @@ rs6000_handle_altivec_attribute (tree *node, bool *no_add_attrs) { tree type = *node, result = NULL_TREE; - enum machine_mode mode; + machine_mode mode; int unsigned_p; char altivec_type = ((args && TREE_CODE (args) == TREE_LIST && TREE_VALUE (args) @@ -28657,7 +28657,7 @@ rs6000_elf_asm_init_sections (void) /* Implement TARGET_SELECT_RTX_SECTION. */ static section * -rs6000_elf_select_rtx_section (enum machine_mode mode, rtx x, +rs6000_elf_select_rtx_section (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align) { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x, mode)) @@ -28751,7 +28751,7 @@ rs6000_elf_in_small_data_p (const_tree decl) /* Implement TARGET_USE_BLOCKS_FOR_CONSTANT_P. */ static bool -rs6000_use_blocks_for_constant_p (enum machine_mode mode, const_rtx x) +rs6000_use_blocks_for_constant_p (machine_mode mode, const_rtx x) { return !ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x, mode); } @@ -29068,7 +29068,7 @@ machopic_output_stub (FILE *file, const char *symb, const char *stub) #define SMALL_INT(X) ((UINTVAL (X) + 0x8000) < 0x10000) rtx -rs6000_machopic_legitimize_pic_address (rtx orig, enum machine_mode mode, +rs6000_machopic_legitimize_pic_address (rtx orig, machine_mode mode, rtx reg) { rtx base, offset; @@ -29568,7 +29568,7 @@ rs6000_xcoff_unique_section (tree decl, int reloc ATTRIBUTE_UNUSED) toc entry. */ static section * -rs6000_xcoff_select_rtx_section (enum machine_mode mode, rtx x, +rs6000_xcoff_select_rtx_section (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED) { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (x, mode)) @@ -29862,7 +29862,7 @@ static bool rs6000_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); switch (code) { @@ -30206,7 +30206,7 @@ rs6000_debug_rtx_costs (rtx x, int code, int outer_code, int opno, int *total, /* Debug form of ADDRESS_COST that is selected if -mdebug=cost. */ static int -rs6000_debug_address_cost (rtx x, enum machine_mode mode, +rs6000_debug_address_cost (rtx x, machine_mode mode, addr_space_t as, bool speed) { int ret = TARGET_ADDRESS_COST (x, mode, as, speed); @@ -30223,7 +30223,7 @@ rs6000_debug_address_cost (rtx x, enum machine_mode mode, CLASS1 to one of CLASS2. */ static int -rs6000_register_move_cost (enum machine_mode mode, +rs6000_register_move_cost (machine_mode mode, reg_class_t from, reg_class_t to) { int ret; @@ -30294,7 +30294,7 @@ rs6000_register_move_cost (enum machine_mode mode, or from memory. */ static int -rs6000_memory_move_cost (enum machine_mode mode, reg_class_t rclass, +rs6000_memory_move_cost (machine_mode mode, reg_class_t rclass, bool in ATTRIBUTE_UNUSED) { int ret; @@ -30377,7 +30377,7 @@ rs6000_builtin_reciprocal (unsigned int fn, bool md_fn, all of the vector elements. */ static rtx -rs6000_load_constant_and_splat (enum machine_mode mode, REAL_VALUE_TYPE dconst) +rs6000_load_constant_and_splat (machine_mode mode, REAL_VALUE_TYPE dconst) { rtx reg; @@ -30411,7 +30411,7 @@ rs6000_load_constant_and_splat (enum machine_mode mode, REAL_VALUE_TYPE dconst) static void rs6000_emit_madd (rtx target, rtx m1, rtx m2, rtx a) { - enum machine_mode mode = GET_MODE (target); + machine_mode mode = GET_MODE (target); rtx dst; dst = expand_ternary_op (mode, fma_optab, m1, m2, a, target, 0); @@ -30426,7 +30426,7 @@ rs6000_emit_madd (rtx target, rtx m1, rtx m2, rtx a) static void rs6000_emit_msub (rtx target, rtx m1, rtx m2, rtx a) { - enum machine_mode mode = GET_MODE (target); + machine_mode mode = GET_MODE (target); rtx dst; /* Altivec does not support fms directly; @@ -30449,7 +30449,7 @@ rs6000_emit_msub (rtx target, rtx m1, rtx m2, rtx a) static void rs6000_emit_nmsub (rtx dst, rtx m1, rtx m2, rtx a) { - enum machine_mode mode = GET_MODE (dst); + machine_mode mode = GET_MODE (dst); rtx r; /* This is a tad more complicated, since the fnma_optab is for @@ -30474,7 +30474,7 @@ rs6000_emit_nmsub (rtx dst, rtx m1, rtx m2, rtx a) void rs6000_emit_swdiv (rtx dst, rtx n, rtx d, bool note_p) { - enum machine_mode mode = GET_MODE (dst); + machine_mode mode = GET_MODE (dst); rtx one, x0, e0, x1, xprev, eprev, xnext, enext, u, v; int i; @@ -30549,7 +30549,7 @@ rs6000_emit_swdiv (rtx dst, rtx n, rtx d, bool note_p) void rs6000_emit_swrsqrt (rtx dst, rtx src) { - enum machine_mode mode = GET_MODE (src); + machine_mode mode = GET_MODE (src); rtx x0 = gen_reg_rtx (mode); rtx y = gen_reg_rtx (mode); @@ -30607,7 +30607,7 @@ rs6000_emit_swrsqrt (rtx dst, rtx src) void rs6000_emit_popcount (rtx dst, rtx src) { - enum machine_mode mode = GET_MODE (dst); + machine_mode mode = GET_MODE (dst); rtx tmp1, tmp2; /* Use the PPC ISA 2.06 popcnt{w,d} instruction if we can. */ @@ -30649,7 +30649,7 @@ rs6000_emit_popcount (rtx dst, rtx src) void rs6000_emit_parity (rtx dst, rtx src) { - enum machine_mode mode = GET_MODE (dst); + machine_mode mode = GET_MODE (dst); rtx tmp; tmp = gen_reg_rtx (mode); @@ -30819,7 +30819,7 @@ altivec_expand_vec_perm_le (rtx operands[4]) rtx sel = operands[3]; rtx tmp = target; rtx norreg = gen_reg_rtx (V16QImode); - enum machine_mode mode = GET_MODE (target); + machine_mode mode = GET_MODE (target); /* Get everything in regs so the pattern matches. */ if (!REG_P (op0)) @@ -31023,8 +31023,8 @@ altivec_expand_vec_perm_const (rtx operands[4]) if (i == 16) { enum insn_code icode = patterns[j].impl; - enum machine_mode omode = insn_data[icode].operand[0].mode; - enum machine_mode imode = insn_data[icode].operand[1].mode; + machine_mode omode = insn_data[icode].operand[0].mode; + machine_mode imode = insn_data[icode].operand[1].mode; /* For little-endian, don't use vpkuwum and vpkuhum if the underlying vector type is not V4SI and V8HI, respectively. @@ -31115,7 +31115,7 @@ rs6000_expand_vec_perm_const_1 (rtx target, rtx op0, rtx op1, /* Success! */ if (target != NULL) { - enum machine_mode vmode, dmode; + machine_mode vmode, dmode; rtvec v; vmode = GET_MODE (target); @@ -31150,7 +31150,7 @@ rs6000_expand_vec_perm_const (rtx operands[4]) /* Test whether a constant permutation is supported. */ static bool -rs6000_vectorize_vec_perm_const_ok (enum machine_mode vmode, +rs6000_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel) { /* AltiVec (and thus VSX) can handle arbitrary permutations. */ @@ -31173,9 +31173,9 @@ rs6000_vectorize_vec_perm_const_ok (enum machine_mode vmode, static void rs6000_do_expand_vec_perm (rtx target, rtx op0, rtx op1, - enum machine_mode vmode, unsigned nelt, rtx perm[]) + machine_mode vmode, unsigned nelt, rtx perm[]) { - enum machine_mode imode; + machine_mode imode; rtx x; imode = vmode; @@ -31197,7 +31197,7 @@ rs6000_do_expand_vec_perm (rtx target, rtx op0, rtx op1, void rs6000_expand_extract_even (rtx target, rtx op0, rtx op1) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); unsigned i, nelt = GET_MODE_NUNITS (vmode); rtx perm[16]; @@ -31212,7 +31212,7 @@ rs6000_expand_extract_even (rtx target, rtx op0, rtx op1) void rs6000_expand_interleave (rtx target, rtx op0, rtx op1, bool highp) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); unsigned i, high, nelt = GET_MODE_NUNITS (vmode); rtx perm[16]; @@ -31246,11 +31246,11 @@ rs6000_scale_v2df (rtx tgt, rtx src, int scale) /* Return an RTX representing where to find the function value of a function returning MODE. */ static rtx -rs6000_complex_function_value (enum machine_mode mode) +rs6000_complex_function_value (machine_mode mode) { unsigned int regno; rtx r1, r2; - enum machine_mode inner = GET_MODE_INNER (mode); + machine_mode inner = GET_MODE_INNER (mode); unsigned int inner_bytes = GET_MODE_SIZE (inner); if (FLOAT_MODE_P (mode) && TARGET_HARD_FLOAT && TARGET_FPRS) @@ -31286,9 +31286,9 @@ rs6000_function_value (const_tree valtype, const_tree fn_decl_or_type ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; unsigned int regno; - enum machine_mode elt_mode; + machine_mode elt_mode; int n_elts; /* Special handling for structs in darwin64. */ @@ -31407,7 +31407,7 @@ rs6000_function_value (const_tree valtype, /* Define how to find the value returned by a library function assuming the value has mode MODE. */ rtx -rs6000_libcall_value (enum machine_mode mode) +rs6000_libcall_value (machine_mode mode) { unsigned int regno; @@ -31515,7 +31515,7 @@ rs6000_dwarf_register_span (rtx reg) rtx parts[8]; int i, words; unsigned regno = REGNO (reg); - enum machine_mode mode = GET_MODE (reg); + machine_mode mode = GET_MODE (reg); if (TARGET_SPE && regno < 32 @@ -31558,7 +31558,7 @@ rs6000_init_dwarf_reg_sizes_extra (tree address) if (TARGET_SPE) { int i; - enum machine_mode mode = TYPE_MODE (char_type_node); + machine_mode mode = TYPE_MODE (char_type_node); rtx addr = expand_expr (address, NULL_RTX, VOIDmode, EXPAND_NORMAL); rtx mem = gen_rtx_MEM (BLKmode, addr); rtx value = gen_int_mode (4, mode); @@ -31576,7 +31576,7 @@ rs6000_init_dwarf_reg_sizes_extra (tree address) if (TARGET_MACHO && ! TARGET_ALTIVEC) { int i; - enum machine_mode mode = TYPE_MODE (char_type_node); + machine_mode mode = TYPE_MODE (char_type_node); rtx addr = expand_expr (address, NULL_RTX, VOIDmode, EXPAND_NORMAL); rtx mem = gen_rtx_MEM (BLKmode, addr); rtx value = gen_int_mode (16, mode); @@ -31648,7 +31648,7 @@ rs6000_dbx_register_number (unsigned int regno, unsigned int format) } /* target hook eh_return_filter_mode */ -static enum machine_mode +static machine_mode rs6000_eh_return_filter_mode (void) { return TARGET_32BIT ? SImode : word_mode; @@ -31656,7 +31656,7 @@ rs6000_eh_return_filter_mode (void) /* Target hook for scalar_mode_supported_p. */ static bool -rs6000_scalar_mode_supported_p (enum machine_mode mode) +rs6000_scalar_mode_supported_p (machine_mode mode) { if (DECIMAL_FLOAT_MODE_P (mode)) return default_decimal_float_supported_p (); @@ -31666,7 +31666,7 @@ rs6000_scalar_mode_supported_p (enum machine_mode mode) /* Target hook for vector_mode_supported_p. */ static bool -rs6000_vector_mode_supported_p (enum machine_mode mode) +rs6000_vector_mode_supported_p (machine_mode mode) { if (TARGET_PAIRED_FLOAT && PAIRED_VECTOR_MODE (mode)) @@ -32474,7 +32474,7 @@ rs6000_can_inline_p (tree caller, tree callee) memory requirements (either offetable or REG+REG addressing). */ rtx -rs6000_allocate_stack_temp (enum machine_mode mode, +rs6000_allocate_stack_temp (machine_mode mode, bool offsettable_p, bool reg_reg_p) { @@ -32565,7 +32565,7 @@ rs6000_address_for_altivec (rtx x) for particular insns, though. Only easy FP constants are acceptable. */ static bool -rs6000_legitimate_constant_p (enum machine_mode mode, rtx x) +rs6000_legitimate_constant_p (machine_mode mode, rtx x) { if (TARGET_ELF && tls_referenced_p (x)) return false; @@ -32838,7 +32838,7 @@ rs6000_split_logical_inner (rtx dest, rtx op1, rtx op2, enum rtx_code code, - enum machine_mode mode, + machine_mode mode, bool complement_final_p, bool complement_op1_p, bool complement_op2_p) @@ -33028,8 +33028,8 @@ rs6000_split_logical (rtx operands[3], bool complement_op1_p, bool complement_op2_p) { - enum machine_mode mode = GET_MODE (operands[0]); - enum machine_mode sub_mode; + machine_mode mode = GET_MODE (operands[0]); + machine_mode sub_mode; rtx op0, op1, op2; int sub_size, regno0, regno1, nregs, i; @@ -33161,9 +33161,9 @@ expand_fusion_gpr_load (rtx *operands) rtx orig_mem = operands[3]; rtx new_addr, new_mem, orig_addr, offset; enum rtx_code plus_or_lo_sum; - enum machine_mode target_mode = GET_MODE (target); - enum machine_mode extend_mode = target_mode; - enum machine_mode ptr_mode = Pmode; + machine_mode target_mode = GET_MODE (target); + machine_mode extend_mode = target_mode; + machine_mode ptr_mode = Pmode; enum rtx_code extend = UNKNOWN; if (GET_CODE (orig_mem) == ZERO_EXTEND @@ -33225,7 +33225,7 @@ emit_fusion_gpr_load (rtx target, rtx mem) const char *load_str = NULL; const char *mode_name = NULL; char insn_template[80]; - enum machine_mode mode; + machine_mode mode; const char *comment_str = ASM_COMMENT_START; if (GET_CODE (mem) == ZERO_EXTEND) @@ -34023,7 +34023,7 @@ mark_swaps_for_removal (swap_web_entry *insn_entry, unsigned int i) FOR_EACH_INSN_INFO_USE (use, insn_info) { /* Ignore uses for addressability. */ - enum machine_mode mode = GET_MODE (DF_REF_REG (use)); + machine_mode mode = GET_MODE (DF_REF_REG (use)); if (!VECTOR_MODE_P (mode)) continue; @@ -34107,7 +34107,7 @@ permute_load (rtx_insn *insn) rtx body = PATTERN (insn); rtx mem_op = SET_SRC (body); rtx tgt_reg = SET_DEST (body); - enum machine_mode mode = GET_MODE (tgt_reg); + machine_mode mode = GET_MODE (tgt_reg); int n_elts = GET_MODE_NUNITS (mode); int half_elts = n_elts / 2; rtx par = gen_rtx_PARALLEL (mode, rtvec_alloc (n_elts)); @@ -34132,7 +34132,7 @@ permute_store (rtx_insn *insn) { rtx body = PATTERN (insn); rtx src_reg = SET_SRC (body); - enum machine_mode mode = GET_MODE (src_reg); + machine_mode mode = GET_MODE (src_reg); int n_elts = GET_MODE_NUNITS (mode); int half_elts = n_elts / 2; rtx par = gen_rtx_PARALLEL (mode, rtvec_alloc (n_elts)); @@ -34354,7 +34354,7 @@ rs6000_analyze_swaps (function *fun) FOR_EACH_INSN_INFO_USE (mention, insn_info) { /* We use DF_REF_REAL_REG here to get inside any subregs. */ - enum machine_mode mode = GET_MODE (DF_REF_REAL_REG (mention)); + machine_mode mode = GET_MODE (DF_REF_REAL_REG (mention)); /* If a use gets its value from a call insn, it will be a hard register and will look like (reg:V4SI 3 3). @@ -34390,7 +34390,7 @@ rs6000_analyze_swaps (function *fun) FOR_EACH_INSN_INFO_DEF (mention, insn_info) { /* We use DF_REF_REAL_REG here to get inside any subregs. */ - enum machine_mode mode = GET_MODE (DF_REF_REAL_REG (mention)); + machine_mode mode = GET_MODE (DF_REF_REAL_REG (mention)); /* If we're loading up a hard vector register for a call, it looks like (set (reg:V4SI 9 9) (...)). The df diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index f343d7a..5af255c 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2066,7 +2066,7 @@ do { \ After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */ extern unsigned rs6000_pmode; -#define Pmode ((enum machine_mode)rs6000_pmode) +#define Pmode ((machine_mode)rs6000_pmode) /* Supply definition of STACK_SIZE_MODE for allocate_dynamic_stack_space. */ #define STACK_SIZE_MODE (TARGET_32BIT ? SImode : DImode) diff --git a/gcc/config/rx/rx-protos.h b/gcc/config/rx/rx-protos.h index 6cfa8fc..da61621 100644 --- a/gcc/config/rx/rx-protos.h +++ b/gcc/config/rx/rx-protos.h @@ -32,15 +32,15 @@ extern int rx_align_for_label (rtx, int); extern void rx_emit_stack_popm (rtx *, bool); extern void rx_emit_stack_pushm (rtx *); extern char * rx_gen_move_template (rtx *, bool); -extern bool rx_is_legitimate_constant (enum machine_mode, rtx); +extern bool rx_is_legitimate_constant (machine_mode, rtx); extern bool rx_is_restricted_memory_address (rtx, - enum machine_mode); -extern bool rx_match_ccmode (rtx, enum machine_mode); + machine_mode); +extern bool rx_match_ccmode (rtx, machine_mode); extern rtx rx_maybe_pidify_operand (rtx, int); extern void rx_notice_update_cc (rtx, rtx); -extern void rx_split_cbranch (enum machine_mode, enum rtx_code, +extern void rx_split_cbranch (machine_mode, enum rtx_code, rtx, rtx, rtx); -extern enum machine_mode rx_select_cc_mode (enum rtx_code, rtx, rtx); +extern machine_mode rx_select_cc_mode (enum rtx_code, rtx, rtx); #endif #endif /* GCC_RX_PROTOS_H */ diff --git a/gcc/config/rx/rx.c b/gcc/config/rx/rx.c index 3b28228..0aeb611 100644 --- a/gcc/config/rx/rx.c +++ b/gcc/config/rx/rx.c @@ -119,7 +119,7 @@ static void rx_print_operand (FILE *, rtx, int); #define CC_FLAG_C (1 << 3) #define CC_FLAG_FP (1 << 4) /* Fake, to differentiate CC_Fmode. */ -static unsigned int flags_from_mode (enum machine_mode mode); +static unsigned int flags_from_mode (machine_mode mode); static unsigned int flags_from_code (enum rtx_code code); /* Return true if OP is a reference to an object in a PID data area. */ @@ -166,7 +166,7 @@ rx_pid_data_operand (rtx op) static rtx rx_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (rx_pid_data_operand (x) == PID_UNENCODED) { @@ -198,7 +198,7 @@ rx_small_data_operand (rtx op) } static bool -rx_is_legitimate_address (enum machine_mode mode, rtx x, +rx_is_legitimate_address (machine_mode mode, rtx x, bool strict ATTRIBUTE_UNUSED) { if (RTX_OK_FOR_BASE (x, strict)) @@ -296,7 +296,7 @@ rx_is_legitimate_address (enum machine_mode mode, rtx x, or pre/post increment/decrement. */ bool -rx_is_restricted_memory_address (rtx mem, enum machine_mode mode) +rx_is_restricted_memory_address (rtx mem, machine_mode mode) { if (! rx_is_legitimate_address (mode, mem, reload_in_progress || reload_completed)) @@ -570,7 +570,7 @@ rx_print_operand (FILE * file, rtx op, int letter) case 'B': { enum rtx_code code = GET_CODE (op); - enum machine_mode mode = GET_MODE (XEXP (op, 0)); + machine_mode mode = GET_MODE (XEXP (op, 0)); const char *ret; if (mode == CC_Fmode) @@ -1066,7 +1066,7 @@ rx_round_up (unsigned int value, unsigned int alignment) occupied by an argument of type TYPE and mode MODE. */ static unsigned int -rx_function_arg_size (enum machine_mode mode, const_tree type) +rx_function_arg_size (machine_mode mode, const_tree type) { unsigned int num_bytes; @@ -1086,7 +1086,7 @@ rx_function_arg_size (enum machine_mode mode, const_tree type) variable parameter list. */ static rtx -rx_function_arg (cumulative_args_t cum, enum machine_mode mode, +rx_function_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { unsigned int next_reg; @@ -1124,14 +1124,14 @@ rx_function_arg (cumulative_args_t cum, enum machine_mode mode, } static void -rx_function_arg_advance (cumulative_args_t cum, enum machine_mode mode, +rx_function_arg_advance (cumulative_args_t cum, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { *get_cumulative_args (cum) += rx_function_arg_size (mode, type); } static unsigned int -rx_function_arg_boundary (enum machine_mode mode ATTRIBUTE_UNUSED, +rx_function_arg_boundary (machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED) { /* Older versions of the RX backend aligned all on-stack arguments @@ -1158,7 +1158,7 @@ rx_function_value (const_tree ret_type, const_tree fn_decl_or_type ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode = TYPE_MODE (ret_type); + machine_mode mode = TYPE_MODE (ret_type); /* RX ABI specifies that small integer types are promoted to int when returned by a function. */ @@ -1174,9 +1174,9 @@ rx_function_value (const_tree ret_type, /* TARGET_PROMOTE_FUNCTION_MODE must behave in the same way with regard to function returns as does TARGET_FUNCTION_VALUE. */ -static enum machine_mode +static machine_mode rx_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, int * punsignedp ATTRIBUTE_UNUSED, const_tree funtype ATTRIBUTE_UNUSED, int for_return) @@ -2267,7 +2267,7 @@ rx_in_small_data (const_tree decl) The only special thing we do here is to honor small data. */ static section * -rx_select_rtx_section (enum machine_mode mode, +rx_select_rtx_section (machine_mode mode, rtx x, unsigned HOST_WIDE_INT align) { @@ -2573,7 +2573,7 @@ static rtx rx_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -2876,7 +2876,7 @@ rx_is_ms_bitfield_layout (const_tree record_type ATTRIBUTE_UNUSED) operand on the RX. X is already known to satisfy CONSTANT_P. */ bool -rx_is_legitimate_constant (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +rx_is_legitimate_constant (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { switch (GET_CODE (x)) { @@ -2925,7 +2925,7 @@ rx_is_legitimate_constant (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) } static int -rx_address_cost (rtx addr, enum machine_mode mode ATTRIBUTE_UNUSED, +rx_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed) { rtx a, b; @@ -3047,7 +3047,7 @@ rx_trampoline_init (rtx tramp, tree fndecl, rtx chain) } static int -rx_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +rx_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t regclass ATTRIBUTE_UNUSED, bool in) { @@ -3057,7 +3057,7 @@ rx_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, /* Convert a CC_MODE to the set of flags that it represents. */ static unsigned int -flags_from_mode (enum machine_mode mode) +flags_from_mode (machine_mode mode) { switch (mode) { @@ -3078,7 +3078,7 @@ flags_from_mode (enum machine_mode mode) /* Convert a set of flags to a CC_MODE that can implement it. */ -static enum machine_mode +static machine_mode mode_from_flags (unsigned int f) { if (f & CC_FLAG_FP) @@ -3126,8 +3126,8 @@ flags_from_code (enum rtx_code code) /* Return a CC_MODE of which both M1 and M2 are subsets. */ -static enum machine_mode -rx_cc_modes_compatible (enum machine_mode m1, enum machine_mode m2) +static machine_mode +rx_cc_modes_compatible (machine_mode m1, machine_mode m2) { unsigned f; @@ -3146,7 +3146,7 @@ rx_cc_modes_compatible (enum machine_mode m1, enum machine_mode m2) /* Return the minimal CC mode needed to implement (CMP_CODE X Y). */ -enum machine_mode +machine_mode rx_select_cc_mode (enum rtx_code cmp_code, rtx x, rtx y) { if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) @@ -3162,7 +3162,7 @@ rx_select_cc_mode (enum rtx_code cmp_code, rtx x, rtx y) CC_MODE, and use that in branches based on that compare. */ void -rx_split_cbranch (enum machine_mode cc_mode, enum rtx_code cmp1, +rx_split_cbranch (machine_mode cc_mode, enum rtx_code cmp1, rtx c1, rtx c2, rtx label) { rtx flags, x; @@ -3181,10 +3181,10 @@ rx_split_cbranch (enum machine_mode cc_mode, enum rtx_code cmp1, /* A helper function for matching parallels that set the flags. */ bool -rx_match_ccmode (rtx insn, enum machine_mode cc_mode) +rx_match_ccmode (rtx insn, machine_mode cc_mode) { rtx op1, flags; - enum machine_mode flags_mode; + machine_mode flags_mode; gcc_checking_assert (XVECLEN (PATTERN (insn), 0) == 2); diff --git a/gcc/config/s390/predicates.md b/gcc/config/s390/predicates.md index 237cfa7..fd6fc63 100644 --- a/gcc/config/s390/predicates.md +++ b/gcc/config/s390/predicates.md @@ -314,7 +314,7 @@ (define_special_predicate "load_multiple_operation" (match_code "parallel") { - enum machine_mode elt_mode; + machine_mode elt_mode; int count = XVECLEN (op, 0); unsigned int dest_regno; rtx src_addr; @@ -417,7 +417,7 @@ (define_special_predicate "store_multiple_operation" (match_code "parallel") { - enum machine_mode elt_mode; + machine_mode elt_mode; int count = XVECLEN (op, 0); unsigned int src_regno; rtx dest_addr; diff --git a/gcc/config/s390/s390-protos.h b/gcc/config/s390/s390-protos.h index b0197b5..594b576 100644 --- a/gcc/config/s390/s390-protos.h +++ b/gcc/config/s390/s390-protos.h @@ -40,25 +40,25 @@ extern bool s390_can_use_simple_return_insn (void); extern bool s390_can_use_return_insn (void); extern void s390_function_profiler (FILE *, int); extern void s390_set_has_landing_pad_p (bool); -extern bool s390_hard_regno_mode_ok (unsigned int, enum machine_mode); +extern bool s390_hard_regno_mode_ok (unsigned int, machine_mode); extern bool s390_hard_regno_rename_ok (unsigned int, unsigned int); -extern int s390_class_max_nregs (enum reg_class, enum machine_mode); +extern int s390_class_max_nregs (enum reg_class, machine_mode); #ifdef RTX_CODE extern int s390_extra_constraint_str (rtx, int, const char *); extern int s390_const_ok_for_constraint_p (HOST_WIDE_INT, int, const char *); extern int s390_const_double_ok_for_constraint_p (rtx, int, const char *); -extern int s390_single_part (rtx, enum machine_mode, enum machine_mode, int); -extern unsigned HOST_WIDE_INT s390_extract_part (rtx, enum machine_mode, int); +extern int s390_single_part (rtx, machine_mode, machine_mode, int); +extern unsigned HOST_WIDE_INT s390_extract_part (rtx, machine_mode, int); extern bool s390_contiguous_bitmask_p (unsigned HOST_WIDE_INT, int, int *, int *); -extern bool s390_split_ok_p (rtx, rtx, enum machine_mode, int); +extern bool s390_split_ok_p (rtx, rtx, machine_mode, int); extern bool s390_overlap_p (rtx, rtx, HOST_WIDE_INT); extern bool s390_offset_p (rtx, rtx, rtx); extern int tls_symbolic_operand (rtx); -extern bool s390_match_ccmode (rtx_insn *, enum machine_mode); -extern enum machine_mode s390_tm_ccmode (rtx, rtx, bool); -extern enum machine_mode s390_select_ccmode (enum rtx_code, rtx, rtx); +extern bool s390_match_ccmode (rtx_insn *, machine_mode); +extern machine_mode s390_tm_ccmode (rtx, rtx, bool); +extern machine_mode s390_select_ccmode (enum rtx_code, rtx, rtx); extern rtx s390_emit_compare (enum rtx_code, rtx, rtx); extern rtx_insn *s390_emit_jump (rtx, rtx); extern bool symbolic_reference_mentioned_p (rtx); @@ -68,12 +68,12 @@ extern bool preferred_la_operand_p (rtx, rtx); extern int legitimate_pic_operand_p (rtx); extern bool legitimate_reload_constant_p (rtx); extern rtx legitimize_pic_address (rtx, rtx); -extern rtx legitimize_reload_address (rtx, enum machine_mode, int, int); +extern rtx legitimize_reload_address (rtx, machine_mode, int, int); extern enum reg_class s390_secondary_input_reload_class (enum reg_class, - enum machine_mode, + machine_mode, rtx); extern enum reg_class s390_secondary_output_reload_class (enum reg_class, - enum machine_mode, + machine_mode, rtx); extern void s390_reload_larl_operand (rtx , rtx , rtx); extern void s390_reload_symref_address (rtx , rtx , rtx , bool); @@ -85,23 +85,23 @@ extern void s390_expand_setmem (rtx, rtx, rtx); extern bool s390_expand_cmpmem (rtx, rtx, rtx, rtx); extern bool s390_expand_addcc (enum rtx_code, rtx, rtx, rtx, rtx, rtx); extern bool s390_expand_insv (rtx, rtx, rtx, rtx); -extern void s390_expand_cs_hqi (enum machine_mode, rtx, rtx, rtx, +extern void s390_expand_cs_hqi (machine_mode, rtx, rtx, rtx, rtx, rtx, bool); -extern void s390_expand_atomic (enum machine_mode, enum rtx_code, +extern void s390_expand_atomic (machine_mode, enum rtx_code, rtx, rtx, rtx, bool); extern void s390_expand_tbegin (rtx, rtx, rtx, bool); extern rtx s390_return_addr_rtx (int, rtx); extern rtx s390_back_chain_rtx (void); extern rtx_insn *s390_emit_call (rtx, rtx, rtx, rtx); extern void s390_expand_logical_operator (enum rtx_code, - enum machine_mode, rtx *); + machine_mode, rtx *); extern bool s390_logical_operator_ok_p (rtx *); extern void s390_narrow_logical_operator (enum rtx_code, rtx *, rtx *); extern void s390_split_access_reg (rtx, rtx *, rtx *); extern void print_operand_address (FILE *, rtx); extern void print_operand (FILE *, rtx, int); -extern void s390_output_pool_entry (rtx, enum machine_mode, unsigned int); +extern void s390_output_pool_entry (rtx, machine_mode, unsigned int); extern int s390_label_align (rtx); extern int s390_agen_dep_p (rtx_insn *, rtx_insn *); extern rtx_insn *s390_load_got (void); diff --git a/gcc/config/s390/s390.c b/gcc/config/s390/s390.c index e8d7395..874eb7c 100644 --- a/gcc/config/s390/s390.c +++ b/gcc/config/s390/s390.c @@ -529,19 +529,19 @@ s390_label_align (rtx label) return align_labels_log; } -static enum machine_mode +static machine_mode s390_libgcc_cmp_return_mode (void) { return TARGET_64BIT ? DImode : SImode; } -static enum machine_mode +static machine_mode s390_libgcc_shift_count_mode (void) { return TARGET_64BIT ? DImode : SImode; } -static enum machine_mode +static machine_mode s390_unwind_word_mode (void) { return TARGET_64BIT ? DImode : SImode; @@ -549,7 +549,7 @@ s390_unwind_word_mode (void) /* Return true if the back end supports mode MODE. */ static bool -s390_scalar_mode_supported_p (enum machine_mode mode) +s390_scalar_mode_supported_p (machine_mode mode) { /* In contrast to the default implementation reject TImode constants on 31bit TARGET_ZARCH for ABI compliance. */ @@ -574,8 +574,8 @@ s390_set_has_landing_pad_p (bool value) mode which is compatible with both. Otherwise, return VOIDmode. */ -static enum machine_mode -s390_cc_modes_compatible (enum machine_mode m1, enum machine_mode m2) +static machine_mode +s390_cc_modes_compatible (machine_mode m1, machine_mode m2) { if (m1 == m2) return m1; @@ -610,9 +610,9 @@ s390_cc_modes_compatible (enum machine_mode m1, enum machine_mode m2) CC mode is at least as constrained as REQ_MODE. */ static bool -s390_match_ccmode_set (rtx set, enum machine_mode req_mode) +s390_match_ccmode_set (rtx set, machine_mode req_mode) { - enum machine_mode set_mode; + machine_mode set_mode; gcc_assert (GET_CODE (set) == SET); @@ -662,7 +662,7 @@ s390_match_ccmode_set (rtx set, enum machine_mode req_mode) If REQ_MODE is VOIDmode, always return false. */ bool -s390_match_ccmode (rtx_insn *insn, enum machine_mode req_mode) +s390_match_ccmode (rtx_insn *insn, machine_mode req_mode) { int i; @@ -692,7 +692,7 @@ s390_match_ccmode (rtx_insn *insn, enum machine_mode req_mode) CC1 and CC2 for mixed selected bits (TMxx), it is false if the instruction cannot (TM). */ -enum machine_mode +machine_mode s390_tm_ccmode (rtx op1, rtx op2, bool mixed) { int bit0, bit1; @@ -730,7 +730,7 @@ s390_tm_ccmode (rtx op1, rtx op2, bool mixed) OP0 and OP1 of a COMPARE, return the mode to be used for the comparison. */ -enum machine_mode +machine_mode s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1) { switch (code) @@ -751,7 +751,7 @@ s390_select_ccmode (enum rtx_code code, rtx op0, rtx op1) if (GET_CODE (op0) == AND) { /* Check whether we can potentially do it via TM. */ - enum machine_mode ccmode; + machine_mode ccmode; ccmode = s390_tm_ccmode (XEXP (op0, 1), op1, 1); if (ccmode != VOIDmode) { @@ -1019,7 +1019,7 @@ s390_canonicalize_comparison (int *code, rtx *op0, rtx *op1, rtx s390_emit_compare (enum rtx_code code, rtx op0, rtx op1) { - enum machine_mode mode = s390_select_ccmode (code, op0, op1); + machine_mode mode = s390_select_ccmode (code, op0, op1); rtx cc; /* Do not output a redundant compare instruction if a compare_and_swap @@ -1353,7 +1353,7 @@ s390_branch_condition_mnemonic (rtx code, int inv) contains such a part. */ unsigned HOST_WIDE_INT -s390_extract_part (rtx op, enum machine_mode mode, int def) +s390_extract_part (rtx op, machine_mode mode, int def) { unsigned HOST_WIDE_INT value = 0; int max_parts = HOST_BITS_PER_WIDE_INT / GET_MODE_BITSIZE (mode); @@ -1382,8 +1382,8 @@ s390_extract_part (rtx op, enum machine_mode mode, int def) int s390_single_part (rtx op, - enum machine_mode mode, - enum machine_mode part_mode, + machine_mode mode, + machine_mode part_mode, int def) { unsigned HOST_WIDE_INT value = 0; @@ -1497,7 +1497,7 @@ s390_extzv_shift_ok (int bitsize, int rotl, unsigned HOST_WIDE_INT contig) moves, moving the subword FIRST_SUBWORD first. */ bool -s390_split_ok_p (rtx dst, rtx src, enum machine_mode mode, int first_subword) +s390_split_ok_p (rtx dst, rtx src, machine_mode mode, int first_subword) { /* Floating point registers cannot be split. */ if (FP_REG_P (src) || FP_REG_P (dst)) @@ -1591,10 +1591,10 @@ s390_offset_p (rtx mem1, rtx mem2, rtx delta) /* Expand logical operator CODE in mode MODE with operands OPERANDS. */ void -s390_expand_logical_operator (enum rtx_code code, enum machine_mode mode, +s390_expand_logical_operator (enum rtx_code code, machine_mode mode, rtx *operands) { - enum machine_mode wmode = mode; + machine_mode wmode = mode; rtx dst = operands[0]; rtx src1 = operands[1]; rtx src2 = operands[2]; @@ -2315,7 +2315,7 @@ s390_O_constraint_str (const char c, HOST_WIDE_INT value) int s390_N_constraint_str (const char *str, HOST_WIDE_INT value) { - enum machine_mode mode, part_mode; + machine_mode mode, part_mode; int def; int part, part_goal; @@ -2392,7 +2392,7 @@ s390_float_const_zero_p (rtx value) /* Implement TARGET_REGISTER_MOVE_COST. */ static int -s390_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +s390_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { /* On s390, copy between fprs and gprs is expensive as long as no @@ -2410,7 +2410,7 @@ s390_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, /* Implement TARGET_MEMORY_MOVE_COST. */ static int -s390_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +s390_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -2626,7 +2626,7 @@ s390_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, /* Return the cost of an address rtx ADDR. */ static int -s390_address_cost (rtx addr, enum machine_mode mode ATTRIBUTE_UNUSED, +s390_address_cost (rtx addr, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -2746,7 +2746,7 @@ legitimate_pic_operand_p (rtx op) It is given that OP satisfies CONSTANT_P or is a CONST_DOUBLE. */ static bool -s390_legitimate_constant_p (enum machine_mode mode, rtx op) +s390_legitimate_constant_p (machine_mode mode, rtx op) { /* Accept all non-symbolic constants. */ if (!SYMBOLIC_CONST (op)) @@ -2778,7 +2778,7 @@ s390_legitimate_constant_p (enum machine_mode mode, rtx op) not constant (TLS) or not known at final link time (PIC). */ static bool -s390_cannot_force_const_mem (enum machine_mode mode, rtx x) +s390_cannot_force_const_mem (machine_mode mode, rtx x) { switch (GET_CODE (x)) { @@ -2886,7 +2886,7 @@ legitimate_reload_constant_p (rtx op) if (GET_CODE (op) == CONST_INT && trunc_int_for_mode (INTVAL (op), word_mode) != INTVAL (op)) { - enum machine_mode dword_mode = word_mode == SImode ? DImode : TImode; + machine_mode dword_mode = word_mode == SImode ? DImode : TImode; rtx hi = operand_subword (op, 0, 0, dword_mode); rtx lo = operand_subword (op, 1, 0, dword_mode); return legitimate_reload_constant_p (hi) @@ -3091,7 +3091,7 @@ s390_reload_symref_address (rtx reg, rtx mem, rtx scratch, bool tomem) static reg_class_t s390_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { enum reg_class rclass = (enum reg_class) rclass_i; @@ -3273,7 +3273,7 @@ s390_expand_plus_operand (rtx target, rtx src, STRICT specifies whether strict register checking applies. */ static bool -s390_legitimate_address_p (enum machine_mode mode, rtx addr, bool strict) +s390_legitimate_address_p (machine_mode mode, rtx addr, bool strict) { struct s390_address ad; @@ -3931,7 +3931,7 @@ emit_symbolic_move (rtx *operands) static rtx s390_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { rtx constant_term = const0_rtx; @@ -4023,7 +4023,7 @@ s390_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, and TYPE is the reload type of the current reload. */ rtx -legitimize_reload_address (rtx ad, enum machine_mode mode ATTRIBUTE_UNUSED, +legitimize_reload_address (rtx ad, machine_mode mode ATTRIBUTE_UNUSED, int opnum, int type) { if (!optimize || TARGET_LONG_DISPLACEMENT) @@ -4091,7 +4091,7 @@ s390_expand_movmem (rtx dst, rtx src, rtx len) rtx_code_label *loop_start_label = gen_label_rtx (); rtx_code_label *loop_end_label = gen_label_rtx (); rtx_code_label *end_label = gen_label_rtx (); - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (len); if (mode == VOIDmode) @@ -4216,7 +4216,7 @@ s390_expand_setmem (rtx dst, rtx len, rtx val) rtx_code_label *loop_start_label = gen_label_rtx (); rtx_code_label *loop_end_label = gen_label_rtx (); rtx_code_label *end_label = gen_label_rtx (); - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (len); if (mode == VOIDmode) @@ -4342,7 +4342,7 @@ s390_expand_cmpmem (rtx target, rtx op0, rtx op1, rtx len) rtx_code_label *loop_start_label = gen_label_rtx (); rtx_code_label *loop_end_label = gen_label_rtx (); rtx_code_label *end_label = gen_label_rtx (); - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (len); if (mode == VOIDmode) @@ -4451,8 +4451,8 @@ bool s390_expand_addcc (enum rtx_code cmp_code, rtx cmp_op0, rtx cmp_op1, rtx dst, rtx src, rtx increment) { - enum machine_mode cmp_mode; - enum machine_mode cc_mode; + machine_mode cmp_mode; + machine_mode cc_mode; rtx op_res; rtx insn; rtvec p; @@ -4616,8 +4616,8 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src) { int bitsize = INTVAL (op1); int bitpos = INTVAL (op2); - enum machine_mode mode = GET_MODE (dest); - enum machine_mode smode; + machine_mode mode = GET_MODE (dest); + machine_mode smode; int smode_bsize, mode_bsize; rtx op, clobber; @@ -4637,7 +4637,7 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src) while (regpos > bitpos) { - enum machine_mode putmode; + machine_mode putmode; int putsize; if (TARGET_EXTIMM && (regpos % 32 == 0) && (regpos >= bitpos + 32)) @@ -4739,7 +4739,7 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src) /* For z10, generate ROTATE THEN INSERT SELECTED BITS (RISBG et al). */ if (TARGET_Z10 && (mode == DImode || mode == SImode)) { - enum machine_mode mode_s = GET_MODE (src); + machine_mode mode_s = GET_MODE (src); if (mode_s == VOIDmode) { @@ -4773,7 +4773,7 @@ s390_expand_insv (rtx dest, rtx op1, rtx op2, rtx src) register that holds VAL of mode MODE shifted by COUNT bits. */ static inline rtx -s390_expand_mask_and_shift (rtx val, enum machine_mode mode, rtx count) +s390_expand_mask_and_shift (rtx val, machine_mode mode, rtx count) { val = expand_simple_binop (SImode, AND, val, GEN_INT (GET_MODE_MASK (mode)), NULL_RTX, 1, OPTAB_DIRECT); @@ -4800,7 +4800,7 @@ struct alignment_context static void init_alignment_context (struct alignment_context *ac, rtx mem, - enum machine_mode mode) + machine_mode mode) { ac->shift = GEN_INT (GET_MODE_SIZE (SImode) - GET_MODE_SIZE (mode)); ac->aligned = (MEM_ALIGN (mem) >= GET_MODE_BITSIZE (SImode)); @@ -4852,7 +4852,7 @@ init_alignment_context (struct alignment_context *ac, rtx mem, static rtx s390_two_part_insv (struct alignment_context *ac, rtx *seq1, rtx *seq2, - enum machine_mode mode, rtx val, rtx ins) + machine_mode mode, rtx val, rtx ins) { rtx tmp; @@ -4890,7 +4890,7 @@ s390_two_part_insv (struct alignment_context *ac, rtx *seq1, rtx *seq2, value to set if CMP == MEM. */ void -s390_expand_cs_hqi (enum machine_mode mode, rtx btarget, rtx vtarget, rtx mem, +s390_expand_cs_hqi (machine_mode mode, rtx btarget, rtx vtarget, rtx mem, rtx cmp, rtx new_rtx, bool is_weak) { struct alignment_context ac; @@ -4972,7 +4972,7 @@ s390_expand_cs_hqi (enum machine_mode mode, rtx btarget, rtx vtarget, rtx mem, store it to TARGET. */ void -s390_expand_atomic (enum machine_mode mode, enum rtx_code code, +s390_expand_atomic (machine_mode mode, enum rtx_code code, rtx target, rtx mem, rtx val, bool after) { struct alignment_context ac; @@ -6249,7 +6249,7 @@ replace_ltrel_base (rtx *x) constant tables in the middle of large functions. */ #define NR_C_MODES 11 -enum machine_mode constant_modes[NR_C_MODES] = +machine_mode constant_modes[NR_C_MODES] = { TFmode, TImode, TDmode, DFmode, DImode, DDmode, @@ -6361,7 +6361,7 @@ s390_find_pool (struct constant_pool *pool_list, rtx insn) /* Add constant VAL of mode MODE to the constant pool POOL. */ static void -s390_add_constant (struct constant_pool *pool, rtx val, enum machine_mode mode) +s390_add_constant (struct constant_pool *pool, rtx val, machine_mode mode) { struct constant *c; int i; @@ -6406,7 +6406,7 @@ s390_pool_offset (struct constant_pool *pool, rtx x) static rtx s390_find_constant (struct constant_pool *pool, rtx val, - enum machine_mode mode) + machine_mode mode) { struct constant *c; int i; @@ -6664,7 +6664,7 @@ s390_mainpool_start (void) if (pool_ref) { rtx constant = get_pool_constant (pool_ref); - enum machine_mode mode = get_pool_mode (pool_ref); + machine_mode mode = get_pool_mode (pool_ref); s390_add_constant (pool, constant, mode); } } @@ -6887,7 +6887,7 @@ s390_chunkify_start (void) if (pool_ref) { rtx constant = get_pool_constant (pool_ref); - enum machine_mode mode = get_pool_mode (pool_ref); + machine_mode mode = get_pool_mode (pool_ref); if (!curr_pool) curr_pool = s390_start_pool (&pool_list, insn); @@ -7251,7 +7251,7 @@ s390_chunkify_cancel (struct constant_pool *pool_list) /* Output the constant pool entry EXP in mode MODE with alignment ALIGN. */ void -s390_output_pool_entry (rtx exp, enum machine_mode mode, unsigned int align) +s390_output_pool_entry (rtx exp, machine_mode mode, unsigned int align) { REAL_VALUE_TYPE r; @@ -7359,7 +7359,7 @@ s390_reg_clobbered_rtx (rtx setreg, const_rtx set_insn ATTRIBUTE_UNUSED, void *d { char *regs_ever_clobbered = (char *)data; unsigned int i, regno; - enum machine_mode mode = GET_MODE (setreg); + machine_mode mode = GET_MODE (setreg); if (GET_CODE (setreg) == SUBREG) { @@ -8078,7 +8078,7 @@ s390_optimize_nonescaping_tx (void) /* Return true if it is legal to put a value with MODE into REGNO. */ bool -s390_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) +s390_hard_regno_mode_ok (unsigned int regno, machine_mode mode) { switch (REGNO_REG_CLASS (regno)) { @@ -8167,7 +8167,7 @@ s390_hard_regno_scratch_ok (unsigned int regno) in a register of class RCLASS. */ int -s390_class_max_nregs (enum reg_class rclass, enum machine_mode mode) +s390_class_max_nregs (enum reg_class rclass, machine_mode mode) { switch (rclass) { @@ -9218,7 +9218,7 @@ s390_can_use_return_insn (void) MODE must be specified. */ static int -s390_function_arg_size (enum machine_mode mode, const_tree type) +s390_function_arg_size (machine_mode mode, const_tree type) { if (type) return int_size_in_bytes (type); @@ -9235,7 +9235,7 @@ s390_function_arg_size (enum machine_mode mode, const_tree type) is to be passed in a floating-point register, if available. */ static bool -s390_function_arg_float (enum machine_mode mode, const_tree type) +s390_function_arg_float (machine_mode mode, const_tree type) { int size = s390_function_arg_size (mode, type); if (size > 8) @@ -9280,7 +9280,7 @@ s390_function_arg_float (enum machine_mode mode, const_tree type) registers, if available. */ static bool -s390_function_arg_integer (enum machine_mode mode, const_tree type) +s390_function_arg_integer (machine_mode mode, const_tree type) { int size = s390_function_arg_size (mode, type); if (size > 8) @@ -9317,7 +9317,7 @@ s390_function_arg_integer (enum machine_mode mode, const_tree type) static bool s390_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { int size = s390_function_arg_size (mode, type); @@ -9344,7 +9344,7 @@ s390_pass_by_reference (cumulative_args_t ca ATTRIBUTE_UNUSED, matching an ellipsis). */ static void -s390_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +s390_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -9382,7 +9382,7 @@ s390_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, are pushed to the stack. */ static rtx -s390_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +s390_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -9458,8 +9458,8 @@ s390_return_in_memory (const_tree type, const_tree fundecl ATTRIBUTE_UNUSED) /* Function arguments and return values are promoted to word size. */ -static enum machine_mode -s390_promote_function_mode (const_tree type, enum machine_mode mode, +static machine_mode +s390_promote_function_mode (const_tree type, machine_mode mode, int *punsignedp, const_tree fntype ATTRIBUTE_UNUSED, int for_return ATTRIBUTE_UNUSED) @@ -9480,7 +9480,7 @@ s390_promote_function_mode (const_tree type, enum machine_mode mode, value of mode MODE from a libcall. */ static rtx -s390_function_and_libcall_value (enum machine_mode mode, +s390_function_and_libcall_value (machine_mode mode, const_tree ret_type, const_tree fntype_or_decl, bool outgoing ATTRIBUTE_UNUSED) @@ -9535,7 +9535,7 @@ s390_function_value (const_tree ret_type, const_tree fn_decl_or_type, MODE. */ static rtx -s390_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +s390_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return s390_function_and_libcall_value (mode, NULL_TREE, NULL_TREE, true); @@ -10034,7 +10034,7 @@ s390_init_builtins (void) static rtx s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { #define MAX_ARGS 2 @@ -10098,7 +10098,7 @@ s390_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, if (nonvoid) { - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; if (!target || GET_MODE (target) != tmode || !(*insn_data[icode].operand[0].predicate) (target, tmode)) @@ -10565,7 +10565,7 @@ s390_output_mi_thunk (FILE *file, tree thunk ATTRIBUTE_UNUSED, } static bool -s390_valid_pointer_mode (enum machine_mode mode) +s390_valid_pointer_mode (machine_mode mode) { return (mode == SImode || (TARGET_64BIT && mode == DImode)); } @@ -10581,7 +10581,7 @@ s390_call_saved_register_used (tree call_expr) CUMULATIVE_ARGS cum_v; cumulative_args_t cum; tree parameter; - enum machine_mode mode; + machine_mode mode; tree type; rtx parm_rtx; int reg, i; diff --git a/gcc/config/s390/s390.h b/gcc/config/s390/s390.h index c5edace..0a935ee 100644 --- a/gcc/config/s390/s390.h +++ b/gcc/config/s390/s390.h @@ -891,7 +891,7 @@ do { \ /* Specify the machine mode that pointers have. After generation of rtl, the compiler makes no further distinction between pointers and any other objects of this machine mode. */ -#define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode)) +#define Pmode ((machine_mode) (TARGET_64BIT ? DImode : SImode)) /* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */ #define POINTERS_EXTEND_UNSIGNED -1 diff --git a/gcc/config/s390/s390.md b/gcc/config/s390/s390.md index 73ac0dcd..b9fbf23 100644 --- a/gcc/config/s390/s390.md +++ b/gcc/config/s390/s390.md @@ -2389,7 +2389,7 @@ (use (match_operand 2 "" ""))])] "reload_completed" { - enum machine_mode mode; + machine_mode mode; int regno; int count; rtx from; @@ -2479,7 +2479,7 @@ (use (match_operand 2 "" ""))])] "reload_completed" { - enum machine_mode mode; + machine_mode mode; int regno; int count; rtx to; @@ -2825,8 +2825,8 @@ (clobber (reg:CC CC_REGNUM))])] "" { - enum machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode; - enum machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode; + machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode; + machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode; rtx reg0 = gen_reg_rtx (dreg_mode); rtx reg1 = gen_reg_rtx (dreg_mode); rtx addr0 = gen_lowpart (Pmode, gen_highpart (sreg_mode, reg0)); @@ -3042,8 +3042,8 @@ (clobber (reg:CC CC_REGNUM))])] "" { - enum machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode; - enum machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode; + machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode; + machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode; rtx reg0 = gen_reg_rtx (dreg_mode); rtx reg1 = gen_reg_rtx (dreg_mode); rtx addr0 = gen_lowpart (Pmode, gen_highpart (sreg_mode, reg0)); @@ -3215,8 +3215,8 @@ (use (match_dup 3))])] "" { - enum machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode; - enum machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode; + machine_mode sreg_mode = TARGET_ZARCH ? DImode : SImode; + machine_mode dreg_mode = TARGET_ZARCH ? TImode : DImode; rtx reg0 = gen_reg_rtx (dreg_mode); rtx reg1 = gen_reg_rtx (dreg_mode); rtx addr0 = gen_lowpart (Pmode, gen_highpart (sreg_mode, reg0)); @@ -9714,7 +9714,7 @@ UNSPECV_POOL_ENTRY)] "" { - enum machine_mode mode = GET_MODE (PATTERN (insn)); + machine_mode mode = GET_MODE (PATTERN (insn)); unsigned int align = GET_MODE_BITSIZE (mode); s390_output_pool_entry (operands[0], mode, align); return ""; diff --git a/gcc/config/sh/predicates.md b/gcc/config/sh/predicates.md index ff1c2f5..52267f7 100644 --- a/gcc/config/sh/predicates.md +++ b/gcc/config/sh/predicates.md @@ -710,7 +710,7 @@ ;;(define_special_predicate "int_gpr_dest" ;; (match_code "subreg,reg") ;;{ -;; enum machine_mode op_mode = GET_MODE (op); +;; machine_mode op_mode = GET_MODE (op); ;; ;; if (GET_MODE_CLASS (op_mode) != MODE_INT ;; || GET_MODE_SIZE (op_mode) >= UNITS_PER_WORD) @@ -1022,7 +1022,7 @@ (define_special_predicate "trunc_hi_operand" (match_code "subreg,reg,truncate") { - enum machine_mode op_mode = GET_MODE (op); + machine_mode op_mode = GET_MODE (op); if (op_mode != SImode && op_mode != DImode && op_mode != V4HImode && op_mode != V2SImode) diff --git a/gcc/config/sh/sh-protos.h b/gcc/config/sh/sh-protos.h index a170c11..e01b91e 100644 --- a/gcc/config/sh/sh-protos.h +++ b/gcc/config/sh/sh-protos.h @@ -98,8 +98,8 @@ extern const char *output_branch (int, rtx_insn *, rtx *); extern const char *output_ieee_ccmpeq (rtx_insn *, rtx *); extern const char *output_branchy_insn (enum rtx_code, const char *, rtx_insn *, rtx *); -extern const char *output_movedouble (rtx, rtx[], enum machine_mode); -extern const char *output_movepcrel (rtx, rtx[], enum machine_mode); +extern const char *output_movedouble (rtx, rtx[], machine_mode); +extern const char *output_movepcrel (rtx, rtx[], machine_mode); extern const char *output_far_jump (rtx_insn *, rtx); extern rtx sfunc_uses_reg (rtx_insn *); @@ -107,25 +107,25 @@ extern int barrier_align (rtx_insn *); extern int sh_loop_align (rtx_insn *); extern bool fp_zero_operand (rtx); extern bool fp_one_operand (rtx); -extern bool sh_legitimate_index_p (enum machine_mode, rtx, bool, bool); -extern bool sh_legitimize_reload_address (rtx *, enum machine_mode, int, int); -extern rtx legitimize_pic_address (rtx, enum machine_mode, rtx); +extern bool sh_legitimate_index_p (machine_mode, rtx, bool, bool); +extern bool sh_legitimize_reload_address (rtx *, machine_mode, int, int); +extern rtx legitimize_pic_address (rtx, machine_mode, rtx); extern bool nonpic_symbol_mentioned_p (rtx); extern void output_pic_addr_const (FILE *, rtx); extern bool expand_block_move (rtx *); -extern void prepare_move_operands (rtx[], enum machine_mode mode); +extern void prepare_move_operands (rtx[], machine_mode mode); extern bool sh_expand_cmpstr (rtx *); extern bool sh_expand_cmpnstr (rtx *); extern bool sh_expand_strlen (rtx *); extern void sh_expand_setmem (rtx *); -extern enum rtx_code prepare_cbranch_operands (rtx *, enum machine_mode mode, +extern enum rtx_code prepare_cbranch_operands (rtx *, machine_mode mode, enum rtx_code comparison); extern void expand_cbranchsi4 (rtx *operands, enum rtx_code comparison, int); extern bool expand_cbranchdi4 (rtx *operands, enum rtx_code comparison); extern void sh_emit_scc_to_t (enum rtx_code, rtx, rtx); -extern rtx sh_emit_cheap_store_flag (enum machine_mode, enum rtx_code, rtx, rtx); -extern void sh_emit_compare_and_branch (rtx *, enum machine_mode); -extern void sh_emit_compare_and_set (rtx *, enum machine_mode); +extern rtx sh_emit_cheap_store_flag (machine_mode, enum rtx_code, rtx, rtx); +extern void sh_emit_compare_and_branch (rtx *, machine_mode); +extern void sh_emit_compare_and_set (rtx *, machine_mode); extern bool sh_ashlsi_clobbers_t_reg_p (rtx); extern bool sh_lshrsi_clobbers_t_reg_p (rtx); extern void gen_shifty_op (int, rtx *); @@ -144,16 +144,16 @@ extern int regs_used (rtx, int); extern void fixup_addr_diff_vecs (rtx_insn *); extern int get_dest_uid (rtx, int); extern void final_prescan_insn (rtx_insn *, rtx *, int); -extern enum tls_model tls_symbolic_operand (rtx, enum machine_mode); -extern bool system_reg_operand (rtx, enum machine_mode); +extern enum tls_model tls_symbolic_operand (rtx, machine_mode); +extern bool system_reg_operand (rtx, machine_mode); extern bool reg_unused_after (rtx, rtx_insn *); extern int sh_insn_length_adjustment (rtx_insn *); extern bool sh_can_redirect_branch (rtx_insn *, rtx_insn *); extern void sh_expand_unop_v2sf (enum rtx_code, rtx, rtx); extern void sh_expand_binop_v2sf (enum rtx_code, rtx, rtx, rtx); extern bool sh_expand_t_scc (rtx *); -extern rtx sh_gen_truncate (enum machine_mode, rtx, int); -extern bool sh_vector_mode_supported_p (enum machine_mode); +extern rtx sh_gen_truncate (machine_mode, rtx, int); +extern bool sh_vector_mode_supported_p (machine_mode); extern bool sh_cfun_trap_exit_p (void); extern rtx sh_find_equiv_gbr_addr (rtx_insn* cur_insn, rtx mem); extern int sh_eval_treg_value (rtx op); @@ -195,8 +195,8 @@ extern bool sh_cfun_resbank_handler_p (void); extern bool sh_attr_renesas_p (const_tree); extern bool sh_cfun_attr_renesas_p (void); extern bool sh_cannot_change_mode_class - (enum machine_mode, enum machine_mode, enum reg_class); -extern bool sh_small_register_classes_for_mode_p (enum machine_mode); + (machine_mode, machine_mode, enum reg_class); +extern bool sh_small_register_classes_for_mode_p (machine_mode); extern void sh_mark_label (rtx, int); extern bool check_use_sfunc_addr (rtx_insn *, rtx); @@ -211,7 +211,7 @@ extern rtx function_symbol (rtx, const char *, enum sh_function_kind); extern rtx sh_get_pr_initial_val (void); extern void sh_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree, - signed int, enum machine_mode); + signed int, machine_mode); extern rtx sh_dwarf_register_span (rtx); extern rtx replace_n_hard_rtx (rtx, rtx *, int , int); @@ -223,6 +223,6 @@ extern rtx shmedia_prepare_call_address (rtx fnaddr, int is_sibcall); extern int sh2a_get_function_vector_number (rtx); extern bool sh2a_is_function_vector_call (rtx); extern void sh_fix_range (const char *); -extern bool sh_hard_regno_mode_ok (unsigned int, enum machine_mode); +extern bool sh_hard_regno_mode_ok (unsigned int, machine_mode); extern bool sh_can_use_simple_return_p (void); #endif /* ! GCC_SH_PROTOS_H */ diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c index 1662b55..1dc1bf4 100644 --- a/gcc/config/sh/sh.c +++ b/gcc/config/sh/sh.c @@ -199,7 +199,7 @@ static bool shmedia_space_reserved_for_target_registers; static void split_branches (rtx_insn *); static int branch_dest (rtx); static void print_slot (rtx_sequence *); -static rtx_code_label *add_constant (rtx, enum machine_mode, rtx); +static rtx_code_label *add_constant (rtx, machine_mode, rtx); static void dump_table (rtx_insn *, rtx_insn *); static bool broken_move (rtx_insn *); static bool mova_p (rtx_insn *); @@ -240,20 +240,20 @@ static bool sh_asm_output_addr_const_extra (FILE *file, rtx x); static void sh_output_function_epilogue (FILE *, HOST_WIDE_INT); static void sh_insert_attributes (tree, tree *); static const char *sh_check_pch_target_flags (int); -static int sh_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); +static int sh_register_move_cost (machine_mode, reg_class_t, reg_class_t); static int sh_adjust_cost (rtx_insn *, rtx, rtx_insn *, int); static int sh_issue_rate (void); static int sh_dfa_new_cycle (FILE *, int, rtx_insn *, int, int, int *sort_p); -static short find_set_regmode_weight (rtx, enum machine_mode); -static short find_insn_regmode_weight (rtx, enum machine_mode); -static void find_regmode_weight (basic_block, enum machine_mode); +static short find_set_regmode_weight (rtx, machine_mode); +static short find_insn_regmode_weight (rtx, machine_mode); +static void find_regmode_weight (basic_block, machine_mode); static int find_r0_life_regions (basic_block); static void sh_md_init_global (FILE *, int, int); static void sh_md_finish_global (FILE *, int); static int rank_for_reorder (const void *, const void *); static void swap_reorder (rtx_insn **, int); static void ready_reorder (rtx_insn **, int); -static bool high_pressure (enum machine_mode); +static bool high_pressure (machine_mode); static int sh_reorder (FILE *, int, rtx_insn **, int *, int); static int sh_reorder2 (FILE *, int, rtx_insn **, int *, int); static void sh_md_init (FILE *, int, int); @@ -268,7 +268,7 @@ static bool sh_ms_bitfield_layout_p (const_tree); static void sh_init_builtins (void); static tree sh_builtin_decl (unsigned, bool); -static rtx sh_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx sh_expand_builtin (tree, rtx, rtx, machine_mode, int); static void sh_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static void sh_file_start (void); @@ -281,15 +281,15 @@ static int multcosts (rtx); static bool unspec_caller_rtx_p (rtx); static bool sh_cannot_copy_insn_p (rtx_insn *); static bool sh_rtx_costs (rtx, int, int, int, int *, bool); -static int sh_address_cost (rtx, enum machine_mode, addr_space_t, bool); +static int sh_address_cost (rtx, machine_mode, addr_space_t, bool); static int sh_pr_n_sets (void); static rtx sh_allocate_initial_value (rtx); static reg_class_t sh_preferred_reload_class (rtx, reg_class_t); static reg_class_t sh_secondary_reload (bool, rtx, reg_class_t, - enum machine_mode, + machine_mode, struct secondary_reload_info *); -static bool sh_legitimate_address_p (enum machine_mode, rtx, bool); -static rtx sh_legitimize_address (rtx, rtx, enum machine_mode); +static bool sh_legitimate_address_p (machine_mode, rtx, bool); +static rtx sh_legitimize_address (rtx, rtx, machine_mode); static rtx sh_delegitimize_address (rtx); static int shmedia_target_regs_stack_space (HARD_REG_SET *); static int shmedia_reserve_space_for_target_registers_p (int, HARD_REG_SET *); @@ -302,10 +302,10 @@ static struct save_entry_s *sh5_schedule_saves (HARD_REG_SET *, static rtx sh_struct_value_rtx (tree, int); static rtx sh_function_value (const_tree, const_tree, bool); static bool sh_function_value_regno_p (const unsigned int); -static rtx sh_libcall_value (enum machine_mode, const_rtx); +static rtx sh_libcall_value (machine_mode, const_rtx); static bool sh_return_in_memory (const_tree, const_tree); static rtx sh_builtin_saveregs (void); -static void sh_setup_incoming_varargs (cumulative_args_t, enum machine_mode, +static void sh_setup_incoming_varargs (cumulative_args_t, machine_mode, tree, int *, int); static bool sh_strict_argument_naming (cumulative_args_t); static bool sh_pretend_outgoing_varargs_named (cumulative_args_t); @@ -313,35 +313,35 @@ static tree sh_build_builtin_va_list (void); static void sh_va_start (tree, rtx); static tree sh_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *); static bool sh_promote_prototypes (const_tree); -static enum machine_mode sh_promote_function_mode (const_tree type, - enum machine_mode, +static machine_mode sh_promote_function_mode (const_tree type, + machine_mode, int *punsignedp, const_tree funtype, int for_return); -static bool sh_pass_by_reference (cumulative_args_t, enum machine_mode, +static bool sh_pass_by_reference (cumulative_args_t, machine_mode, const_tree, bool); -static bool sh_callee_copies (cumulative_args_t, enum machine_mode, +static bool sh_callee_copies (cumulative_args_t, machine_mode, const_tree, bool); -static int sh_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static int sh_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static void sh_function_arg_advance (cumulative_args_t, enum machine_mode, +static void sh_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static rtx sh_function_arg (cumulative_args_t, enum machine_mode, +static rtx sh_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static bool sh_scalar_mode_supported_p (enum machine_mode); +static bool sh_scalar_mode_supported_p (machine_mode); static int sh_dwarf_calling_convention (const_tree); static void sh_encode_section_info (tree, rtx, int); static bool sh2a_function_vector_p (tree); static void sh_trampoline_init (rtx, tree, rtx); static rtx sh_trampoline_adjust_address (rtx); static void sh_conditional_register_usage (void); -static bool sh_legitimate_constant_p (enum machine_mode, rtx); -static int mov_insn_size (enum machine_mode, bool); -static int mov_insn_alignment_mask (enum machine_mode, bool); +static bool sh_legitimate_constant_p (machine_mode, rtx); +static int mov_insn_size (machine_mode, bool); +static int mov_insn_alignment_mask (machine_mode, bool); static bool sequence_insn_p (rtx_insn *); static void sh_canonicalize_comparison (int *, rtx *, rtx *, bool); static void sh_canonicalize_comparison (enum rtx_code&, rtx&, rtx&, - enum machine_mode, bool); + machine_mode, bool); static bool sh_fixed_condition_code_regs (unsigned int* p1, unsigned int* p2); static void sh_init_sync_libfuncs (void) ATTRIBUTE_UNUSED; @@ -1211,7 +1211,7 @@ static void sh_print_operand (FILE *stream, rtx x, int code) { int regno; - enum machine_mode mode; + machine_mode mode; switch (code) { @@ -1473,7 +1473,7 @@ sh_print_operand (FILE *stream, rtx x, int code) { rtx inner = XEXP (x, 0); int offset = 0; - enum machine_mode inner_mode; + machine_mode inner_mode; /* We might see SUBREGs with vector mode registers inside. */ if (GET_CODE (inner) == SUBREG @@ -1691,7 +1691,7 @@ sh_encode_section_info (tree decl, rtx rtl, int first) /* Prepare operands for a move define_expand; specifically, one of the operands must be in a register. */ void -prepare_move_operands (rtx operands[], enum machine_mode mode) +prepare_move_operands (rtx operands[], machine_mode mode) { if ((mode == SImode || mode == DImode) && flag_pic @@ -1861,7 +1861,7 @@ prepare_move_operands (rtx operands[], enum machine_mode mode) canonicalize comparisons in cbranch pattern expanders. */ static void sh_canonicalize_comparison (enum rtx_code& cmp, rtx& op0, rtx& op1, - enum machine_mode mode, + machine_mode mode, bool op0_preserve_value) { /* When invoked from within the combine pass the mode is not specified, @@ -1982,7 +1982,7 @@ sh_fixed_condition_code_regs (unsigned int* p1, unsigned int* p2) } enum rtx_code -prepare_cbranch_operands (rtx *operands, enum machine_mode mode, +prepare_cbranch_operands (rtx *operands, machine_mode mode, enum rtx_code comparison) { /* The scratch reg is only available when this is invoked from within @@ -2298,7 +2298,7 @@ sh_eval_treg_value (rtx op) /* Emit INSN, possibly in a PARALLEL with an USE/CLOBBER of FPSCR bits in case of floating-point comparisons. */ static void -sh_emit_set_t_insn (rtx insn, enum machine_mode mode) +sh_emit_set_t_insn (rtx insn, machine_mode mode) { if (TARGET_FPU_ANY && GET_MODE_CLASS (mode) == MODE_FLOAT && GET_CODE (insn) != PARALLEL) @@ -2318,7 +2318,7 @@ sh_emit_scc_to_t (enum rtx_code code, rtx op0, rtx op1) { rtx t_reg = get_t_reg_rtx (); enum rtx_code oldcode = code; - enum machine_mode mode; + machine_mode mode; /* First need a compare insn. */ switch (code) @@ -2366,7 +2366,7 @@ sh_emit_scc_to_t (enum rtx_code code, rtx op0, rtx op1) } rtx -sh_emit_cheap_store_flag (enum machine_mode mode, enum rtx_code code, +sh_emit_cheap_store_flag (machine_mode mode, enum rtx_code code, rtx op0, rtx op1) { rtx target = gen_reg_rtx (SImode); @@ -2421,7 +2421,7 @@ sh_emit_cheap_store_flag (enum machine_mode mode, enum rtx_code code, /* Called from the md file, set up the operands of a compare instruction. */ void -sh_emit_compare_and_branch (rtx *operands, enum machine_mode mode) +sh_emit_compare_and_branch (rtx *operands, machine_mode mode) { enum rtx_code code = GET_CODE (operands[0]); enum rtx_code branch_code; @@ -2504,7 +2504,7 @@ sh_emit_compare_and_branch (rtx *operands, enum machine_mode mode) } void -sh_emit_compare_and_set (rtx *operands, enum machine_mode mode) +sh_emit_compare_and_set (rtx *operands, machine_mode mode) { enum rtx_code code = GET_CODE (operands[1]); rtx op0 = operands[2]; @@ -2568,7 +2568,7 @@ sh_emit_compare_and_set (rtx *operands, enum machine_mode mode) to take care when we see overlapping source and dest registers. */ const char * output_movedouble (rtx insn ATTRIBUTE_UNUSED, rtx operands[], - enum machine_mode mode) + machine_mode mode) { rtx dst = operands[0]; rtx src = operands[1]; @@ -3366,7 +3366,7 @@ sh_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, && (register_operand (SET_SRC (x), VOIDmode) || satisfies_constraint_Z (SET_SRC (x)))) { - const enum machine_mode mode = GET_MODE (SET_DEST (x)); + const machine_mode mode = GET_MODE (SET_DEST (x)); *total = COSTS_N_INSNS (GET_MODE_SIZE (mode) / mov_insn_size (mode, TARGET_SH2A)); return true; @@ -3620,7 +3620,7 @@ sh_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, /* Determine the size of the fundamental move insn that will be used for the specified mode. */ static inline int -mov_insn_size (enum machine_mode mode, bool consider_sh2a) +mov_insn_size (machine_mode mode, bool consider_sh2a) { const int mode_sz = GET_MODE_SIZE (mode); @@ -3668,7 +3668,7 @@ sh_max_mov_insn_displacement (machine_mode mode, bool consider_sh2a) /* Determine the alignment mask for a move insn of the specified mode. */ static inline int -mov_insn_alignment_mask (enum machine_mode mode, bool consider_sh2a) +mov_insn_alignment_mask (machine_mode mode, bool consider_sh2a) { const int mov_insn_sz = mov_insn_size (mode, consider_sh2a); return mov_insn_sz > 0 ? (mov_insn_sz - 1) : 0; @@ -3684,7 +3684,7 @@ sh_disp_addr_displacement (rtx x) /* Compute the cost of an address. */ static int -sh_address_cost (rtx x, enum machine_mode mode, +sh_address_cost (rtx x, machine_mode mode, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { /* 'GBR + 0'. Account one more because of R0 restriction. */ @@ -4590,7 +4590,7 @@ typedef struct rtx value; /* Value in table. */ rtx_code_label *label; /* Label of value. */ label_ref_list_t wend; /* End of window. */ - enum machine_mode mode; /* Mode of value. */ + machine_mode mode; /* Mode of value. */ /* True if this constant is accessed as part of a post-increment sequence. Note that HImode constants are never accessed in this way. */ @@ -4621,7 +4621,7 @@ static int max_labelno_before_reorg; /* Add a constant to the pool and return its label. */ static rtx_code_label * -add_constant (rtx x, enum machine_mode mode, rtx last_value) +add_constant (rtx x, machine_mode mode, rtx last_value) { int i; rtx_code_label *lab, *new_rtx; @@ -5140,7 +5140,7 @@ find_barrier (int num_mova, rtx_insn *mova, rtx_insn *from) if (broken_move (from)) { rtx pat, src, dst; - enum machine_mode mode; + machine_mode mode; pat = PATTERN (from); if (GET_CODE (pat) == PARALLEL) @@ -6320,7 +6320,7 @@ sh_reorg (void) rtx src, dst; rtx lab; rtx newsrc; - enum machine_mode mode; + machine_mode mode; if (GET_CODE (pat) == PARALLEL) patp = &XVECEXP (pat, 0, 0), pat = *patp; @@ -6851,7 +6851,7 @@ output_stack_adjust (int size, rtx reg, int epilogue_p, int nreg = 0; if (crtl->return_rtx) { - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (crtl->return_rtx); if (BASE_RETURN_VALUE_REG (mode) == FIRST_RET_REG) nreg = HARD_REGNO_NREGS (FIRST_RET_REG, mode); @@ -7444,7 +7444,7 @@ sh5_schedule_saves (HARD_REG_SET *live_regs_mask, save_schedule *schedule, for (i = FIRST_PSEUDO_REGISTER - 1; i >= 0; i--) if (TEST_HARD_REG_BIT (*live_regs_mask, i)) { - enum machine_mode mode = REGISTER_NATURAL_MODE (i); + machine_mode mode = REGISTER_NATURAL_MODE (i); int reg = i; if (current_function_interrupt) @@ -7662,7 +7662,7 @@ sh_expand_prologue (void) tmp_pnt = schedule.temps; for (entry = &schedule.entries[1]; entry->mode != VOIDmode; entry++) { - enum machine_mode mode = (enum machine_mode) entry->mode; + machine_mode mode = (machine_mode) entry->mode; unsigned int reg = entry->reg; rtx reg_rtx, mem_rtx, pre_dec = NULL_RTX; rtx orig_reg_rtx; @@ -7962,7 +7962,7 @@ sh_expand_epilogue (bool sibcall_p) tmp_pnt = schedule.temps; for (; entry->mode != VOIDmode; entry--) { - enum machine_mode mode = (enum machine_mode) entry->mode; + machine_mode mode = (machine_mode) entry->mode; int reg = entry->reg; rtx reg_rtx, mem_rtx, post_inc = NULL_RTX; @@ -8775,8 +8775,8 @@ sh_dwarf_register_span (rtx reg) gen_rtx_REG (SFmode, regno))); } -static enum machine_mode -sh_promote_function_mode (const_tree type, enum machine_mode mode, +static machine_mode +sh_promote_function_mode (const_tree type, machine_mode mode, int *punsignedp, const_tree funtype, int for_return) { @@ -8802,7 +8802,7 @@ sh_promote_prototypes (const_tree type) registers are passed by reference, so that an SHmedia trampoline loads them into the full 64-bits registers. */ static int -shcompact_byref (const CUMULATIVE_ARGS *cum, enum machine_mode mode, +shcompact_byref (const CUMULATIVE_ARGS *cum, machine_mode mode, const_tree type, bool named) { unsigned HOST_WIDE_INT size; @@ -8826,7 +8826,7 @@ shcompact_byref (const CUMULATIVE_ARGS *cum, enum machine_mode mode, } static bool -sh_pass_by_reference (cumulative_args_t cum_v, enum machine_mode mode, +sh_pass_by_reference (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -8850,7 +8850,7 @@ sh_pass_by_reference (cumulative_args_t cum_v, enum machine_mode mode, } static bool -sh_callee_copies (cumulative_args_t cum, enum machine_mode mode, +sh_callee_copies (cumulative_args_t cum, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { /* ??? How can it possibly be correct to return true only on the @@ -8910,7 +8910,7 @@ sh_pass_in_reg_p (const CUMULATIVE_ARGS& cum, machine_mode mode, } static int -sh_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +sh_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -8952,7 +8952,7 @@ sh_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, NPARM_REGS words is at least partially passed in a register unless its data type forbids. */ static rtx -sh_function_arg (cumulative_args_t ca_v, enum machine_mode mode, +sh_function_arg (cumulative_args_t ca_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v); @@ -9041,7 +9041,7 @@ sh_function_arg (cumulative_args_t ca_v, enum machine_mode mode, (TYPE is null for libcalls where that information may not be available.) */ static void -sh_function_arg_advance (cumulative_args_t ca_v, enum machine_mode mode, +sh_function_arg_advance (cumulative_args_t ca_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *ca = get_cumulative_args (ca_v); @@ -9053,7 +9053,7 @@ sh_function_arg_advance (cumulative_args_t ca_v, enum machine_mode mode, const_tree type2 = (ca->byref && type ? TREE_TYPE (type) : type); - enum machine_mode mode2 = (ca->byref && type + machine_mode mode2 = (ca->byref && type ? TYPE_MODE (type2) : mode); int dwords = ((ca->byref @@ -9228,7 +9228,7 @@ sh_function_value (const_tree valtype, /* Worker function for TARGET_LIBCALL_VALUE. */ static rtx -sh_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +sh_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, BASE_RETURN_VALUE_REG (mode)); } @@ -9268,7 +9268,7 @@ sh_return_in_memory (const_tree type, const_tree fndecl) function that tell if a function uses varargs or stdarg. */ static void sh_setup_incoming_varargs (cumulative_args_t ca, - enum machine_mode mode, + machine_mode mode, tree type, int *pretend_arg_size, int second_time ATTRIBUTE_UNUSED) @@ -9843,7 +9843,7 @@ sh_check_pch_target_flags (int old_flags) /* Returns true if OP is MACL, MACH or PR. The input must be a REG rtx. Used only in general_movsrc_operand. */ bool -system_reg_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +system_reg_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) { switch (REGNO (op)) { @@ -9883,7 +9883,7 @@ fp_one_operand (rtx op) /* Return the TLS type for TLS symbols. */ enum tls_model -tls_symbolic_operand (rtx op, enum machine_mode mode ATTRIBUTE_UNUSED) +tls_symbolic_operand (rtx op, machine_mode mode ATTRIBUTE_UNUSED) { if (GET_CODE (op) != SYMBOL_REF) return TLS_MODEL_NONE; @@ -10190,7 +10190,7 @@ sh_insn_length_adjustment (rtx_insn *insn) /* Return TRUE for a valid displacement for the REG+disp addressing with MODE. */ bool -sh_legitimate_index_p (enum machine_mode mode, rtx op, bool consider_sh2a, +sh_legitimate_index_p (machine_mode mode, rtx op, bool consider_sh2a, bool allow_zero) { if (! CONST_INT_P (op)) @@ -10239,7 +10239,7 @@ sh_legitimate_index_p (enum machine_mode mode, rtx op, bool consider_sh2a, GBR GBR+disp */ static bool -sh_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +sh_legitimate_address_p (machine_mode mode, rtx x, bool strict) { if (! ALLOW_INDEXED_ADDRESS && GET_CODE (x) == PLUS && REG_P (XEXP (x, 0)) && REG_P (XEXP (x, 1))) @@ -10341,7 +10341,7 @@ nonpic_symbol_mentioned_p (rtx x) /* Convert a non-PIC address in `orig' to a PIC address using @GOT or @GOTOFF in `reg'. */ rtx -legitimize_pic_address (rtx orig, enum machine_mode mode ATTRIBUTE_UNUSED, +legitimize_pic_address (rtx orig, machine_mode mode ATTRIBUTE_UNUSED, rtx reg) { if (tls_symbolic_operand (orig, Pmode) != TLS_MODEL_NONE) @@ -10393,7 +10393,7 @@ struct disp_adjust }; static struct disp_adjust -sh_find_mov_disp_adjust (enum machine_mode mode, HOST_WIDE_INT offset) +sh_find_mov_disp_adjust (machine_mode mode, HOST_WIDE_INT offset) { struct disp_adjust res = { NULL_RTX, NULL_RTX }; @@ -10432,7 +10432,7 @@ sh_find_mov_disp_adjust (enum machine_mode mode, HOST_WIDE_INT offset) If we find one, return the new, valid address. Otherwise, return the original address. */ static rtx -sh_legitimize_address (rtx x, rtx oldx, enum machine_mode mode) +sh_legitimize_address (rtx x, rtx oldx, machine_mode mode) { if (flag_pic) x = legitimize_pic_address (oldx, mode, NULL_RTX); @@ -10466,7 +10466,7 @@ sh_legitimize_address (rtx x, rtx oldx, enum machine_mode mode) Like for sh_legitimize_address, for the SH we try to get a normal form of the address. That will allow inheritance of the address reloads. */ bool -sh_legitimize_reload_address (rtx *p, enum machine_mode mode, int opnum, +sh_legitimize_reload_address (rtx *p, machine_mode mode, int opnum, int itype) { enum reload_type type = (enum reload_type) itype; @@ -10994,7 +10994,7 @@ sh_issue_rate (void) /* Get weight for mode for a set x. */ static short -find_set_regmode_weight (rtx x, enum machine_mode mode) +find_set_regmode_weight (rtx x, machine_mode mode) { if (GET_CODE (x) == CLOBBER && register_operand (SET_DEST (x), mode)) return 1; @@ -11014,7 +11014,7 @@ find_set_regmode_weight (rtx x, enum machine_mode mode) /* Get regmode weight for insn. */ static short -find_insn_regmode_weight (rtx insn, enum machine_mode mode) +find_insn_regmode_weight (rtx insn, machine_mode mode) { short reg_weight = 0; rtx x; @@ -11046,7 +11046,7 @@ find_insn_regmode_weight (rtx insn, enum machine_mode mode) /* Calculate regmode weights for all insns of a basic block. */ static void -find_regmode_weight (basic_block b, enum machine_mode mode) +find_regmode_weight (basic_block b, machine_mode mode) { rtx_insn *insn, *next_tail, *head, *tail; @@ -11206,7 +11206,7 @@ sh_md_finish_global (FILE *dump ATTRIBUTE_UNUSED, /* The scalar modes supported differs from the default version in TImode for 32-bit SHMEDIA. */ static bool -sh_scalar_mode_supported_p (enum machine_mode mode) +sh_scalar_mode_supported_p (machine_mode mode) { if (TARGET_SHMEDIA32 && mode == TImode) return false; @@ -11256,7 +11256,7 @@ sh_md_init (FILE *dump ATTRIBUTE_UNUSED, /* Return true if the pressure is high for MODE. */ static bool -high_pressure (enum machine_mode mode) +high_pressure (machine_mode mode) { /* Pressure on register r0 can lead to spill failures. so avoid sched1 for functions that already have high pressure on r0. */ @@ -11904,7 +11904,7 @@ sh_init_builtins (void) /* Implements target hook vector_mode_supported_p. */ bool -sh_vector_mode_supported_p (enum machine_mode mode) +sh_vector_mode_supported_p (machine_mode mode) { if (TARGET_FPU_ANY && ((mode == V2SFmode) @@ -11967,7 +11967,7 @@ sh_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) IGNORE is nonzero if the value is to be ignored. */ static rtx sh_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, int ignore) + machine_mode mode ATTRIBUTE_UNUSED, int ignore) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); unsigned int fcode = DECL_FUNCTION_CODE (fndecl); @@ -11982,7 +11982,7 @@ sh_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, if (ignore) return NULL_RTX; - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; if (! target || GET_MODE (target) != tmode || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) target = gen_reg_rtx (tmode); @@ -11994,7 +11994,7 @@ sh_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, for (int i = 1; i <= 3; i++, nop++) { tree arg; - enum machine_mode opmode, argmode; + machine_mode opmode, argmode; tree optype; if (! signature_args[signature][i]) @@ -12082,7 +12082,7 @@ sh_expand_binop_v2sf (enum rtx_code code, rtx op0, rtx op1, rtx op2) We want to allow TImode FP regs so that when V4SFmode is loaded as TImode, it won't be ferried through GP registers first. */ bool -sh_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) +sh_hard_regno_mode_ok (unsigned int regno, machine_mode mode) { if (SPECIAL_REGISTER_P (regno)) return mode == SImode; @@ -12170,7 +12170,7 @@ sh_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) /* Return the class of registers for which a mode change from FROM to TO is invalid. */ bool -sh_cannot_change_mode_class (enum machine_mode from, enum machine_mode to, +sh_cannot_change_mode_class (machine_mode from, machine_mode to, enum reg_class rclass) { /* We want to enable the use of SUBREGs as a means to @@ -12202,7 +12202,7 @@ sh_cannot_change_mode_class (enum machine_mode from, enum machine_mode to, /* Return true if registers in machine mode MODE will likely be allocated to registers in small register classes. */ bool -sh_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED) +sh_small_register_classes_for_mode_p (machine_mode mode ATTRIBUTE_UNUSED) { return (! TARGET_SHMEDIA); } @@ -12232,7 +12232,7 @@ sh_mark_label (rtx address, int nuses) uses this information. Hence, the general register <-> floating point register information here is not used for SFmode. */ static int -sh_register_move_cost (enum machine_mode mode, +sh_register_move_cost (machine_mode mode, reg_class_t srcclass, reg_class_t dstclass) { if (dstclass == T_REGS || dstclass == PR_REGS) @@ -12722,7 +12722,7 @@ sh_init_cumulative_args (CUMULATIVE_ARGS * pcum, rtx libname ATTRIBUTE_UNUSED, tree fndecl, signed int n_named_args, - enum machine_mode mode) + machine_mode mode) { pcum->arg_count [(int) SH_ARG_FLOAT] = 0; pcum->free_single_fp_reg = 0; @@ -12926,14 +12926,14 @@ replace_n_hard_rtx (rtx x, rtx *replacements, int n_replacements, int modify) } rtx -sh_gen_truncate (enum machine_mode mode, rtx x, int need_sign_ext) +sh_gen_truncate (machine_mode mode, rtx x, int need_sign_ext) { enum rtx_code code = TRUNCATE; if (GET_CODE (x) == ZERO_EXTEND || GET_CODE (x) == SIGN_EXTEND) { rtx inner = XEXP (x, 0); - enum machine_mode inner_mode = GET_MODE (inner); + machine_mode inner_mode = GET_MODE (inner); if (inner_mode == mode) return inner; @@ -12962,7 +12962,7 @@ shmedia_cleanup_truncate (rtx x) if (GET_CODE (x) == TRUNCATE) { rtx reg = XEXP (x, 0); - enum machine_mode reg_mode = GET_MODE (reg); + machine_mode reg_mode = GET_MODE (reg); if (REG_P (reg) && GET_MODE_SIZE (reg_mode) > 8) { int offset = subreg_lowpart_offset (DImode, reg_mode); @@ -13070,7 +13070,7 @@ sh_preferred_reload_class (rtx x, reg_class_t rclass) /* Implement TARGET_SECONDARY_RELOAD. */ static reg_class_t sh_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { enum reg_class rclass = (enum reg_class) rclass_i; @@ -13263,7 +13263,7 @@ sh_conditional_register_usage (void) can_store_by_pieces constructs VOIDmode CONST_DOUBLEs. */ static bool -sh_legitimate_constant_p (enum machine_mode mode, rtx x) +sh_legitimate_constant_p (machine_mode mode, rtx x) { return (TARGET_SHMEDIA ? ((mode != DFmode && GET_MODE_CLASS (mode) != MODE_VECTOR_FLOAT) diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md index e0c0940..8246143 100644 --- a/gcc/config/sh/sh.md +++ b/gcc/config/sh/sh.md @@ -3991,7 +3991,7 @@ label: [(set (match_dup 5) (match_dup 4)) (set (match_dup 0) (sign_extend:DI (match_dup 5)))] { - enum machine_mode inmode = GET_MODE (operands[1]); + machine_mode inmode = GET_MODE (operands[1]); int offset = 0; if (GET_CODE (operands[0]) == SUBREG) @@ -8690,7 +8690,7 @@ label: (pc)))] "TARGET_SHMEDIA" { - enum machine_mode mode = GET_MODE (operands[1]); + machine_mode mode = GET_MODE (operands[1]); if (mode == VOIDmode) mode = GET_MODE (operands[2]); if (GET_CODE (operands[0]) == EQ || GET_CODE (operands[0]) == NE) @@ -11299,7 +11299,7 @@ label: (match_operand 3 "cmp_operand" "")]))] "TARGET_SHMEDIA" { - enum machine_mode mode = GET_MODE (operands[2]); + machine_mode mode = GET_MODE (operands[2]); enum rtx_code code = GET_CODE (operands[1]); bool invert, swap; if (mode == VOIDmode) @@ -14034,7 +14034,7 @@ label: [(set (match_dup 0) (match_dup 1))] { rtx v = operands[1]; - enum machine_mode new_mode + machine_mode new_mode = mode_for_size (GET_MODE_BITSIZE (GET_MODE (v)), MODE_INT, 0); operands[0] = gen_rtx_REG (new_mode, true_regnum (operands[0])); @@ -15123,7 +15123,7 @@ label: [(set (match_dup 0) (match_dup 3))] { rtx count = operands[2]; - enum machine_mode outer_mode = GET_MODE (operands[2]), inner_mode; + machine_mode outer_mode = GET_MODE (operands[2]), inner_mode; while (GET_CODE (count) == ZERO_EXTEND || GET_CODE (count) == SIGN_EXTEND || (GET_CODE (count) == SUBREG && SUBREG_BYTE (count) == 0) diff --git a/gcc/config/sparc/predicates.md b/gcc/config/sparc/predicates.md index 2bc4f17..2718172 100644 --- a/gcc/config/sparc/predicates.md +++ b/gcc/config/sparc/predicates.md @@ -124,7 +124,7 @@ (define_predicate "symbolic_operand" (match_code "symbol_ref,label_ref,const") { - enum machine_mode omode = GET_MODE (op); + machine_mode omode = GET_MODE (op); if (omode != mode && omode != VOIDmode && mode != VOIDmode) return false; diff --git a/gcc/config/sparc/sparc-protos.h b/gcc/config/sparc/sparc-protos.h index 223f5ba..cb887fa 100644 --- a/gcc/config/sparc/sparc-protos.h +++ b/gcc/config/sparc/sparc-protos.h @@ -30,7 +30,7 @@ extern void init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree); extern unsigned long sparc_type_code (tree); #ifdef ARGS_SIZE_RTX /* expr.h defines ARGS_SIZE_RTX and `enum direction' */ -extern enum direction function_arg_padding (enum machine_mode, const_tree); +extern enum direction function_arg_padding (machine_mode, const_tree); #endif /* ARGS_SIZE_RTX */ #endif /* TREE_CODE */ @@ -49,23 +49,23 @@ extern void sparc_output_scratch_registers (FILE *); extern void sparc_target_macros (void); #ifdef RTX_CODE -extern enum machine_mode select_cc_mode (enum rtx_code, rtx, rtx); +extern machine_mode select_cc_mode (enum rtx_code, rtx, rtx); /* Define the function that build the compare insn for scc and bcc. */ extern rtx gen_compare_reg (rtx cmp); extern rtx sparc_emit_float_lib_cmp (rtx, rtx, enum rtx_code); -extern void sparc_emit_floatunsdi (rtx [2], enum machine_mode); -extern void sparc_emit_fixunsdi (rtx [2], enum machine_mode); +extern void sparc_emit_floatunsdi (rtx [2], machine_mode); +extern void sparc_emit_fixunsdi (rtx [2], machine_mode); extern void emit_tfmode_binop (enum rtx_code, rtx *); extern void emit_tfmode_unop (enum rtx_code, rtx *); extern void emit_tfmode_cvt (enum rtx_code, rtx *); extern bool constant_address_p (rtx); extern bool legitimate_pic_operand_p (rtx); -extern rtx sparc_legitimize_reload_address (rtx, enum machine_mode, int, int, +extern rtx sparc_legitimize_reload_address (rtx, machine_mode, int, int, int, int *win); extern void load_got_register (void); extern void sparc_emit_call_insn (rtx, rtx); extern void sparc_defer_case_vector (rtx, rtx, int); -extern bool sparc_expand_move (enum machine_mode, rtx *); +extern bool sparc_expand_move (machine_mode, rtx *); extern void sparc_emit_set_symbolic_const64 (rtx, rtx, rtx); extern int sparc_splitdi_legitimate (rtx, rtx); extern int sparc_split_regreg_legitimate (rtx, rtx); @@ -82,13 +82,13 @@ extern bool emit_scc_insn (rtx []); extern void emit_conditional_branch_insn (rtx []); extern int registers_ok_for_ldd_peep (rtx, rtx); extern int mems_ok_for_ldd_peep (rtx, rtx, rtx); -extern rtx widen_mem_for_ldd_peep (rtx, rtx, enum machine_mode); +extern rtx widen_mem_for_ldd_peep (rtx, rtx, machine_mode); extern int empty_delay_slot (rtx_insn *); extern int emit_cbcond_nop (rtx); extern int eligible_for_call_delay (rtx_insn *); extern int eligible_for_return_delay (rtx_insn *); extern int eligible_for_sibcall_delay (rtx_insn *); -extern int emit_move_sequence (rtx, enum machine_mode); +extern int emit_move_sequence (rtx, machine_mode); extern int fp_sethi_p (rtx); extern int fp_mov_p (rtx); extern int fp_high_losum_p (rtx); @@ -103,11 +103,11 @@ extern int sparc_check_64 (rtx, rtx_insn *); extern rtx gen_df_reg (rtx, int); extern void sparc_expand_compare_and_swap (rtx op[]); extern void sparc_expand_vector_init (rtx, rtx); -extern void sparc_expand_vec_perm_bmask(enum machine_mode, rtx); -extern bool sparc_expand_conditional_move (enum machine_mode, rtx *); -extern void sparc_expand_vcond (enum machine_mode, rtx *, int, int); -unsigned int sparc_regmode_natural_size (enum machine_mode); -bool sparc_modes_tieable_p (enum machine_mode, enum machine_mode); +extern void sparc_expand_vec_perm_bmask(machine_mode, rtx); +extern bool sparc_expand_conditional_move (machine_mode, rtx *); +extern void sparc_expand_vcond (machine_mode, rtx *, int, int); +unsigned int sparc_regmode_natural_size (machine_mode); +bool sparc_modes_tieable_p (machine_mode, machine_mode); #endif /* RTX_CODE */ extern void sparc_emit_membar_for_model (enum memmodel, int, int); diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c index c44a665..6287348 100644 --- a/gcc/config/sparc/sparc.c +++ b/gcc/config/sparc/sparc.c @@ -544,7 +544,7 @@ int sparc_indent_opcode = 0; static void sparc_option_override (void); static void sparc_init_modes (void); static void scan_record_type (const_tree, int *, int *, int *); -static int function_arg_slotno (const CUMULATIVE_ARGS *, enum machine_mode, +static int function_arg_slotno (const CUMULATIVE_ARGS *, machine_mode, const_tree, bool, bool, int *, int *); static int supersparc_adjust_cost (rtx_insn *, rtx, rtx_insn *, int); @@ -555,8 +555,8 @@ static void sparc_emit_set_const64 (rtx, rtx); static void sparc_output_addr_vec (rtx); static void sparc_output_addr_diff_vec (rtx); static void sparc_output_deferred_case_vectors (void); -static bool sparc_legitimate_address_p (enum machine_mode, rtx, bool); -static bool sparc_legitimate_constant_p (enum machine_mode, rtx); +static bool sparc_legitimate_address_p (machine_mode, rtx, bool); +static bool sparc_legitimate_constant_p (machine_mode, rtx); static rtx sparc_builtin_saveregs (void); static int epilogue_renumber (rtx *, int); static bool sparc_assemble_integer (rtx, unsigned int, int); @@ -584,50 +584,50 @@ static void sparc_init_builtins (void); static void sparc_fpu_init_builtins (void); static void sparc_vis_init_builtins (void); static tree sparc_builtin_decl (unsigned, bool); -static rtx sparc_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx sparc_expand_builtin (tree, rtx, rtx, machine_mode, int); static tree sparc_fold_builtin (tree, int, tree *, bool); static void sparc_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static bool sparc_can_output_mi_thunk (const_tree, HOST_WIDE_INT, HOST_WIDE_INT, const_tree); static struct machine_function * sparc_init_machine_status (void); -static bool sparc_cannot_force_const_mem (enum machine_mode, rtx); +static bool sparc_cannot_force_const_mem (machine_mode, rtx); static rtx sparc_tls_get_addr (void); static rtx sparc_tls_got (void); -static int sparc_register_move_cost (enum machine_mode, +static int sparc_register_move_cost (machine_mode, reg_class_t, reg_class_t); static bool sparc_rtx_costs (rtx, int, int, int, int *, bool); static rtx sparc_function_value (const_tree, const_tree, bool); -static rtx sparc_libcall_value (enum machine_mode, const_rtx); +static rtx sparc_libcall_value (machine_mode, const_rtx); static bool sparc_function_value_regno_p (const unsigned int); static rtx sparc_struct_value_rtx (tree, int); -static enum machine_mode sparc_promote_function_mode (const_tree, enum machine_mode, +static machine_mode sparc_promote_function_mode (const_tree, machine_mode, int *, const_tree, int); static bool sparc_return_in_memory (const_tree, const_tree); static bool sparc_strict_argument_naming (cumulative_args_t); static void sparc_va_start (tree, rtx); static tree sparc_gimplify_va_arg (tree, tree, gimple_seq *, gimple_seq *); -static bool sparc_vector_mode_supported_p (enum machine_mode); +static bool sparc_vector_mode_supported_p (machine_mode); static bool sparc_tls_referenced_p (rtx); static rtx sparc_legitimize_tls_address (rtx); static rtx sparc_legitimize_pic_address (rtx, rtx); -static rtx sparc_legitimize_address (rtx, rtx, enum machine_mode); +static rtx sparc_legitimize_address (rtx, rtx, machine_mode); static rtx sparc_delegitimize_address (rtx); static bool sparc_mode_dependent_address_p (const_rtx, addr_space_t); static bool sparc_pass_by_reference (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static void sparc_function_arg_advance (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static rtx sparc_function_arg_1 (cumulative_args_t, - enum machine_mode, const_tree, bool, bool); + machine_mode, const_tree, bool, bool); static rtx sparc_function_arg (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static rtx sparc_function_incoming_arg (cumulative_args_t, - enum machine_mode, const_tree, bool); -static unsigned int sparc_function_arg_boundary (enum machine_mode, + machine_mode, const_tree, bool); +static unsigned int sparc_function_arg_boundary (machine_mode, const_tree); static int sparc_arg_partial_bytes (cumulative_args_t, - enum machine_mode, tree, bool); + machine_mode, tree, bool); static void sparc_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; static void sparc_file_end (void); static bool sparc_frame_pointer_required (void); @@ -638,15 +638,15 @@ static void sparc_conditional_register_usage (void); static const char *sparc_mangle_type (const_tree); #endif static void sparc_trampoline_init (rtx, tree, rtx); -static enum machine_mode sparc_preferred_simd_mode (enum machine_mode); +static machine_mode sparc_preferred_simd_mode (machine_mode); static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass); static bool sparc_print_operand_punct_valid_p (unsigned char); static void sparc_print_operand (FILE *, rtx, int); static void sparc_print_operand_address (FILE *, rtx); static reg_class_t sparc_secondary_reload (bool, rtx, reg_class_t, - enum machine_mode, + machine_mode, secondary_reload_info *); -static enum machine_mode sparc_cstore_mode (enum insn_code icode); +static machine_mode sparc_cstore_mode (enum insn_code icode); static void sparc_atomic_assign_expand_fenv (tree *, tree *, tree *); #ifdef SUBTARGET_ATTRIBUTE_TABLE @@ -1747,7 +1747,7 @@ can_use_mov_pic_label_ref (rtx label) /* Expand a move instruction. Return true if all work is done. */ bool -sparc_expand_move (enum machine_mode mode, rtx *operands) +sparc_expand_move (machine_mode mode, rtx *operands) { /* Handle sets of MEM first. */ if (GET_CODE (operands[0]) == MEM) @@ -1890,7 +1890,7 @@ sparc_expand_move (enum machine_mode mode, rtx *operands) static void sparc_emit_set_const32 (rtx op0, rtx op1) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); rtx temp = op0; if (can_create_pseudo_p ()) @@ -2718,7 +2718,7 @@ sparc_emit_set_const64 (rtx op0, rtx op1) is a PLUS, MINUS, NEG, or ASHIFT. CCmode should be used when no special processing is needed. */ -enum machine_mode +machine_mode select_cc_mode (enum rtx_code op, rtx x, rtx y ATTRIBUTE_UNUSED) { if (GET_MODE_CLASS (GET_MODE (x)) == MODE_FLOAT) @@ -2770,7 +2770,7 @@ select_cc_mode (enum rtx_code op, rtx x, rtx y ATTRIBUTE_UNUSED) static rtx gen_compare_reg_1 (enum rtx_code code, rtx x, rtx y) { - enum machine_mode mode; + machine_mode mode; rtx cc_reg; if (GET_MODE_CLASS (GET_MODE (x)) == MODE_CC) @@ -3735,7 +3735,7 @@ eligible_for_sibcall_delay (rtx_insn *trial) not constant (TLS) or not known at final link time (PIC). */ static bool -sparc_cannot_force_const_mem (enum machine_mode mode, rtx x) +sparc_cannot_force_const_mem (machine_mode mode, rtx x) { switch (GET_CODE (x)) { @@ -3829,7 +3829,7 @@ pic_address_needs_scratch (rtx x) satisfies CONSTANT_P. */ static bool -sparc_legitimate_constant_p (enum machine_mode mode, rtx x) +sparc_legitimate_constant_p (machine_mode mode, rtx x) { switch (GET_CODE (x)) { @@ -3925,7 +3925,7 @@ legitimate_pic_operand_p (rtx x) ordinarily. This changes a bit when generating PIC. */ static bool -sparc_legitimate_address_p (enum machine_mode mode, rtx addr, bool strict) +sparc_legitimate_address_p (machine_mode mode, rtx addr, bool strict) { rtx rs1 = NULL, rs2 = NULL, imm1 = NULL; @@ -4383,7 +4383,7 @@ sparc_legitimize_pic_address (rtx orig, rtx reg) static rtx sparc_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { rtx orig_x = x; @@ -4468,7 +4468,7 @@ sparc_delegitimize_address (rtx x) operand or requires a scratch register. */ rtx -sparc_legitimize_reload_address (rtx x, enum machine_mode mode, +sparc_legitimize_reload_address (rtx x, machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED, int *win) { @@ -4835,7 +4835,7 @@ sparc_init_modes (void) for (i = 0; i < NUM_MACHINE_MODES; i++) { - enum machine_mode m = (enum machine_mode) i; + machine_mode m = (machine_mode) i; unsigned int size = GET_MODE_SIZE (m); switch (GET_MODE_CLASS (m)) @@ -5308,7 +5308,7 @@ emit_save_or_restore_regs (unsigned int low, unsigned int high, rtx base, { bool reg0 = save_p (i, leaf_function); bool reg1 = save_p (i + 1, leaf_function); - enum machine_mode mode; + machine_mode mode; int regno; if (reg0 && reg1) @@ -6191,9 +6191,9 @@ init_cumulative_args (struct sparc_args *cum, tree fntype, /* Handle promotion of pointer and integer arguments. */ -static enum machine_mode +static machine_mode sparc_promote_function_mode (const_tree type, - enum machine_mode mode, + machine_mode mode, int *punsignedp, const_tree fntype ATTRIBUTE_UNUSED, int for_return ATTRIBUTE_UNUSED) @@ -6270,7 +6270,7 @@ scan_record_type (const_tree type, int *intregs_p, int *fpregs_p, *PPADDING records the amount of padding needed in words. */ static int -function_arg_slotno (const struct sparc_args *cum, enum machine_mode mode, +function_arg_slotno (const struct sparc_args *cum, machine_mode mode, const_tree type, bool named, bool incoming_p, int *pregno, int *ppadding) { @@ -6424,8 +6424,8 @@ static void function_arg_record_value_2 (const_tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool); static void function_arg_record_value_1 (const_tree, HOST_WIDE_INT, struct function_arg_record_value_parms *, bool); -static rtx function_arg_record_value (const_tree, enum machine_mode, int, int, int); -static rtx function_arg_union_value (int, enum machine_mode, int, int); +static rtx function_arg_record_value (const_tree, machine_mode, int, int, int); +static rtx function_arg_union_value (int, machine_mode, int, int); /* A subroutine of function_arg_record_value. Traverse the structure recursively and determine how many registers will be required. */ @@ -6532,7 +6532,7 @@ static void function_arg_record_value_3 (HOST_WIDE_INT bitpos, struct function_arg_record_value_parms *parms) { - enum machine_mode mode; + machine_mode mode; unsigned int regno; unsigned int startbit, endbit; int this_slotno, intslots, intoffset; @@ -6633,7 +6633,7 @@ function_arg_record_value_2 (const_tree type, HOST_WIDE_INT startbitpos, { int this_slotno = parms->slotno + bitpos / BITS_PER_WORD; int regno, nregs, pos; - enum machine_mode mode = DECL_MODE (field); + machine_mode mode = DECL_MODE (field); rtx reg; function_arg_record_value_3 (bitpos, parms); @@ -6694,7 +6694,7 @@ function_arg_record_value_2 (const_tree type, HOST_WIDE_INT startbitpos, REGBASE is the regno of the base register for the parameter array. */ static rtx -function_arg_record_value (const_tree type, enum machine_mode mode, +function_arg_record_value (const_tree type, machine_mode mode, int slotno, int named, int regbase) { HOST_WIDE_INT typesize = int_size_in_bytes (type); @@ -6790,7 +6790,7 @@ function_arg_record_value (const_tree type, enum machine_mode mode, REGNO is the hard register the union will be passed in. */ static rtx -function_arg_union_value (int size, enum machine_mode mode, int slotno, +function_arg_union_value (int size, machine_mode mode, int slotno, int regno) { int nwords = ROUND_ADVANCE (size), i; @@ -6861,7 +6861,7 @@ function_arg_vector_value (int size, int regno) TARGET_FUNCTION_INCOMING_ARG. */ static rtx -sparc_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, +sparc_function_arg_1 (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named, bool incoming_p) { const CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -6999,7 +6999,7 @@ sparc_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, /* Handle the TARGET_FUNCTION_ARG target hook. */ static rtx -sparc_function_arg (cumulative_args_t cum, enum machine_mode mode, +sparc_function_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { return sparc_function_arg_1 (cum, mode, type, named, false); @@ -7008,7 +7008,7 @@ sparc_function_arg (cumulative_args_t cum, enum machine_mode mode, /* Handle the TARGET_FUNCTION_INCOMING_ARG target hook. */ static rtx -sparc_function_incoming_arg (cumulative_args_t cum, enum machine_mode mode, +sparc_function_incoming_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named) { return sparc_function_arg_1 (cum, mode, type, named, true); @@ -7017,7 +7017,7 @@ sparc_function_incoming_arg (cumulative_args_t cum, enum machine_mode mode, /* For sparc64, objects requiring 16 byte alignment are passed that way. */ static unsigned int -sparc_function_arg_boundary (enum machine_mode mode, const_tree type) +sparc_function_arg_boundary (machine_mode mode, const_tree type) { return ((TARGET_ARCH64 && (GET_MODE_ALIGNMENT (mode) == 128 @@ -7037,7 +7037,7 @@ sparc_function_arg_boundary (enum machine_mode mode, const_tree type) mode] will be split between that reg and memory. */ static int -sparc_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode, +sparc_arg_partial_bytes (cumulative_args_t cum, machine_mode mode, tree type, bool named) { int slotno, regno, padding; @@ -7096,7 +7096,7 @@ sparc_arg_partial_bytes (cumulative_args_t cum, enum machine_mode mode, static bool sparc_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { if (TARGET_ARCH32) @@ -7148,7 +7148,7 @@ sparc_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, TYPE is null for libcalls where that information may not be available. */ static void -sparc_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +sparc_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -7193,7 +7193,7 @@ sparc_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, argument slot. */ enum direction -function_arg_padding (enum machine_mode mode, const_tree type) +function_arg_padding (machine_mode mode, const_tree type) { if (TARGET_ARCH64 && type != 0 && AGGREGATE_TYPE_P (type)) return upward; @@ -7314,7 +7314,7 @@ sparc_struct_value_rtx (tree fndecl, int incoming) except that up to 32 bytes may be returned in registers. */ static rtx -sparc_function_value_1 (const_tree type, enum machine_mode mode, +sparc_function_value_1 (const_tree type, machine_mode mode, bool outgoing) { /* Beware that the two values are swapped here wrt function_arg. */ @@ -7425,7 +7425,7 @@ sparc_function_value (const_tree valtype, /* Handle TARGET_LIBCALL_VALUE. */ static rtx -sparc_libcall_value (enum machine_mode mode, +sparc_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return sparc_function_value_1 (NULL_TREE, mode, false); @@ -7569,15 +7569,15 @@ sparc_gimplify_va_arg (tree valist, tree type, gimple_seq *pre_p, Specify whether the vector mode is supported by the hardware. */ static bool -sparc_vector_mode_supported_p (enum machine_mode mode) +sparc_vector_mode_supported_p (machine_mode mode) { return TARGET_VIS && VECTOR_MODE_P (mode) ? true : false; } /* Implement the TARGET_VECTORIZE_PREFERRED_SIMD_MODE target hook. */ -static enum machine_mode -sparc_preferred_simd_mode (enum machine_mode mode) +static machine_mode +sparc_preferred_simd_mode (machine_mode mode) { if (TARGET_VIS) switch (mode) @@ -7680,7 +7680,7 @@ output_cbranch (rtx op, rtx dest, int label, int reversed, int annul, static char string[64]; enum rtx_code code = GET_CODE (op); rtx cc_reg = XEXP (op, 0); - enum machine_mode mode = GET_MODE (cc_reg); + machine_mode mode = GET_MODE (cc_reg); const char *labelno, *branch; int spaces = 8, far; char *p; @@ -7924,7 +7924,7 @@ sparc_emit_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison) { const char *qpfunc; rtx slot0, slot1, result, tem, tem2, libfunc; - enum machine_mode mode; + machine_mode mode; enum rtx_code new_comparison; switch (comparison) @@ -8063,7 +8063,7 @@ sparc_emit_float_lib_cmp (rtx x, rtx y, enum rtx_code comparison) optabs would emit if we didn't have TFmode patterns. */ void -sparc_emit_floatunsdi (rtx *operands, enum machine_mode mode) +sparc_emit_floatunsdi (rtx *operands, machine_mode mode) { rtx i0, i1, f0, in, out; @@ -8096,7 +8096,7 @@ sparc_emit_floatunsdi (rtx *operands, enum machine_mode mode) optabs would emit if we didn't have TFmode patterns. */ void -sparc_emit_fixunsdi (rtx *operands, enum machine_mode mode) +sparc_emit_fixunsdi (rtx *operands, machine_mode mode) { rtx i0, i1, f0, in, out, limit; @@ -8140,7 +8140,7 @@ sparc_emit_fixunsdi (rtx *operands, enum machine_mode mode) const char * output_cbcond (rtx op, rtx dest, rtx_insn *insn) { - enum machine_mode mode = GET_MODE (XEXP (op, 0)); + machine_mode mode = GET_MODE (XEXP (op, 0)); enum rtx_code code = GET_CODE (op); const char *cond_str, *tmpl; int far, emit_nop, len; @@ -8269,7 +8269,7 @@ output_v9branch (rtx op, rtx dest, int reg, int label, int reversed, { static char string[64]; enum rtx_code code = GET_CODE (op); - enum machine_mode mode = GET_MODE (XEXP (op, 0)); + machine_mode mode = GET_MODE (XEXP (op, 0)); rtx note; int far; char *p; @@ -8683,7 +8683,7 @@ mems_ok_for_ldd_peep (rtx mem1, rtx mem2, rtx dependent_reg_rtx) /* Return the widened memory access made of MEM1 and MEM2 in MODE. */ rtx -widen_mem_for_ldd_peep (rtx mem1, rtx mem2, enum machine_mode mode) +widen_mem_for_ldd_peep (rtx mem1, rtx mem2, machine_mode mode) { rtx x = widen_memory_access (mem1, mode, 0); MEM_NOTRAP_P (x) = MEM_NOTRAP_P (mem1) && MEM_NOTRAP_P (mem2); @@ -10678,7 +10678,7 @@ sparc_builtin_decl (unsigned code, bool initialize_p ATTRIBUTE_UNUSED) static rtx sparc_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode tmode ATTRIBUTE_UNUSED, + machine_mode tmode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -10692,7 +10692,7 @@ sparc_expand_builtin (tree exp, rtx target, if (nonvoid) { - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; if (!target || GET_MODE (target) != tmode || ! (*insn_data[icode].operand[0].predicate) (target, tmode)) @@ -10974,7 +10974,7 @@ static bool sparc_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, int *total, bool speed ATTRIBUTE_UNUSED) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); bool float_mode_p = FLOAT_MODE_P (mode); switch (code) @@ -11200,7 +11200,7 @@ general_or_i64_p (reg_class_t rclass) /* Implement TARGET_REGISTER_MOVE_COST. */ static int -sparc_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +sparc_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { bool need_memory = false; @@ -11805,7 +11805,7 @@ void sparc_expand_compare_and_swap (rtx operands[]) { rtx bval, retval, mem, oldval, newval; - enum machine_mode mode; + machine_mode mode; enum memmodel model; bval = operands[0]; @@ -11843,7 +11843,7 @@ sparc_expand_compare_and_swap (rtx operands[]) } void -sparc_expand_vec_perm_bmask (enum machine_mode vmode, rtx sel) +sparc_expand_vec_perm_bmask (machine_mode vmode, rtx sel) { rtx t_1, t_2, t_3; @@ -12064,7 +12064,7 @@ sparc_conditional_register_usage (void) static reg_class_t sparc_preferred_reload_class (rtx x, reg_class_t rclass) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (CONSTANT_P (x)) { if (FP_REG_CLASS_P (rclass) @@ -12182,8 +12182,8 @@ output_v8plus_mult (rtx_insn *insn, rtx *operands, const char *opcode) and INNER_MODE are the modes describing TARGET. */ static void -vector_init_bshuffle (rtx target, rtx elt, enum machine_mode mode, - enum machine_mode inner_mode) +vector_init_bshuffle (rtx target, rtx elt, machine_mode mode, + machine_mode inner_mode) { rtx t1, final_insn, sel; int bmask; @@ -12264,8 +12264,8 @@ vector_init_faligndata (rtx target, rtx elt) void sparc_expand_vector_init (rtx target, rtx vals) { - const enum machine_mode mode = GET_MODE (target); - const enum machine_mode inner_mode = GET_MODE_INNER (mode); + const machine_mode mode = GET_MODE (target); + const machine_mode inner_mode = GET_MODE_INNER (mode); const int n_elts = GET_MODE_NUNITS (mode); int i, n_var = 0; bool all_same; @@ -12344,7 +12344,7 @@ sparc_expand_vector_init (rtx target, rtx vals) static reg_class_t sparc_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { enum reg_class rclass = (enum reg_class) rclass_i; @@ -12409,10 +12409,10 @@ sparc_secondary_reload (bool in_p, rtx x, reg_class_t rclass_i, OPERANDS[0] in MODE. OPERANDS[1] is the operator of the condition. */ bool -sparc_expand_conditional_move (enum machine_mode mode, rtx *operands) +sparc_expand_conditional_move (machine_mode mode, rtx *operands) { enum rtx_code rc = GET_CODE (operands[1]); - enum machine_mode cmp_mode; + machine_mode cmp_mode; rtx cc_reg, dst, cmp; cmp = operands[1]; @@ -12470,7 +12470,7 @@ sparc_expand_conditional_move (enum machine_mode mode, rtx *operands) code to be used for the condition mask. */ void -sparc_expand_vcond (enum machine_mode mode, rtx *operands, int ccode, int fcode) +sparc_expand_vcond (machine_mode mode, rtx *operands, int ccode, int fcode) { rtx mask, cop0, cop1, fcmp, cmask, bshuf, gsr; enum rtx_code code = GET_CODE (operands[3]); @@ -12510,7 +12510,7 @@ sparc_expand_vcond (enum machine_mode mode, rtx *operands, int ccode, int fcode) registers should return 4 here. */ unsigned int -sparc_regmode_natural_size (enum machine_mode mode) +sparc_regmode_natural_size (machine_mode mode) { int size = UNITS_PER_WORD; @@ -12534,7 +12534,7 @@ sparc_regmode_natural_size (enum machine_mode mode) point registers are 32-bit addressable. */ bool -sparc_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) +sparc_modes_tieable_p (machine_mode mode1, machine_mode mode2) { enum mode_class mclass1, mclass2; unsigned short size1, size2; @@ -12573,7 +12573,7 @@ sparc_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) /* Implement TARGET_CSTORE_MODE. */ -static enum machine_mode +static machine_mode sparc_cstore_mode (enum insn_code icode ATTRIBUTE_UNUSED) { return (TARGET_ARCH64 ? DImode : SImode); diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 542990f..c3995b2 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -2371,14 +2371,14 @@ #if HOST_BITS_PER_WIDE_INT == 32 gcc_unreachable (); #else - enum machine_mode mode = GET_MODE (operands[1]); + machine_mode mode = GET_MODE (operands[1]); rtx tem = simplify_subreg (DImode, operands[1], mode, 0); emit_insn (gen_movdi (operands[0], tem)); #endif } else { - enum machine_mode mode = GET_MODE (operands[1]); + machine_mode mode = GET_MODE (operands[1]); rtx hi = simplify_subreg (SImode, operands[1], mode, 0); rtx lo = simplify_subreg (SImode, operands[1], mode, 4); diff --git a/gcc/config/spu/spu-protos.h b/gcc/config/spu/spu-protos.h index c5672b6..323a66c 100644 --- a/gcc/config/spu/spu-protos.h +++ b/gcc/config/spu/spu-protos.h @@ -37,37 +37,37 @@ extern void spu_expand_epilogue (bool sibcall_p); extern rtx spu_return_addr (int count, rtx frame); #ifdef RTX_CODE -extern rtx hwint_to_const_double (enum machine_mode mode, HOST_WIDE_INT v); -extern rtx spu_const (enum machine_mode mode, HOST_WIDE_INT val); -extern rtx spu_const_from_ints (enum machine_mode mode, +extern rtx hwint_to_const_double (machine_mode mode, HOST_WIDE_INT v); +extern rtx spu_const (machine_mode mode, HOST_WIDE_INT val); +extern rtx spu_const_from_ints (machine_mode mode, int a, int b, int c, int d); extern rtx spu_float_const (const char *string, - enum machine_mode mode); -extern int immediate_load_p (rtx op, enum machine_mode mode); -extern int logical_immediate_p (rtx op, enum machine_mode mode); -extern int iohl_immediate_p (rtx op, enum machine_mode mode); -extern int arith_immediate_p (rtx op, enum machine_mode mode, + machine_mode mode); +extern int immediate_load_p (rtx op, machine_mode mode); +extern int logical_immediate_p (rtx op, machine_mode mode); +extern int iohl_immediate_p (rtx op, machine_mode mode); +extern int arith_immediate_p (rtx op, machine_mode mode, HOST_WIDE_INT low, HOST_WIDE_INT high); -extern bool exp2_immediate_p (rtx op, enum machine_mode mode, int low, +extern bool exp2_immediate_p (rtx op, machine_mode mode, int low, int high); extern int spu_constant_address_p (rtx x); -extern bool spu_legitimate_constant_p (enum machine_mode, rtx); +extern bool spu_legitimate_constant_p (machine_mode, rtx); extern int spu_initial_elimination_offset (int from, int to); extern rtx spu_function_value (const_tree type, const_tree func); -extern int spu_expand_mov (rtx * ops, enum machine_mode mode); +extern int spu_expand_mov (rtx * ops, machine_mode mode); extern int spu_split_load (rtx * ops); extern int spu_split_store (rtx * ops); extern int fsmbi_const_p (rtx x); -extern int cpat_const_p (rtx x, enum machine_mode mode); +extern int cpat_const_p (rtx x, machine_mode mode); extern rtx gen_cpat_const (rtx * ops); -extern void constant_to_array (enum machine_mode mode, rtx x, +extern void constant_to_array (machine_mode mode, rtx x, unsigned char *arr); -extern rtx array_to_constant (enum machine_mode mode, const unsigned char *arr); -extern rtx spu_gen_exp2 (enum machine_mode mode, rtx x); +extern rtx array_to_constant (machine_mode mode, const unsigned char *arr); +extern rtx spu_gen_exp2 (machine_mode mode, rtx x); extern void spu_allocate_stack (rtx op0, rtx op1); extern void spu_restore_stack_nonlocal (rtx op0, rtx op1); extern void spu_restore_stack_block (rtx op0, rtx op1); -extern rtx spu_gen_subreg (enum machine_mode mode, rtx x); +extern rtx spu_gen_subreg (machine_mode mode, rtx x); extern int spu_safe_dma(HOST_WIDE_INT channel); extern void spu_builtin_splats (rtx ops[]); extern void spu_builtin_extract (rtx ops[]); @@ -75,7 +75,7 @@ extern void spu_builtin_insert (rtx ops[]); extern void spu_builtin_promote (rtx ops[]); extern void spu_expand_sign_extend (rtx ops[]); extern void spu_expand_vector_init (rtx target, rtx vals); -extern rtx spu_legitimize_reload_address (rtx, enum machine_mode, int, int); +extern rtx spu_legitimize_reload_address (rtx, machine_mode, int, int); #endif /* RTX_CODE */ extern void spu_init_expanders (void); @@ -86,8 +86,8 @@ extern void spu_function_profiler (FILE *, int); extern tree spu_resolve_overloaded_builtin (location_t, tree fndecl, void *fnargs); extern rtx spu_expand_builtin (tree exp, rtx target, rtx subtarget, - enum machine_mode mode, int ignore); -extern rtx spu_expand_builtin (tree, rtx, rtx, enum machine_mode, int); + machine_mode mode, int ignore); +extern rtx spu_expand_builtin (tree, rtx, rtx, machine_mode, int); #endif /* _SPU_PROTOS_ */ diff --git a/gcc/config/spu/spu.c b/gcc/config/spu/spu.c index ef1ccef..eef42f0 100644 --- a/gcc/config/spu/spu.c +++ b/gcc/config/spu/spu.c @@ -218,7 +218,7 @@ static enum spu_immediate which_immediate_load (HOST_WIDE_INT val); static enum spu_immediate which_logical_immediate (HOST_WIDE_INT val); static int cpat_info(unsigned char *arr, int size, int *prun, int *pstart); static enum immediate_class classify_immediate (rtx op, - enum machine_mode mode); + machine_mode mode); /* Pointer mode for __ea references. */ #define EAmode (spu_ea_model != 32 ? DImode : SImode) @@ -307,7 +307,7 @@ spu_option_override (void) be manipulated in non-trivial ways. In particular, this means all the arithmetic is supported. */ static bool -spu_scalar_mode_supported_p (enum machine_mode mode) +spu_scalar_mode_supported_p (machine_mode mode) { switch (mode) { @@ -329,7 +329,7 @@ spu_scalar_mode_supported_p (enum machine_mode mode) least some operations are supported; need to check optabs or builtins for further details. */ static bool -spu_vector_mode_supported_p (enum machine_mode mode) +spu_vector_mode_supported_p (machine_mode mode) { switch (mode) { @@ -352,8 +352,8 @@ spu_vector_mode_supported_p (enum machine_mode mode) int valid_subreg (rtx op) { - enum machine_mode om = GET_MODE (op); - enum machine_mode im = GET_MODE (SUBREG_REG (op)); + machine_mode om = GET_MODE (op); + machine_mode im = GET_MODE (SUBREG_REG (op)); return om != VOIDmode && im != VOIDmode && (GET_MODE_SIZE (im) == GET_MODE_SIZE (om) || (GET_MODE_SIZE (im) <= 4 && GET_MODE_SIZE (om) <= 4) @@ -365,7 +365,7 @@ valid_subreg (rtx op) static rtx adjust_operand (rtx op, HOST_WIDE_INT * start) { - enum machine_mode mode; + machine_mode mode; int op_size; /* Strip any paradoxical SUBREG. */ if (GET_CODE (op) == SUBREG @@ -480,7 +480,7 @@ spu_expand_insv (rtx ops[]) HOST_WIDE_INT width = INTVAL (ops[1]); HOST_WIDE_INT start = INTVAL (ops[2]); HOST_WIDE_INT maskbits; - enum machine_mode dst_mode; + machine_mode dst_mode; rtx dst = ops[0], src = ops[3]; int dst_size; rtx mask; @@ -497,7 +497,7 @@ spu_expand_insv (rtx ops[]) if (CONSTANT_P (src)) { - enum machine_mode m = + machine_mode m = (width <= 32 ? SImode : width <= 64 ? DImode : TImode); src = force_reg (m, convert_to_mode (m, src, 0)); } @@ -684,8 +684,8 @@ spu_emit_branch_or_set (int is_set, rtx cmp, rtx operands[]) int reverse_test = 0; rtx compare_result, eq_result; rtx comp_rtx, eq_rtx; - enum machine_mode comp_mode; - enum machine_mode op_mode; + machine_mode comp_mode; + machine_mode op_mode; enum spu_comp_code scode, eq_code; enum insn_code ior_code; enum rtx_code code = GET_CODE (cmp); @@ -954,7 +954,7 @@ spu_emit_branch_or_set (int is_set, rtx cmp, rtx operands[]) rtx target = operands[0]; int compare_size = GET_MODE_BITSIZE (comp_mode); int target_size = GET_MODE_BITSIZE (GET_MODE (target)); - enum machine_mode mode = mode_for_size (target_size, MODE_INT, 0); + machine_mode mode = mode_for_size (target_size, MODE_INT, 0); rtx select_mask; rtx op_t = operands[2]; rtx op_f = operands[3]; @@ -1024,7 +1024,7 @@ const_double_to_hwint (rtx x) } rtx -hwint_to_const_double (enum machine_mode mode, HOST_WIDE_INT v) +hwint_to_const_double (machine_mode mode, HOST_WIDE_INT v) { long tv[2]; REAL_VALUE_TYPE rv; @@ -1091,7 +1091,7 @@ print_operand_address (FILE * file, register rtx addr) void print_operand (FILE * file, rtx x, int code) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); HOST_WIDE_INT val; unsigned char arr[16]; int xcode = GET_CODE (x); @@ -1506,7 +1506,7 @@ get_pic_reg (void) int spu_split_immediate (rtx * ops) { - enum machine_mode mode = GET_MODE (ops[0]); + machine_mode mode = GET_MODE (ops[0]); enum immediate_class c = classify_immediate (ops[1], mode); switch (c) @@ -1517,7 +1517,7 @@ spu_split_immediate (rtx * ops) unsigned char arrlo[16]; rtx to, temp, hi, lo; int i; - enum machine_mode imode = mode; + machine_mode imode = mode; /* We need to do reals as ints because the constant used in the IOR might not be a legitimate real constant. */ imode = int_mode_for_mode (mode); @@ -1547,7 +1547,7 @@ spu_split_immediate (rtx * ops) unsigned char arr_andbi[16]; rtx to, reg_fsmbi, reg_and; int i; - enum machine_mode imode = mode; + machine_mode imode = mode; /* We need to do reals as ints because the constant used in the * AND might not be a legitimate real constant. */ imode = int_mode_for_mode (mode); @@ -1920,7 +1920,7 @@ spu_return_addr (int count, rtx frame ATTRIBUTE_UNUSED) If MODE is a vector mode, every element will be VAL. For TImode, VAL will be zero extended to 128 bits. */ rtx -spu_const (enum machine_mode mode, HOST_WIDE_INT val) +spu_const (machine_mode mode, HOST_WIDE_INT val) { rtx inner; rtvec v; @@ -1955,7 +1955,7 @@ spu_const (enum machine_mode mode, HOST_WIDE_INT val) /* Create a MODE vector constant from 4 ints. */ rtx -spu_const_from_ints(enum machine_mode mode, int a, int b, int c, int d) +spu_const_from_ints(machine_mode mode, int a, int b, int c, int d) { unsigned char arr[16]; arr[0] = (a >> 24) & 0xff; @@ -3080,7 +3080,7 @@ spu_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep_insn, int cost) /* Create a CONST_DOUBLE from a string. */ rtx -spu_float_const (const char *string, enum machine_mode mode) +spu_float_const (const char *string, machine_mode mode) { REAL_VALUE_TYPE value; value = REAL_VALUE_ATOF (string, mode); @@ -3115,7 +3115,7 @@ which_immediate_load (HOST_WIDE_INT val) /* Return true when OP can be loaded by one of the il instructions, or when flow2 is not completed and OP can be loaded using ilhu and iohl. */ int -immediate_load_p (rtx op, enum machine_mode mode) +immediate_load_p (rtx op, machine_mode mode) { if (CONSTANT_P (op)) { @@ -3178,7 +3178,7 @@ cpat_info(unsigned char *arr, int size, int *prun, int *pstart) /* OP is a CONSTANT_P. Determine what instructions can be used to load it into a register. MODE is only valid when OP is a CONST_INT. */ static enum immediate_class -classify_immediate (rtx op, enum machine_mode mode) +classify_immediate (rtx op, machine_mode mode) { HOST_WIDE_INT val; unsigned char arr[16]; @@ -3318,7 +3318,7 @@ const_vector_immediate_p (rtx x) } int -logical_immediate_p (rtx op, enum machine_mode mode) +logical_immediate_p (rtx op, machine_mode mode) { HOST_WIDE_INT val; unsigned char arr[16]; @@ -3350,7 +3350,7 @@ logical_immediate_p (rtx op, enum machine_mode mode) } int -iohl_immediate_p (rtx op, enum machine_mode mode) +iohl_immediate_p (rtx op, machine_mode mode) { HOST_WIDE_INT val; unsigned char arr[16]; @@ -3381,7 +3381,7 @@ iohl_immediate_p (rtx op, enum machine_mode mode) } int -arith_immediate_p (rtx op, enum machine_mode mode, +arith_immediate_p (rtx op, machine_mode mode, HOST_WIDE_INT low, HOST_WIDE_INT high) { HOST_WIDE_INT val; @@ -3425,9 +3425,9 @@ arith_immediate_p (rtx op, enum machine_mode mode, OP is 2^scale, scale >= LOW && scale <= HIGH. When OP is a vector, all entries must be the same. */ bool -exp2_immediate_p (rtx op, enum machine_mode mode, int low, int high) +exp2_immediate_p (rtx op, machine_mode mode, int low, int high) { - enum machine_mode int_mode; + machine_mode int_mode; HOST_WIDE_INT val; unsigned char arr[16]; int bytes, i, j; @@ -3502,7 +3502,7 @@ ea_symbol_ref_p (const_rtx x) (DImode, DFmode) - a 128-bit constant where the four 32-bit words match. */ bool -spu_legitimate_constant_p (enum machine_mode mode, rtx x) +spu_legitimate_constant_p (machine_mode mode, rtx x) { subrtx_iterator::array_type array; if (GET_CODE (x) == HIGH) @@ -3540,7 +3540,7 @@ spu_legitimate_constant_p (enum machine_mode mode, rtx x) 16 byte modes because the expand phase will change all smaller MEM references to TImode. */ static bool -spu_legitimate_address_p (enum machine_mode mode, +spu_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict) { int aligned = GET_MODE_SIZE (mode) >= 16; @@ -3611,7 +3611,7 @@ spu_legitimate_address_p (enum machine_mode mode, /* Like spu_legitimate_address_p, except with named addresses. */ static bool -spu_addr_space_legitimate_address_p (enum machine_mode mode, rtx x, +spu_addr_space_legitimate_address_p (machine_mode mode, rtx x, bool reg_ok_strict, addr_space_t as) { if (as == ADDR_SPACE_EA) @@ -3627,7 +3627,7 @@ spu_addr_space_legitimate_address_p (enum machine_mode mode, rtx x, register. */ static rtx spu_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { rtx op0, op1; /* Make sure both operands are registers. */ @@ -3656,7 +3656,7 @@ spu_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, /* Like spu_legitimate_address, except with named address support. */ static rtx -spu_addr_space_legitimize_address (rtx x, rtx oldx, enum machine_mode mode, +spu_addr_space_legitimize_address (rtx x, rtx oldx, machine_mode mode, addr_space_t as) { if (as != ADDR_SPACE_GENERIC) @@ -3667,7 +3667,7 @@ spu_addr_space_legitimize_address (rtx x, rtx oldx, enum machine_mode mode, /* Reload reg + const_int for out-of-range displacements. */ rtx -spu_legitimize_reload_address (rtx ad, enum machine_mode mode ATTRIBUTE_UNUSED, +spu_legitimize_reload_address (rtx ad, machine_mode mode ATTRIBUTE_UNUSED, int opnum, int type) { bool removed_and = false; @@ -3729,7 +3729,7 @@ spu_handle_vector_attribute (tree * node, tree name, int flags ATTRIBUTE_UNUSED, bool * no_add_attrs) { tree type = *node, result = NULL_TREE; - enum machine_mode mode; + machine_mode mode; int unsigned_p; while (POINTER_TYPE_P (type) @@ -3816,7 +3816,7 @@ spu_initial_elimination_offset (int from, int to) rtx spu_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED) { - enum machine_mode mode = TYPE_MODE (type); + machine_mode mode = TYPE_MODE (type); int byte_size = ((mode == BLKmode) ? int_size_in_bytes (type) : GET_MODE_SIZE (mode)); @@ -3824,7 +3824,7 @@ spu_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED) if ((mode == BLKmode || (type && AGGREGATE_TYPE_P (type))) && byte_size <= UNITS_PER_WORD * MAX_REGISTER_RETURN && byte_size > 0) { - enum machine_mode smode; + machine_mode smode; rtvec v; int i; int nregs = (byte_size + UNITS_PER_WORD - 1) / UNITS_PER_WORD; @@ -3858,7 +3858,7 @@ spu_function_value (const_tree type, const_tree func ATTRIBUTE_UNUSED) static rtx spu_function_arg (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -3879,7 +3879,7 @@ spu_function_arg (cumulative_args_t cum_v, if ((mode == BLKmode || (type && AGGREGATE_TYPE_P (type))) && byte_size < UNITS_PER_WORD && byte_size > 0) { - enum machine_mode smode; + machine_mode smode; rtx gr_reg; if (byte_size < 4) byte_size = 4; @@ -3894,7 +3894,7 @@ spu_function_arg (cumulative_args_t cum_v, } static void -spu_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +spu_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -3911,7 +3911,7 @@ spu_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, /* Variable sized types are passed by reference. */ static bool spu_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type, bool named ATTRIBUTE_UNUSED) { return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST; @@ -4101,7 +4101,7 @@ spu_gimplify_va_arg_expr (tree valist, tree type, gimple_seq * pre_p, in the stack then save no registers. Set pretend_args_size to the amount of space needed to save the registers. */ static void -spu_setup_incoming_varargs (cumulative_args_t cum, enum machine_mode mode, +spu_setup_incoming_varargs (cumulative_args_t cum, machine_mode mode, tree type, int *pretend_size, int no_rtl) { if (!no_rtl) @@ -4175,7 +4175,7 @@ spu_encode_section_info (tree decl, rtx rtl, int first) static int store_with_one_insn_p (rtx mem) { - enum machine_mode mode = GET_MODE (mem); + machine_mode mode = GET_MODE (mem); rtx addr = XEXP (mem, 0); if (mode == BLKmode) return 0; @@ -4450,7 +4450,7 @@ expand_ea_mem (rtx mem, bool is_store) } int -spu_expand_mov (rtx * ops, enum machine_mode mode) +spu_expand_mov (rtx * ops, machine_mode mode) { if (GET_CODE (ops[0]) == SUBREG && !valid_subreg (ops[0])) { @@ -4464,7 +4464,7 @@ spu_expand_mov (rtx * ops, enum machine_mode mode) if (GET_CODE (ops[1]) == SUBREG && !valid_subreg (ops[1])) { rtx from = SUBREG_REG (ops[1]); - enum machine_mode imode = int_mode_for_mode (GET_MODE (from)); + machine_mode imode = int_mode_for_mode (GET_MODE (from)); gcc_assert (GET_MODE_CLASS (mode) == MODE_INT && GET_MODE_CLASS (imode) == MODE_INT @@ -4531,8 +4531,8 @@ spu_expand_mov (rtx * ops, enum machine_mode mode) static void spu_convert_move (rtx dst, rtx src) { - enum machine_mode mode = GET_MODE (dst); - enum machine_mode int_mode = mode_for_size (GET_MODE_BITSIZE (mode), MODE_INT, 0); + machine_mode mode = GET_MODE (dst); + machine_mode int_mode = mode_for_size (GET_MODE_BITSIZE (mode), MODE_INT, 0); rtx reg; gcc_assert (GET_MODE (src) == TImode); reg = int_mode != mode ? gen_reg_rtx (int_mode) : dst; @@ -4695,7 +4695,7 @@ spu_expand_load (rtx dst0, rtx dst1, rtx src, int extra_rotby) int spu_split_load (rtx * ops) { - enum machine_mode mode = GET_MODE (ops[0]); + machine_mode mode = GET_MODE (ops[0]); rtx addr, load, rot; int rot_amt; @@ -4729,7 +4729,7 @@ spu_split_load (rtx * ops) int spu_split_store (rtx * ops) { - enum machine_mode mode = GET_MODE (ops[0]); + machine_mode mode = GET_MODE (ops[0]); rtx reg; rtx addr, p0, p1, p1_lo, smem; int aform; @@ -4986,7 +4986,7 @@ fsmbi_const_p (rtx x) /* Return TRUE if x is a CONST_INT, CONST_DOUBLE or CONST_VECTOR that can be generated using the cbd, chd, cwd or cdd instruction. */ int -cpat_const_p (rtx x, enum machine_mode mode) +cpat_const_p (rtx x, machine_mode mode) { if (CONSTANT_P (x)) { @@ -5032,7 +5032,7 @@ gen_cpat_const (rtx * ops) array. Use MODE for CONST_INT's. When the constant's mode is smaller than 16 bytes, the value is repeated across the rest of the array. */ void -constant_to_array (enum machine_mode mode, rtx x, unsigned char arr[16]) +constant_to_array (machine_mode mode, rtx x, unsigned char arr[16]) { HOST_WIDE_INT val; int i, j, first; @@ -5111,9 +5111,9 @@ constant_to_array (enum machine_mode mode, rtx x, unsigned char arr[16]) smaller than 16 bytes, use the bytes that would represent that value in a register, e.g., for QImode return the value of arr[3]. */ rtx -array_to_constant (enum machine_mode mode, const unsigned char arr[16]) +array_to_constant (machine_mode mode, const unsigned char arr[16]) { - enum machine_mode inner_mode; + machine_mode inner_mode; rtvec v; int units, size, i, j, k; HOST_WIDE_INT val; @@ -5249,7 +5249,7 @@ spu_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, int opno ATTRIBUTE_UNUSED, int *total, bool speed ATTRIBUTE_UNUSED) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int cost = COSTS_N_INSNS (2); /* Folding to a CONST_VECTOR will use extra space but there might @@ -5360,7 +5360,7 @@ spu_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, return true; } -static enum machine_mode +static machine_mode spu_unwind_word_mode (void) { return SImode; @@ -5489,7 +5489,7 @@ spu_init_libfuncs (void) /* Make a subreg, stripping any existing subreg. We could possibly just call simplify_subreg, but in this case we know what we want. */ rtx -spu_gen_subreg (enum machine_mode mode, rtx x) +spu_gen_subreg (machine_mode mode, rtx x) { if (GET_CODE (x) == SUBREG) x = SUBREG_REG (x); @@ -5660,7 +5660,7 @@ spu_safe_dma (HOST_WIDE_INT channel) void spu_builtin_splats (rtx ops[]) { - enum machine_mode mode = GET_MODE (ops[0]); + machine_mode mode = GET_MODE (ops[0]); if (GET_CODE (ops[1]) == CONST_INT || GET_CODE (ops[1]) == CONST_DOUBLE) { unsigned char arr[16]; @@ -5709,7 +5709,7 @@ spu_builtin_splats (rtx ops[]) void spu_builtin_extract (rtx ops[]) { - enum machine_mode mode; + machine_mode mode; rtx rot, from, tmp; mode = GET_MODE (ops[1]); @@ -5774,8 +5774,8 @@ spu_builtin_extract (rtx ops[]) void spu_builtin_insert (rtx ops[]) { - enum machine_mode mode = GET_MODE (ops[0]); - enum machine_mode imode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (ops[0]); + machine_mode imode = GET_MODE_INNER (mode); rtx mask = gen_reg_rtx (TImode); rtx offset; @@ -5796,7 +5796,7 @@ spu_builtin_insert (rtx ops[]) void spu_builtin_promote (rtx ops[]) { - enum machine_mode mode, imode; + machine_mode mode, imode; rtx rot, from, offset; HOST_WIDE_INT pos; @@ -5982,7 +5982,7 @@ spu_expand_sign_extend (rtx ops[]) void spu_expand_vector_init (rtx target, rtx vals) { - enum machine_mode mode = GET_MODE (target); + machine_mode mode = GET_MODE (target); int n_elts = GET_MODE_NUNITS (mode); int n_var = 0; bool all_same = true; @@ -6073,8 +6073,8 @@ spu_expand_vector_init (rtx target, rtx vals) static int get_vec_cmp_insn (enum rtx_code code, - enum machine_mode dest_mode, - enum machine_mode op_mode) + machine_mode dest_mode, + machine_mode op_mode) { switch (code) @@ -6123,12 +6123,12 @@ get_vec_cmp_insn (enum rtx_code code, static rtx spu_emit_vector_compare (enum rtx_code rcode, rtx op0, rtx op1, - enum machine_mode dmode) + machine_mode dmode) { int vec_cmp_insn; rtx mask; - enum machine_mode dest_mode; - enum machine_mode op_mode = GET_MODE (op1); + machine_mode dest_mode; + machine_mode op_mode = GET_MODE (op1); gcc_assert (GET_MODE (op0) == GET_MODE (op1)); @@ -6304,7 +6304,7 @@ int spu_emit_vector_cond_expr (rtx dest, rtx op1, rtx op2, rtx cond, rtx cc_op0, rtx cc_op1) { - enum machine_mode dest_mode = GET_MODE (dest); + machine_mode dest_mode = GET_MODE (dest); enum rtx_code rcode = GET_CODE (cond); rtx mask; @@ -6317,7 +6317,7 @@ spu_emit_vector_cond_expr (rtx dest, rtx op1, rtx op2, } static rtx -spu_force_reg (enum machine_mode mode, rtx op) +spu_force_reg (machine_mode mode, rtx op) { rtx x, r; if (GET_MODE (op) == VOIDmode || GET_MODE (op) == BLKmode) @@ -6438,7 +6438,7 @@ spu_expand_builtin_1 (struct spu_builtin_description *d, rtx pat; rtx ops[8]; enum insn_code icode = (enum insn_code) d->icode; - enum machine_mode mode, tmode; + machine_mode mode, tmode; int i, p; int n_operands; tree return_type; @@ -6473,7 +6473,7 @@ spu_expand_builtin_1 (struct spu_builtin_description *d, if (d->fcode == SPU_MASK_FOR_LOAD) { - enum machine_mode mode = insn_data[icode].operand[1].mode; + machine_mode mode = insn_data[icode].operand[1].mode; tree arg; rtx addr, op, pat; @@ -6524,7 +6524,7 @@ spu_expand_builtin_1 (struct spu_builtin_description *d, else { rtx reg = gen_reg_rtx (mode); - enum machine_mode imode = GET_MODE_INNER (mode); + machine_mode imode = GET_MODE_INNER (mode); if (!spu_nonmem_operand (ops[i], GET_MODE (ops[i]))) ops[i] = force_reg (GET_MODE (ops[i]), ops[i]); if (imode != GET_MODE (ops[i])) @@ -6598,7 +6598,7 @@ rtx spu_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -6737,7 +6737,7 @@ spu_vector_alignment_reachable (const_tree type ATTRIBUTE_UNUSED, bool is_packed } /* Return the appropriate mode for a named address pointer. */ -static enum machine_mode +static machine_mode spu_addr_space_pointer_mode (addr_space_t addrspace) { switch (addrspace) @@ -6752,7 +6752,7 @@ spu_addr_space_pointer_mode (addr_space_t addrspace) } /* Return the appropriate mode for a named address address. */ -static enum machine_mode +static machine_mode spu_addr_space_address_mode (addr_space_t addrspace) { switch (addrspace) @@ -6898,7 +6898,7 @@ spu_init_expanders (void) } } -static enum machine_mode +static machine_mode spu_libgcc_cmp_return_mode (void) { @@ -6907,7 +6907,7 @@ spu_libgcc_cmp_return_mode (void) return SImode; } -static enum machine_mode +static machine_mode spu_libgcc_shift_count_mode (void) { /* For SPU word mode is TI mode so it is better to use SImode @@ -6966,7 +6966,7 @@ spu_unique_section (tree decl, int reloc) the result is valid for MODE. Currently, MODE must be V4SFmode and SCALE must be SImode. */ rtx -spu_gen_exp2 (enum machine_mode mode, rtx scale) +spu_gen_exp2 (machine_mode mode, rtx scale) { gcc_assert (mode == V4SFmode); gcc_assert (GET_MODE (scale) == SImode || GET_CODE (scale) == CONST_INT); diff --git a/gcc/config/stormy16/stormy16-protos.h b/gcc/config/stormy16/stormy16-protos.h index aafa52b..6acf613 100644 --- a/gcc/config/stormy16/stormy16-protos.h +++ b/gcc/config/stormy16/stormy16-protos.h @@ -51,19 +51,19 @@ extern void xstormy16_expand_andqi3 (rtx *); #endif #if defined (HAVE_MACHINE_MODES) && defined (RTX_CODE) -extern void xstormy16_split_cbranch (enum machine_mode, rtx, rtx, rtx); -extern int short_memory_operand (rtx, enum machine_mode); -extern int nonimmediate_nonstack_operand (rtx, enum machine_mode); +extern void xstormy16_split_cbranch (machine_mode, rtx, rtx, rtx); +extern int short_memory_operand (rtx, machine_mode); +extern int nonimmediate_nonstack_operand (rtx, machine_mode); extern enum reg_class xstormy16_secondary_reload_class - (enum reg_class, enum machine_mode, rtx); -extern void xstormy16_split_move (enum machine_mode, rtx, rtx); -extern void xstormy16_expand_move (enum machine_mode, rtx, rtx); -extern void xstormy16_expand_arith (enum machine_mode, enum rtx_code, + (enum reg_class, machine_mode, rtx); +extern void xstormy16_split_move (machine_mode, rtx, rtx); +extern void xstormy16_expand_move (machine_mode, rtx, rtx); +extern void xstormy16_expand_arith (machine_mode, enum rtx_code, rtx, rtx, rtx); -extern const char * xstormy16_output_shift (enum machine_mode, enum rtx_code, +extern const char * xstormy16_output_shift (machine_mode, enum rtx_code, rtx, rtx, rtx); -extern int xstormy16_below100_symbol (rtx, enum machine_mode); -extern int xstormy16_splittable_below100_operand (rtx, enum machine_mode); -extern bool xstormy16_legitimate_address_p (enum machine_mode, rtx, bool); +extern int xstormy16_below100_symbol (rtx, machine_mode); +extern int xstormy16_splittable_below100_operand (rtx, machine_mode); +extern bool xstormy16_legitimate_address_p (machine_mode, rtx, bool); #endif diff --git a/gcc/config/stormy16/stormy16.c b/gcc/config/stormy16/stormy16.c index ebd539e..52d0239 100644 --- a/gcc/config/stormy16/stormy16.c +++ b/gcc/config/stormy16/stormy16.c @@ -82,9 +82,9 @@ static void xstormy16_asm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static void xstormy16_init_builtins (void); -static rtx xstormy16_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx xstormy16_expand_builtin (tree, rtx, rtx, machine_mode, int); static bool xstormy16_rtx_costs (rtx, int, int, int, int *, bool); -static int xstormy16_address_cost (rtx, enum machine_mode, addr_space_t, bool); +static int xstormy16_address_cost (rtx, machine_mode, addr_space_t, bool); static bool xstormy16_return_in_memory (const_tree, const_tree); static GTY(()) section *bss100_section; @@ -129,7 +129,7 @@ xstormy16_rtx_costs (rtx x, int code, int outer_code ATTRIBUTE_UNUSED, } static int -xstormy16_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, +xstormy16_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -141,7 +141,7 @@ xstormy16_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, /* Worker function for TARGET_MEMORY_MOVE_COST. */ static int -xstormy16_memory_move_cost (enum machine_mode mode, reg_class_t rclass, +xstormy16_memory_move_cost (machine_mode mode, reg_class_t rclass, bool in) { return (5 + memory_move_secondary_cost (mode, rclass, in)); @@ -176,7 +176,7 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx op0, rtx op1, rtx loc) { rtx condition_rtx, loc_ref, branch, cy_clobber; rtvec vec; - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (op0); gcc_assert (mode == HImode || mode == SImode); @@ -270,7 +270,7 @@ xstormy16_emit_cbranch (enum rtx_code code, rtx op0, rtx op1, rtx loc) xstormy16_expand_arith. */ void -xstormy16_split_cbranch (enum machine_mode mode, rtx label, rtx comparison, +xstormy16_split_cbranch (machine_mode mode, rtx label, rtx comparison, rtx dest) { rtx op0 = XEXP (comparison, 0); @@ -495,7 +495,7 @@ xstormy16_output_cbranch_si (rtx op, const char *label, int reversed, enum reg_class xstormy16_secondary_reload_class (enum reg_class rclass, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, rtx x) { /* This chip has the interesting property that only the first eight @@ -527,7 +527,7 @@ xstormy16_preferred_reload_class (rtx x, reg_class_t rclass) int xstormy16_below100_symbol (rtx x, - enum machine_mode mode ATTRIBUTE_UNUSED) + machine_mode mode ATTRIBUTE_UNUSED) { if (GET_CODE (x) == CONST) x = XEXP (x, 0); @@ -552,7 +552,7 @@ xstormy16_below100_symbol (rtx x, MEM will get split into smaller sized accesses. */ int -xstormy16_splittable_below100_operand (rtx x, enum machine_mode mode) +xstormy16_splittable_below100_operand (rtx x, machine_mode mode) { if (MEM_P (x) && MEM_VOLATILE_P (x)) return 0; @@ -660,7 +660,7 @@ xstormy16_expand_andqi3 (rtx *operands) && (INTVAL (X) + (OFFSET) < 0x100 || INTVAL (X) + (OFFSET) >= 0x7F00)) bool -xstormy16_legitimate_address_p (enum machine_mode mode ATTRIBUTE_UNUSED, +xstormy16_legitimate_address_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x, bool strict) { if (LEGITIMATE_ADDRESS_CONST_INT_P (x, 0)) @@ -716,7 +716,7 @@ xstormy16_mode_dependent_address_p (const_rtx x, } int -short_memory_operand (rtx x, enum machine_mode mode) +short_memory_operand (rtx x, machine_mode mode) { if (! memory_operand (x, mode)) return 0; @@ -730,7 +730,7 @@ short_memory_operand (rtx x, enum machine_mode mode) This function is only called when reload_completed. */ void -xstormy16_split_move (enum machine_mode mode, rtx dest, rtx src) +xstormy16_split_move (machine_mode mode, rtx dest, rtx src) { int num_words = GET_MODE_BITSIZE (mode) / BITS_PER_WORD; int direction, end, i; @@ -862,7 +862,7 @@ xstormy16_split_move (enum machine_mode mode, rtx dest, rtx src) mode MODE from SRC to DEST. */ void -xstormy16_expand_move (enum machine_mode mode, rtx dest, rtx src) +xstormy16_expand_move (machine_mode mode, rtx dest, rtx src) { if (MEM_P (dest) && (GET_CODE (XEXP (dest, 0)) == PRE_MODIFY)) { @@ -1238,7 +1238,7 @@ xstormy16_function_profiler (void) the word count. */ static void -xstormy16_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +xstormy16_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1254,7 +1254,7 @@ xstormy16_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, } static rtx -xstormy16_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +xstormy16_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -1477,7 +1477,7 @@ xstormy16_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; mode = TYPE_MODE (valtype); PROMOTE_MODE (mode, 0, valtype); return gen_rtx_REG (mode, RETURN_VALUE_REGNUM); @@ -1486,7 +1486,7 @@ xstormy16_function_value (const_tree valtype, /* Worker function for TARGET_LIBCALL_VALUE. */ static rtx -xstormy16_libcall_value (enum machine_mode mode, +xstormy16_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, RETURN_VALUE_REGNUM); @@ -1929,7 +1929,7 @@ void xstormy16_expand_call (rtx retval, rtx dest, rtx counter) { rtx call, temp; - enum machine_mode mode; + machine_mode mode; gcc_assert (MEM_P (dest)); dest = XEXP (dest, 0); @@ -1970,7 +1970,7 @@ xstormy16_expand_call (rtx retval, rtx dest, rtx counter) (this saves duplicating code in xstormy16_split_cbranch). */ void -xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code, +xstormy16_expand_arith (machine_mode mode, enum rtx_code code, rtx dest, rtx src0, rtx src1) { int num_words = GET_MODE_BITSIZE (mode) / BITS_PER_WORD; @@ -2073,7 +2073,7 @@ xstormy16_expand_arith (enum machine_mode mode, enum rtx_code code, SIZE_R will be a CONST_INT, X will be a hard register. */ const char * -xstormy16_output_shift (enum machine_mode mode, enum rtx_code code, +xstormy16_output_shift (machine_mode mode, enum rtx_code code, rtx x, rtx size_r, rtx temp) { HOST_WIDE_INT size; @@ -2334,7 +2334,7 @@ xstormy16_init_builtins (void) static rtx xstormy16_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { rtx op[10], args[10], pat, copyto[10], retval = 0; @@ -2356,11 +2356,11 @@ xstormy16_expand_builtin (tree exp, rtx target, { char ao = s16builtins[i].arg_ops[o]; char c = insn_data[code].operand[o].constraint[0]; - enum machine_mode omode; + machine_mode omode; copyto[o] = 0; - omode = (enum machine_mode) insn_data[code].operand[o].mode; + omode = (machine_mode) insn_data[code].operand[o].mode; if (ao == 'r') op[o] = target ? target : gen_reg_rtx (omode); else if (ao == 't') @@ -2409,8 +2409,8 @@ combine_bnp (rtx_insn *insn) unsigned int mask; rtx cond, reg, qireg, mem; rtx_insn *and_insn, *load; - enum machine_mode load_mode = QImode; - enum machine_mode and_mode = QImode; + machine_mode load_mode = QImode; + machine_mode and_mode = QImode; rtx_insn *shift = NULL; insn_code = recog_memoized (insn); diff --git a/gcc/config/tilegx/tilegx-protos.h b/gcc/config/tilegx/tilegx-protos.h index a41cf4a..d45d9e3 100644 --- a/gcc/config/tilegx/tilegx-protos.h +++ b/gcc/config/tilegx/tilegx-protos.h @@ -25,22 +25,22 @@ extern void tilegx_init_expanders (void); extern void tilegx_compute_pcrel_address (rtx, rtx); extern void tilegx_compute_pcrel_plt_address (rtx, rtx); extern bool tilegx_legitimate_pic_operand_p (rtx); -extern rtx tilegx_simd_int (rtx, enum machine_mode); +extern rtx tilegx_simd_int (rtx, machine_mode); #ifdef RTX_CODE extern bool tilegx_bitfield_operand_p (HOST_WIDE_INT, int *, int *); extern void tilegx_expand_set_const64 (rtx, rtx); -extern bool tilegx_expand_mov (enum machine_mode, rtx *); +extern bool tilegx_expand_mov (machine_mode, rtx *); extern void tilegx_expand_unaligned_load (rtx, rtx, HOST_WIDE_INT, HOST_WIDE_INT, bool); -extern void tilegx_expand_movmisalign (enum machine_mode, rtx *); +extern void tilegx_expand_movmisalign (machine_mode, rtx *); extern void tilegx_allocate_stack (rtx, rtx); extern bool tilegx_expand_muldi (rtx, rtx, rtx); extern void tilegx_expand_smuldi3_highpart (rtx, rtx, rtx); extern void tilegx_expand_umuldi3_highpart (rtx, rtx, rtx); -extern bool tilegx_emit_setcc (rtx[], enum machine_mode); -extern void tilegx_emit_conditional_branch (rtx[], enum machine_mode); +extern bool tilegx_emit_setcc (rtx[], machine_mode); +extern void tilegx_emit_conditional_branch (rtx[], machine_mode); extern rtx tilegx_emit_conditional_move (rtx); extern const char *tilegx_output_cbranch_with_opcode (rtx_insn *, rtx *, const char *, @@ -48,8 +48,8 @@ extern const char *tilegx_output_cbranch_with_opcode (rtx_insn *, rtx *, extern const char *tilegx_output_cbranch (rtx_insn *, rtx *, bool); extern void tilegx_expand_tablejump (rtx, rtx); extern void tilegx_expand_builtin_vector_binop (rtx (*)(rtx, rtx, rtx), - enum machine_mode, rtx, - enum machine_mode, rtx, rtx, + machine_mode, rtx, + machine_mode, rtx, rtx, bool); extern void tilegx_pre_atomic_barrier (enum memmodel); extern void tilegx_post_atomic_barrier (enum memmodel); diff --git a/gcc/config/tilegx/tilegx.c b/gcc/config/tilegx/tilegx.c index ca9a91a..e807fff 100644 --- a/gcc/config/tilegx/tilegx.c +++ b/gcc/config/tilegx/tilegx.c @@ -81,7 +81,7 @@ static GTY(()) rtx g_got_symbol = NULL; /* In case of a POST_INC or POST_DEC memory reference, we must report the mode of the memory reference from TARGET_PRINT_OPERAND to TARGET_PRINT_OPERAND_ADDRESS. */ -static enum machine_mode output_memory_reference_mode; +static machine_mode output_memory_reference_mode; /* Report whether we're printing out the first address fragment of a POST_INC or POST_DEC memory reference, from TARGET_PRINT_OPERAND to @@ -129,7 +129,7 @@ tilegx_option_override (void) /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */ static bool -tilegx_scalar_mode_supported_p (enum machine_mode mode) +tilegx_scalar_mode_supported_p (machine_mode mode) { switch (mode) { @@ -152,7 +152,7 @@ tilegx_scalar_mode_supported_p (enum machine_mode mode) /* Implement TARGET_VECTOR_MODE_SUPPORTED_P. */ static bool -tilegx_vector_mode_supported_p (enum machine_mode mode) +tilegx_vector_mode_supported_p (machine_mode mode) { return mode == V8QImode || mode == V4HImode || mode == V2SImode; } @@ -160,7 +160,7 @@ tilegx_vector_mode_supported_p (enum machine_mode mode) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -tilegx_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, +tilegx_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED) { return true; @@ -180,7 +180,7 @@ tilegx_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) passed by reference. */ static bool tilegx_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type, bool named ATTRIBUTE_UNUSED) { return (type && TYPE_SIZE (type) @@ -210,7 +210,7 @@ tilegx_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) /* Implement TARGET_MODE_REP_EXTENDED. */ static int -tilegx_mode_rep_extended (enum machine_mode mode, enum machine_mode mode_rep) +tilegx_mode_rep_extended (machine_mode mode, machine_mode mode_rep) { /* SImode register values are sign-extended to DImode. */ if (mode == SImode && mode_rep == DImode) @@ -222,7 +222,7 @@ tilegx_mode_rep_extended (enum machine_mode mode, enum machine_mode mode_rep) /* Implement TARGET_FUNCTION_ARG_BOUNDARY. */ static unsigned int -tilegx_function_arg_boundary (enum machine_mode mode, const_tree type) +tilegx_function_arg_boundary (machine_mode mode, const_tree type) { unsigned int alignment; @@ -238,7 +238,7 @@ tilegx_function_arg_boundary (enum machine_mode mode, const_tree type) /* Implement TARGET_FUNCTION_ARG. */ static rtx tilegx_function_arg (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS cum = *get_cumulative_args (cum_v); @@ -269,7 +269,7 @@ tilegx_function_arg (cumulative_args_t cum_v, /* Implement TARGET_FUNCTION_ARG_ADVANCE. */ static void tilegx_function_arg_advance (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -301,7 +301,7 @@ static rtx tilegx_function_value (const_tree valtype, const_tree fn_decl_or_type, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; int unsigned_p; mode = TYPE_MODE (valtype); @@ -316,7 +316,7 @@ tilegx_function_value (const_tree valtype, const_tree fn_decl_or_type, /* Implement TARGET_LIBCALL_VALUE. */ static rtx -tilegx_libcall_value (enum machine_mode mode, +tilegx_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, 0); @@ -411,7 +411,7 @@ tilegx_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED) /* Implement TARGET_SETUP_INCOMING_VARARGS. */ static void tilegx_setup_incoming_varargs (cumulative_args_t cum, - enum machine_mode mode, + machine_mode mode, tree type, int *pretend_args, int no_rtl) { CUMULATIVE_ARGS local_cum = *get_cumulative_args (cum); @@ -738,7 +738,7 @@ tilegx_rtx_costs (rtx x, int code, int outer_code, int opno, int *total, /* Create a temporary variable to hold a partial result, to enable CSE. */ static rtx -create_temp_reg_if_possible (enum machine_mode mode, rtx default_reg) +create_temp_reg_if_possible (machine_mode mode, rtx default_reg) { return can_create_pseudo_p () ? gen_reg_rtx (mode) : default_reg; } @@ -798,7 +798,7 @@ tilegx_expand_to_rtl_hook (void) modulo 64. SImode shifts sometimes use the 64 bit version so do not hold such guarantee. */ static unsigned HOST_WIDE_INT -tilegx_shift_truncation_mask (enum machine_mode mode) +tilegx_shift_truncation_mask (machine_mode mode) { return mode == DImode ? 63 : 0; } @@ -858,7 +858,7 @@ tilegx_pic_address_needs_scratch (rtx x) pattern. TLS cannot be treated as a constant because it can include a function call. */ static bool -tilegx_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +tilegx_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { switch (GET_CODE (x)) { @@ -890,7 +890,7 @@ tilegx_legitimate_pic_operand_p (rtx x) /* Return true if the rtx X can be used as an address operand. */ static bool -tilegx_legitimate_address_p (enum machine_mode ARG_UNUSED (mode), rtx x, +tilegx_legitimate_address_p (machine_mode ARG_UNUSED (mode), rtx x, bool strict) { if (GET_CODE (x) == SUBREG) @@ -1223,7 +1223,7 @@ tilegx_compute_pcrel_plt_address (rtx result, rtx addr) nonzero, otherwise we allocate register(s) as necessary. */ static rtx tilegx_legitimize_pic_address (rtx orig, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, rtx reg) { if (GET_CODE (orig) == SYMBOL_REF) @@ -1379,7 +1379,7 @@ tilegx_legitimize_pic_address (rtx orig, /* Implement TARGET_LEGITIMIZE_ADDRESS. */ static rtx tilegx_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD && symbolic_operand (x, Pmode) && tilegx_tls_referenced_p (x)) @@ -1475,7 +1475,7 @@ load_pic_register (bool delay_pic_helper ATTRIBUTE_UNUSED) replicating it to fill an interger of mode DImode. NUM is first truncated to fit in MODE. */ rtx -tilegx_simd_int (rtx num, enum machine_mode mode) +tilegx_simd_int (rtx num, machine_mode mode) { HOST_WIDE_INT n = 0; @@ -1820,7 +1820,7 @@ tilegx_expand_set_const64 (rtx op0, rtx op1) /* Expand a move instruction. Return true if all work is done. */ bool -tilegx_expand_mov (enum machine_mode mode, rtx *operands) +tilegx_expand_mov (machine_mode mode, rtx *operands) { /* Handle sets of MEM first. */ if (MEM_P (operands[0])) @@ -1874,7 +1874,7 @@ void tilegx_expand_unaligned_load (rtx dest_reg, rtx mem, HOST_WIDE_INT bitsize, HOST_WIDE_INT bit_offset, bool sign) { - enum machine_mode mode; + machine_mode mode; rtx addr_lo, addr_hi; rtx mem_lo, mem_hi, hi; rtx mema, wide_result; @@ -2030,7 +2030,7 @@ tilegx_expand_unaligned_store (rtx mem, rtx src, HOST_WIDE_INT bitsize, memory that is not naturally aligned. Emit instructions to load it. */ void -tilegx_expand_movmisalign (enum machine_mode mode, rtx *operands) +tilegx_expand_movmisalign (machine_mode mode, rtx *operands) { if (MEM_P (operands[1])) { @@ -2344,7 +2344,7 @@ tilegx_expand_umuldi3_highpart (rtx op0, rtx op1, rtx op2) /* Produce the rtx yielding a bool for a floating point comparison. */ static bool -tilegx_emit_fp_setcc (rtx res, enum rtx_code code, enum machine_mode mode, +tilegx_emit_fp_setcc (rtx res, enum rtx_code code, machine_mode mode, rtx op0, rtx op1) { /* TODO: Certain compares again constants can be done using entirely @@ -2391,7 +2391,7 @@ tilegx_emit_fp_setcc (rtx res, enum rtx_code code, enum machine_mode mode, work. */ static bool tilegx_emit_setcc_internal (rtx res, enum rtx_code code, rtx op0, rtx op1, - enum machine_mode cmp_mode) + machine_mode cmp_mode) { rtx tmp; bool swap = false; @@ -2449,7 +2449,7 @@ tilegx_emit_setcc_internal (rtx res, enum rtx_code code, rtx op0, rtx op1, /* Implement cstore patterns. */ bool -tilegx_emit_setcc (rtx operands[], enum machine_mode cmp_mode) +tilegx_emit_setcc (rtx operands[], machine_mode cmp_mode) { return tilegx_emit_setcc_internal (operands[0], GET_CODE (operands[1]), @@ -2469,7 +2469,7 @@ signed_compare_p (enum rtx_code code) /* Generate the comparison for a DImode conditional branch. */ static rtx tilegx_emit_cc_test (enum rtx_code code, rtx op0, rtx op1, - enum machine_mode cmp_mode, bool eq_ne_only) + machine_mode cmp_mode, bool eq_ne_only) { enum rtx_code branch_code; rtx temp; @@ -2606,7 +2606,7 @@ tilegx_emit_cc_test (enum rtx_code code, rtx op0, rtx op1, /* Generate the comparison for a conditional branch. */ void -tilegx_emit_conditional_branch (rtx operands[], enum machine_mode cmp_mode) +tilegx_emit_conditional_branch (rtx operands[], machine_mode cmp_mode) { rtx cmp_rtx = tilegx_emit_cc_test (GET_CODE (operands[0]), operands[1], operands[2], @@ -2803,9 +2803,9 @@ tilegx_post_atomic_barrier (enum memmodel model) src0 and src1 (if DO_SRC1 is true) is converted to SRC_MODE. */ void tilegx_expand_builtin_vector_binop (rtx (*gen) (rtx, rtx, rtx), - enum machine_mode dest_mode, + machine_mode dest_mode, rtx dest, - enum machine_mode src_mode, + machine_mode src_mode, rtx src0, rtx src1, bool do_src1) { dest = gen_lowpart (dest_mode, dest); @@ -3544,7 +3544,7 @@ static rtx tilegx_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { #define MAX_BUILTIN_ARGS 4 @@ -3583,7 +3583,7 @@ tilegx_expand_builtin (tree exp, if (!(*insn_op->predicate) (op[opnum], insn_op->mode)) { - enum machine_mode opmode = insn_op->mode; + machine_mode opmode = insn_op->mode; /* pointer_operand and pmode_register_operand operands do not specify a mode, so use the operand's mode instead @@ -3591,7 +3591,7 @@ tilegx_expand_builtin (tree exp, except for constants, which are VOIDmode). */ if (opmode == VOIDmode) { - enum machine_mode m = GET_MODE (op[opnum]); + machine_mode m = GET_MODE (op[opnum]); gcc_assert (m == Pmode || m == VOIDmode); opmode = Pmode; } @@ -3613,7 +3613,7 @@ tilegx_expand_builtin (tree exp, if (nonvoid) { - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; if (!target || GET_MODE (target) != tmode || !(*insn_data[icode].operand[0].predicate) (target, tmode)) @@ -4399,7 +4399,7 @@ tilegx_frame_pointer_required (void) int tilegx_adjust_insn_length (rtx_insn *insn, int length) { - enum machine_mode mode = GET_MODE (insn); + machine_mode mode = GET_MODE (insn); /* A non-termininating instruction in a bundle has length 0. */ if (mode == SImode) @@ -5475,7 +5475,7 @@ tilegx_print_operand_address (FILE *file, rtx addr) /* Machine mode of current insn, for determining curly brace placement. */ -static enum machine_mode insn_mode; +static machine_mode insn_mode; /* Implement FINAL_PRESCAN_INSN. This is used to emit bundles. */ diff --git a/gcc/config/tilegx/tilegx.md b/gcc/config/tilegx/tilegx.md index 94946bb..a555a54 100644 --- a/gcc/config/tilegx/tilegx.md +++ b/gcc/config/tilegx/tilegx.md @@ -2434,7 +2434,7 @@ rtx s0; rtx bcomp; rtx loc_ref; - enum machine_mode mode = GET_MODE (operands[0]); + machine_mode mode = GET_MODE (operands[0]); /* only deal with loop counters in SImode or DImode */ if (mode != SImode && mode != DImode) diff --git a/gcc/config/tilepro/tilepro-protos.h b/gcc/config/tilepro/tilepro-protos.h index fe9b81b..69b14aa 100644 --- a/gcc/config/tilepro/tilepro-protos.h +++ b/gcc/config/tilepro/tilepro-protos.h @@ -24,25 +24,25 @@ extern void tilepro_init_expanders (void); extern bool tilepro_legitimate_pic_operand_p (rtx); -extern rtx tilepro_simd_int (rtx, enum machine_mode); +extern rtx tilepro_simd_int (rtx, machine_mode); #ifdef RTX_CODE extern void split_di (rtx[], int, rtx[], rtx[]); extern bool tilepro_bitfield_operand_p (HOST_WIDE_INT, int *, int *); extern void tilepro_expand_set_const32 (rtx, rtx); -extern bool tilepro_expand_mov (enum machine_mode, rtx *); +extern bool tilepro_expand_mov (machine_mode, rtx *); extern void tilepro_expand_insv (rtx operands[4]); extern void tilepro_expand_unaligned_load (rtx, rtx, HOST_WIDE_INT, HOST_WIDE_INT, bool); -extern void tilepro_expand_movmisalign (enum machine_mode, rtx *); +extern void tilepro_expand_movmisalign (machine_mode, rtx *); extern bool tilepro_expand_addsi (rtx, rtx, rtx); extern void tilepro_allocate_stack (rtx, rtx); extern bool tilepro_expand_mulsi (rtx, rtx, rtx); extern void tilepro_expand_smulsi3_highpart (rtx, rtx, rtx); extern void tilepro_expand_umulsi3_highpart (rtx, rtx, rtx); -extern bool tilepro_emit_setcc (rtx[], enum machine_mode); -extern void tilepro_emit_conditional_branch (rtx[], enum machine_mode); +extern bool tilepro_emit_setcc (rtx[], machine_mode); +extern void tilepro_emit_conditional_branch (rtx[], machine_mode); extern rtx tilepro_emit_conditional_move (rtx); extern const char *tilepro_output_cbranch_with_opcode (rtx_insn *, rtx *, const char *, @@ -51,8 +51,8 @@ extern const char *tilepro_output_cbranch_with_opcode (rtx_insn *, rtx *, extern const char *tilepro_output_cbranch (rtx_insn *, rtx *, bool); extern void tilepro_expand_tablejump (rtx, rtx); extern void tilepro_expand_builtin_vector_binop (rtx (*)(rtx, rtx, rtx), - enum machine_mode, rtx, - enum machine_mode, rtx, rtx, + machine_mode, rtx, + machine_mode, rtx, rtx, bool); #endif /* RTX_CODE */ diff --git a/gcc/config/tilepro/tilepro.c b/gcc/config/tilepro/tilepro.c index b9f4fa7..9fdfb42 100644 --- a/gcc/config/tilepro/tilepro.c +++ b/gcc/config/tilepro/tilepro.c @@ -82,7 +82,7 @@ static GTY(()) rtx g_got_symbol = NULL; /* In case of a POST_INC or POST_DEC memory reference, we must report the mode of the memory reference from TARGET_PRINT_OPERAND to TARGET_PRINT_OPERAND_ADDRESS. */ -static enum machine_mode output_memory_reference_mode; +static machine_mode output_memory_reference_mode; /* Report whether we're printing out the first address fragment of a POST_INC or POST_DEC memory reference, from TARGET_PRINT_OPERAND to @@ -107,7 +107,7 @@ tilepro_option_override (void) /* Implement TARGET_SCALAR_MODE_SUPPORTED_P. */ static bool -tilepro_scalar_mode_supported_p (enum machine_mode mode) +tilepro_scalar_mode_supported_p (machine_mode mode) { switch (mode) { @@ -129,7 +129,7 @@ tilepro_scalar_mode_supported_p (enum machine_mode mode) /* Implement TARGET_VECTOR_MODE_SUPPORTED_P. */ static bool -tile_vector_mode_supported_p (enum machine_mode mode) +tile_vector_mode_supported_p (machine_mode mode) { return mode == V4QImode || mode == V2HImode; } @@ -137,7 +137,7 @@ tile_vector_mode_supported_p (enum machine_mode mode) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -tilepro_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, +tilepro_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED) { return true; @@ -156,7 +156,7 @@ tilepro_function_ok_for_sibcall (tree decl, tree exp ATTRIBUTE_UNUSED) passed by reference. */ static bool tilepro_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type, bool named ATTRIBUTE_UNUSED) { return (type && TYPE_SIZE (type) @@ -175,7 +175,7 @@ tilepro_return_in_memory (const_tree type, const_tree fndecl ATTRIBUTE_UNUSED) /* Implement TARGET_FUNCTION_ARG_BOUNDARY. */ static unsigned int -tilepro_function_arg_boundary (enum machine_mode mode, const_tree type) +tilepro_function_arg_boundary (machine_mode mode, const_tree type) { unsigned int alignment; @@ -191,7 +191,7 @@ tilepro_function_arg_boundary (enum machine_mode mode, const_tree type) /* Implement TARGET_FUNCTION_ARG. */ static rtx tilepro_function_arg (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS cum = *get_cumulative_args (cum_v); @@ -222,7 +222,7 @@ tilepro_function_arg (cumulative_args_t cum_v, /* Implement TARGET_FUNCTION_ARG_ADVANCE. */ static void tilepro_function_arg_advance (cumulative_args_t cum_v, - enum machine_mode mode, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -254,7 +254,7 @@ static rtx tilepro_function_value (const_tree valtype, const_tree fn_decl_or_type, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; int unsigned_p; mode = TYPE_MODE (valtype); @@ -269,7 +269,7 @@ tilepro_function_value (const_tree valtype, const_tree fn_decl_or_type, /* Implement TARGET_LIBCALL_VALUE. */ static rtx -tilepro_libcall_value (enum machine_mode mode, +tilepro_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG (mode, 0); @@ -364,7 +364,7 @@ tilepro_va_start (tree valist, rtx nextarg ATTRIBUTE_UNUSED) /* Implement TARGET_SETUP_INCOMING_VARARGS. */ static void tilepro_setup_incoming_varargs (cumulative_args_t cum, - enum machine_mode mode, + machine_mode mode, tree type, int *pretend_args, int no_rtl) { CUMULATIVE_ARGS local_cum = *get_cumulative_args (cum); @@ -677,7 +677,7 @@ gen_int_si (HOST_WIDE_INT val) /* Create a temporary variable to hold a partial result, to enable CSE. */ static rtx -create_temp_reg_if_possible (enum machine_mode mode, rtx default_reg) +create_temp_reg_if_possible (machine_mode mode, rtx default_reg) { return can_create_pseudo_p ()? gen_reg_rtx (mode) : default_reg; } @@ -759,7 +759,7 @@ tilepro_pic_address_needs_scratch (rtx x) pattern. TLS cannot be treated as a constant because it can include a function call. */ static bool -tilepro_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +tilepro_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { switch (GET_CODE (x)) { @@ -791,7 +791,7 @@ tilepro_legitimate_pic_operand_p (rtx x) /* Return true if the rtx X can be used as an address operand. */ static bool -tilepro_legitimate_address_p (enum machine_mode ARG_UNUSED (mode), rtx x, +tilepro_legitimate_address_p (machine_mode ARG_UNUSED (mode), rtx x, bool strict) { if (GET_CODE (x) == SUBREG) @@ -996,7 +996,7 @@ tilepro_legitimize_tls_address (rtx addr) nonzero, otherwise we allocate register(s) as necessary. */ static rtx tilepro_legitimize_pic_address (rtx orig, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, rtx reg) { if (GET_CODE (orig) == SYMBOL_REF) @@ -1145,7 +1145,7 @@ tilepro_legitimize_pic_address (rtx orig, /* Implement TARGET_LEGITIMIZE_ADDRESS. */ static rtx tilepro_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD && symbolic_operand (x, Pmode) && tilepro_tls_referenced_p (x)) @@ -1219,7 +1219,7 @@ load_pic_register (bool delay_pic_helper ATTRIBUTE_UNUSED) replicating it to fill an interger of mode SImode. NUM is first truncated to fit in MODE. */ rtx -tilepro_simd_int (rtx num, enum machine_mode mode) +tilepro_simd_int (rtx num, machine_mode mode) { HOST_WIDE_INT n = 0; @@ -1459,7 +1459,7 @@ expand_set_cint32 (rtx dest_reg, rtx src_val) void tilepro_expand_set_const32 (rtx op0, rtx op1) { - enum machine_mode mode = GET_MODE (op0); + machine_mode mode = GET_MODE (op0); rtx temp; if (CONST_INT_P (op1)) @@ -1484,7 +1484,7 @@ tilepro_expand_set_const32 (rtx op0, rtx op1) /* Expand a move instruction. Return true if all work is done. */ bool -tilepro_expand_mov (enum machine_mode mode, rtx *operands) +tilepro_expand_mov (machine_mode mode, rtx *operands) { /* Handle sets of MEM first. */ if (MEM_P (operands[0])) @@ -1617,7 +1617,7 @@ void tilepro_expand_unaligned_load (rtx dest_reg, rtx mem, HOST_WIDE_INT bitsize, HOST_WIDE_INT bit_offset, bool sign) { - enum machine_mode mode; + machine_mode mode; rtx addr_lo, addr_hi; rtx mem_lo, mem_hi, hi; rtx mema, wide_result; @@ -1756,7 +1756,7 @@ tilepro_expand_unaligned_store (rtx mem, rtx src, HOST_WIDE_INT bitsize, memory that is not naturally aligned. Emit instructions to load it. */ void -tilepro_expand_movmisalign (enum machine_mode mode, rtx *operands) +tilepro_expand_movmisalign (machine_mode mode, rtx *operands) { if (MEM_P (operands[1])) { @@ -2212,7 +2212,7 @@ tilepro_emit_setcc_internal_di (rtx res, enum rtx_code code, rtx op0, rtx op1) work. */ static bool tilepro_emit_setcc_internal (rtx res, enum rtx_code code, rtx op0, rtx op1, - enum machine_mode cmp_mode) + machine_mode cmp_mode) { rtx tmp; bool swap = false; @@ -2272,7 +2272,7 @@ tilepro_emit_setcc_internal (rtx res, enum rtx_code code, rtx op0, rtx op1, /* Implement cstore patterns. */ bool -tilepro_emit_setcc (rtx operands[], enum machine_mode cmp_mode) +tilepro_emit_setcc (rtx operands[], machine_mode cmp_mode) { return tilepro_emit_setcc_internal (operands[0], GET_CODE (operands[1]), @@ -2292,7 +2292,7 @@ signed_compare_p (enum rtx_code code) /* Generate the comparison for an SImode conditional branch. */ static rtx tilepro_emit_cc_test (enum rtx_code code, rtx op0, rtx op1, - enum machine_mode cmp_mode, bool eq_ne_only) + machine_mode cmp_mode, bool eq_ne_only) { enum rtx_code branch_code; rtx temp; @@ -2410,7 +2410,7 @@ tilepro_emit_cc_test (enum rtx_code code, rtx op0, rtx op1, /* Generate the comparison for a conditional branch. */ void -tilepro_emit_conditional_branch (rtx operands[], enum machine_mode cmp_mode) +tilepro_emit_conditional_branch (rtx operands[], machine_mode cmp_mode) { rtx cmp_rtx = tilepro_emit_cc_test (GET_CODE (operands[0]), operands[1], operands[2], @@ -2597,9 +2597,9 @@ tilepro_expand_tablejump (rtx op0, rtx op1) src0 and src1 (if DO_SRC1 is true) is converted to SRC_MODE. */ void tilepro_expand_builtin_vector_binop (rtx (*gen) (rtx, rtx, rtx), - enum machine_mode dest_mode, + machine_mode dest_mode, rtx dest, - enum machine_mode src_mode, + machine_mode src_mode, rtx src0, rtx src1, bool do_src1) { dest = gen_lowpart (dest_mode, dest); @@ -3112,7 +3112,7 @@ static rtx tilepro_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { #define MAX_BUILTIN_ARGS 4 @@ -3166,7 +3166,7 @@ tilepro_expand_builtin (tree exp, if (nonvoid) { - enum machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; if (!target || GET_MODE (target) != tmode || !(*insn_data[icode].operand[0].predicate) (target, tmode)) @@ -3926,7 +3926,7 @@ tilepro_frame_pointer_required (void) int tilepro_adjust_insn_length (rtx_insn *insn, int length) { - enum machine_mode mode = GET_MODE (insn); + machine_mode mode = GET_MODE (insn); /* A non-termininating instruction in a bundle has length 0. */ if (mode == SImode) @@ -4883,7 +4883,7 @@ tilepro_print_operand_address (FILE *file, rtx addr) /* Machine mode of current insn, for determining curly brace placement. */ -static enum machine_mode insn_mode; +static machine_mode insn_mode; /* Implement FINAL_PRESCAN_INSN. This is used to emit bundles. */ diff --git a/gcc/config/v850/v850-protos.h b/gcc/config/v850/v850-protos.h index 3f8b865..cffc62b 100644 --- a/gcc/config/v850/v850-protos.h +++ b/gcc/config/v850/v850-protos.h @@ -38,14 +38,14 @@ extern char * construct_restore_jr (rtx); #ifdef HAVE_MACHINE_MODES extern char * construct_dispose_instruction (rtx); extern char * construct_prepare_instruction (rtx); -extern int ep_memory_operand (rtx, enum machine_mode, int); +extern int ep_memory_operand (rtx, machine_mode, int); extern int v850_adjust_insn_length (rtx_insn *, int); extern const char * v850_gen_movdi (rtx *); -extern rtx v850_gen_compare (enum rtx_code, enum machine_mode, +extern rtx v850_gen_compare (enum rtx_code, machine_mode, rtx, rtx); -extern enum machine_mode v850_gen_float_compare (enum rtx_code, - enum machine_mode, rtx, rtx); -extern enum machine_mode v850_select_cc_mode (RTX_CODE, rtx, rtx); +extern machine_mode v850_gen_float_compare (enum rtx_code, + machine_mode, rtx, rtx); +extern machine_mode v850_select_cc_mode (RTX_CODE, rtx, rtx); #endif #endif /* RTX_CODE */ diff --git a/gcc/config/v850/v850.c b/gcc/config/v850/v850.c index 45d511c..bdeb56b 100644 --- a/gcc/config/v850/v850.c +++ b/gcc/config/v850/v850.c @@ -124,7 +124,7 @@ v850_all_frame_related (rtx par) static bool v850_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode, const_tree type, + machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { unsigned HOST_WIDE_INT size; @@ -145,7 +145,7 @@ v850_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, is NULL_RTX, the argument will be pushed. */ static rtx -v850_function_arg (cumulative_args_t cum_v, enum machine_mode mode, +v850_function_arg (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -209,7 +209,7 @@ v850_function_arg (cumulative_args_t cum_v, enum machine_mode mode, /* Return the number of bytes which must be put into registers for values which are part in registers and part in memory. */ static int -v850_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, +v850_arg_partial_bytes (cumulative_args_t cum_v, machine_mode mode, tree type, bool named) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -253,7 +253,7 @@ v850_arg_partial_bytes (cumulative_args_t cum_v, enum machine_mode mode, (TYPE is null for libcalls where that information may not be available.) */ static void -v850_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +v850_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -919,7 +919,7 @@ output_move_single (rtx * operands) return ""; } -enum machine_mode +machine_mode v850_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1 ATTRIBUTE_UNUSED) { if (GET_MODE_CLASS (GET_MODE (op0)) == MODE_FLOAT) @@ -945,8 +945,8 @@ v850_select_cc_mode (enum rtx_code cond, rtx op0, rtx op1 ATTRIBUTE_UNUSED) return CCmode; } -enum machine_mode -v850_gen_float_compare (enum rtx_code cond, enum machine_mode mode ATTRIBUTE_UNUSED, rtx op0, rtx op1) +machine_mode +v850_gen_float_compare (enum rtx_code cond, machine_mode mode ATTRIBUTE_UNUSED, rtx op0, rtx op1) { if (GET_MODE (op0) == DFmode) { @@ -1009,7 +1009,7 @@ v850_gen_float_compare (enum rtx_code cond, enum machine_mode mode ATTRIBUTE_UNU } rtx -v850_gen_compare (enum rtx_code cond, enum machine_mode mode, rtx op0, rtx op1) +v850_gen_compare (enum rtx_code cond, machine_mode mode, rtx op0, rtx op1) { if (GET_MODE_CLASS(GET_MODE (op0)) != MODE_FLOAT) { @@ -1031,7 +1031,7 @@ v850_gen_compare (enum rtx_code cond, enum machine_mode mode, rtx op0, rtx op1) MODE and signedness UNSIGNEDP. */ static int -ep_memory_offset (enum machine_mode mode, int unsignedp ATTRIBUTE_UNUSED) +ep_memory_offset (machine_mode mode, int unsignedp ATTRIBUTE_UNUSED) { int max_offset = 0; @@ -1072,7 +1072,7 @@ ep_memory_offset (enum machine_mode mode, int unsignedp ATTRIBUTE_UNUSED) /* Return true if OP is a valid short EP memory reference */ int -ep_memory_operand (rtx op, enum machine_mode mode, int unsigned_load) +ep_memory_operand (rtx op, machine_mode mode, int unsigned_load) { rtx addr, op0, op1; int max_offset; @@ -1393,7 +1393,7 @@ v850_reorg (void) for the register */ if (GET_CODE (dest) == REG) { - enum machine_mode mode = GET_MODE (dest); + machine_mode mode = GET_MODE (dest); int regno; int endregno; @@ -3079,7 +3079,7 @@ v850_issue_rate (void) /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ static bool -v850_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +v850_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return (GET_CODE (x) == CONST_DOUBLE || !(GET_CODE (x) == CONST @@ -3090,7 +3090,7 @@ v850_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) } static int -v850_memory_move_cost (enum machine_mode mode, +v850_memory_move_cost (machine_mode mode, reg_class_t reg_class ATTRIBUTE_UNUSED, bool in) { diff --git a/gcc/config/v850/v850.md b/gcc/config/v850/v850.md index 341aae4..b1383fa6 100644 --- a/gcc/config/v850/v850.md +++ b/gcc/config/v850/v850.md @@ -454,7 +454,7 @@ "TARGET_USE_FPU" { enum rtx_code cond = GET_CODE (operands[0]); - enum machine_mode mode; + machine_mode mode; rtx fcc_reg; rtx cc_reg; rtx tmp; @@ -508,7 +508,7 @@ "TARGET_USE_FPU" { enum rtx_code cond = GET_CODE (operands[0]); - enum machine_mode mode; + machine_mode mode; rtx fcc_reg; rtx cc_reg; rtx tmp; diff --git a/gcc/config/vax/vax-protos.h b/gcc/config/vax/vax-protos.h index 4e978b9..cec2aee 100644 --- a/gcc/config/vax/vax-protos.h +++ b/gcc/config/vax/vax-protos.h @@ -22,18 +22,18 @@ extern void vax_expand_prologue (void); #ifdef RTX_CODE extern const char *cond_name (rtx); -extern bool adjacent_operands_p (rtx, rtx, enum machine_mode); +extern bool adjacent_operands_p (rtx, rtx, machine_mode); extern const char *rev_cond_name (rtx); extern void print_operand_address (FILE *, rtx); extern void print_operand (FILE *, rtx, int); extern void vax_notice_update_cc (rtx, rtx); extern void vax_expand_addsub_di_operands (rtx *, enum rtx_code); -extern const char * vax_output_int_move (rtx, rtx *, enum machine_mode); -extern const char * vax_output_int_add (rtx, rtx *, enum machine_mode); -extern const char * vax_output_int_subtract (rtx, rtx *, enum machine_mode); +extern const char * vax_output_int_move (rtx, rtx *, machine_mode); +extern const char * vax_output_int_add (rtx, rtx *, machine_mode); +extern const char * vax_output_int_subtract (rtx, rtx *, machine_mode); extern const char * vax_output_movmemsi (rtx, rtx *); #endif /* RTX_CODE */ #ifdef REAL_VALUE_TYPE -extern int check_float_value (enum machine_mode, REAL_VALUE_TYPE *, int); +extern int check_float_value (machine_mode, REAL_VALUE_TYPE *, int); #endif /* REAL_VALUE_TYPE */ diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c index 628c6e7..bf12f89 100644 --- a/gcc/config/vax/vax.c +++ b/gcc/config/vax/vax.c @@ -63,17 +63,17 @@ along with GCC; see the file COPYING3. If not see #include "builtins.h" static void vax_option_override (void); -static bool vax_legitimate_address_p (enum machine_mode, rtx, bool); +static bool vax_legitimate_address_p (machine_mode, rtx, bool); static void vax_file_start (void); static void vax_init_libfuncs (void); static void vax_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static int vax_address_cost_1 (rtx); -static int vax_address_cost (rtx, enum machine_mode, addr_space_t, bool); +static int vax_address_cost (rtx, machine_mode, addr_space_t, bool); static bool vax_rtx_costs (rtx, int, int, int, int *, bool); -static rtx vax_function_arg (cumulative_args_t, enum machine_mode, +static rtx vax_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static void vax_function_arg_advance (cumulative_args_t, enum machine_mode, +static void vax_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); static rtx vax_struct_value_rtx (tree, int); static rtx vax_builtin_setjmp_frame_value (void); @@ -641,7 +641,7 @@ rev_cond_name (rtx op) static bool vax_float_literal (rtx c) { - enum machine_mode mode; + machine_mode mode; REAL_VALUE_TYPE r, s; int i; @@ -754,7 +754,7 @@ vax_address_cost_1 (rtx addr) } static int -vax_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, +vax_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { @@ -773,7 +773,7 @@ static bool vax_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, int *total, bool speed ATTRIBUTE_UNUSED) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int i = 0; /* may be modified in switch */ const char *fmt = GET_RTX_FORMAT (code); /* may be modified in switch */ @@ -1149,7 +1149,7 @@ vax_notice_update_cc (rtx exp, rtx insn ATTRIBUTE_UNUSED) const char * vax_output_int_move (rtx insn ATTRIBUTE_UNUSED, rtx *operands, - enum machine_mode mode) + machine_mode mode) { rtx hi[3], lo[3]; const char *pattern_hi, *pattern_lo; @@ -1360,7 +1360,7 @@ vax_output_int_move (rtx insn ATTRIBUTE_UNUSED, rtx *operands, which are not modified very often. */ const char * -vax_output_int_add (rtx insn, rtx *operands, enum machine_mode mode) +vax_output_int_add (rtx insn, rtx *operands, machine_mode mode) { switch (mode) { @@ -1570,7 +1570,7 @@ vax_output_int_add (rtx insn, rtx *operands, enum machine_mode mode) } const char * -vax_output_int_subtract (rtx insn, rtx *operands, enum machine_mode mode) +vax_output_int_subtract (rtx insn, rtx *operands, machine_mode mode) { switch (mode) { @@ -1750,7 +1750,7 @@ nonindexed_address_p (rtx x, bool strict) than or equal 8 bytes, or just a reg if MODE is one byte. */ static bool -index_term_p (rtx prod, enum machine_mode mode, bool strict) +index_term_p (rtx prod, machine_mode mode, bool strict) { rtx xfoo0, xfoo1; @@ -1779,7 +1779,7 @@ index_term_p (rtx prod, enum machine_mode mode, bool strict) /* Return true if X is the sum of a register and a valid index term for mode MODE. */ static bool -reg_plus_index_p (rtx x, enum machine_mode mode, bool strict) +reg_plus_index_p (rtx x, machine_mode mode, bool strict) { rtx xfoo0, xfoo1; @@ -1800,7 +1800,7 @@ reg_plus_index_p (rtx x, enum machine_mode mode, bool strict) /* Return true if xfoo0 and xfoo1 constitute a valid indexed address. */ static bool -indexable_address_p (rtx xfoo0, rtx xfoo1, enum machine_mode mode, bool strict) +indexable_address_p (rtx xfoo0, rtx xfoo1, machine_mode mode, bool strict) { if (!CONSTANT_ADDRESS_P (xfoo0)) return false; @@ -1816,7 +1816,7 @@ indexable_address_p (rtx xfoo0, rtx xfoo1, enum machine_mode mode, bool strict) The MODE argument is the machine mode for the MEM expression that wants to use this address. */ bool -vax_legitimate_address_p (enum machine_mode mode, rtx x, bool strict) +vax_legitimate_address_p (machine_mode mode, rtx x, bool strict) { rtx xfoo0, xfoo1; @@ -1879,7 +1879,7 @@ vax_mode_dependent_address_p (const_rtx x, addr_space_t as ATTRIBUTE_UNUSED) } static rtx -fixup_mathdi_operand (rtx x, enum machine_mode mode) +fixup_mathdi_operand (rtx x, machine_mode mode) { if (illegal_addsub_di_memory_operand (x, mode)) { @@ -2024,7 +2024,7 @@ vax_expand_addsub_di_operands (rtx * operands, enum rtx_code code) } bool -adjacent_operands_p (rtx lo, rtx hi, enum machine_mode mode) +adjacent_operands_p (rtx lo, rtx hi, machine_mode mode) { HOST_WIDE_INT lo_offset; HOST_WIDE_INT hi_offset; @@ -2170,7 +2170,7 @@ vax_return_pops_args (tree fundecl ATTRIBUTE_UNUSED, static rtx vax_function_arg (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED, bool named ATTRIBUTE_UNUSED) { @@ -2182,7 +2182,7 @@ vax_function_arg (cumulative_args_t cum ATTRIBUTE_UNUSED, may not be available.) */ static void -vax_function_arg_advance (cumulative_args_t cum_v, enum machine_mode mode, +vax_function_arg_advance (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); diff --git a/gcc/config/vms/vms-c.c b/gcc/config/vms/vms-c.c index 6c71104..fb91368 100644 --- a/gcc/config/vms/vms-c.c +++ b/gcc/config/vms/vms-c.c @@ -287,7 +287,7 @@ vms_pragma_extern_prefix (cpp_reader * ARG_UNUSED (dummy)) /* #pragma __pointer_size */ -static enum machine_mode saved_pointer_mode; +static machine_mode saved_pointer_mode; static void handle_pragma_pointer_size (const char *pragma_name) diff --git a/gcc/config/xtensa/xtensa-protos.h b/gcc/config/xtensa/xtensa-protos.h index e684af8..bc9ae83 100644 --- a/gcc/config/xtensa/xtensa-protos.h +++ b/gcc/config/xtensa/xtensa-protos.h @@ -28,21 +28,21 @@ extern bool xtensa_simm12b (HOST_WIDE_INT); extern bool xtensa_b4const_or_zero (HOST_WIDE_INT); extern bool xtensa_b4constu (HOST_WIDE_INT); extern bool xtensa_mask_immediate (HOST_WIDE_INT); -extern bool xtensa_mem_offset (unsigned, enum machine_mode); +extern bool xtensa_mem_offset (unsigned, machine_mode); /* Functions within xtensa.c that we reference. */ #ifdef RTX_CODE extern int xt_true_regnum (rtx); -extern int xtensa_valid_move (enum machine_mode, rtx *); +extern int xtensa_valid_move (machine_mode, rtx *); extern int smalloffset_mem_p (rtx); extern int constantpool_mem_p (rtx); extern void xtensa_extend_reg (rtx, rtx); -extern void xtensa_expand_conditional_branch (rtx *, enum machine_mode); +extern void xtensa_expand_conditional_branch (rtx *, machine_mode); extern int xtensa_expand_conditional_move (rtx *, int); -extern int xtensa_expand_scc (rtx *, enum machine_mode); +extern int xtensa_expand_scc (rtx *, machine_mode); extern int xtensa_expand_block_move (rtx *); -extern void xtensa_split_operand_pair (rtx *, enum machine_mode); -extern int xtensa_emit_move_sequence (rtx *, enum machine_mode); +extern void xtensa_split_operand_pair (rtx *, machine_mode); +extern int xtensa_emit_move_sequence (rtx *, machine_mode); extern rtx xtensa_copy_incoming_a7 (rtx); extern void xtensa_expand_nonlocal_goto (rtx *); extern void xtensa_expand_compare_and_swap (rtx, rtx, rtx, rtx); @@ -60,7 +60,7 @@ extern void init_cumulative_args (CUMULATIVE_ARGS *, int); extern void print_operand (FILE *, rtx, int); extern void print_operand_address (FILE *, rtx); -extern void xtensa_output_literal (FILE *, rtx, enum machine_mode, int); +extern void xtensa_output_literal (FILE *, rtx, machine_mode, int); extern rtx xtensa_return_addr (int, rtx); #endif /* RTX_CODE */ diff --git a/gcc/config/xtensa/xtensa.c b/gcc/config/xtensa/xtensa.c index de44f10..cce0d58 100644 --- a/gcc/config/xtensa/xtensa.c +++ b/gcc/config/xtensa/xtensa.c @@ -147,62 +147,62 @@ static void xtensa_option_override (void); static enum internal_test map_test_to_internal_test (enum rtx_code); static rtx gen_int_relational (enum rtx_code, rtx, rtx, int *); static rtx gen_float_relational (enum rtx_code, rtx, rtx); -static rtx gen_conditional_move (enum rtx_code, enum machine_mode, rtx, rtx); +static rtx gen_conditional_move (enum rtx_code, machine_mode, rtx, rtx); static rtx fixup_subreg_mem (rtx); static struct machine_function * xtensa_init_machine_status (void); static rtx xtensa_legitimize_tls_address (rtx); -static rtx xtensa_legitimize_address (rtx, rtx, enum machine_mode); +static rtx xtensa_legitimize_address (rtx, rtx, machine_mode); static bool xtensa_mode_dependent_address_p (const_rtx, addr_space_t); static bool xtensa_return_in_msb (const_tree); static void printx (FILE *, signed int); static void xtensa_function_epilogue (FILE *, HOST_WIDE_INT); static rtx xtensa_builtin_saveregs (void); -static bool xtensa_legitimate_address_p (enum machine_mode, rtx, bool); +static bool xtensa_legitimate_address_p (machine_mode, rtx, bool); static unsigned int xtensa_multibss_section_type_flags (tree, const char *, int) ATTRIBUTE_UNUSED; -static section *xtensa_select_rtx_section (enum machine_mode, rtx, +static section *xtensa_select_rtx_section (machine_mode, rtx, unsigned HOST_WIDE_INT); static bool xtensa_rtx_costs (rtx, int, int, int, int *, bool); -static int xtensa_register_move_cost (enum machine_mode, reg_class_t, +static int xtensa_register_move_cost (machine_mode, reg_class_t, reg_class_t); -static int xtensa_memory_move_cost (enum machine_mode, reg_class_t, bool); +static int xtensa_memory_move_cost (machine_mode, reg_class_t, bool); static tree xtensa_build_builtin_va_list (void); static bool xtensa_return_in_memory (const_tree, const_tree); static tree xtensa_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *); -static void xtensa_function_arg_advance (cumulative_args_t, enum machine_mode, +static void xtensa_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static rtx xtensa_function_arg (cumulative_args_t, enum machine_mode, +static rtx xtensa_function_arg (cumulative_args_t, machine_mode, const_tree, bool); static rtx xtensa_function_incoming_arg (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static rtx xtensa_function_value (const_tree, const_tree, bool); -static rtx xtensa_libcall_value (enum machine_mode, const_rtx); +static rtx xtensa_libcall_value (machine_mode, const_rtx); static bool xtensa_function_value_regno_p (const unsigned int); -static unsigned int xtensa_function_arg_boundary (enum machine_mode, +static unsigned int xtensa_function_arg_boundary (machine_mode, const_tree); static void xtensa_init_builtins (void); static tree xtensa_fold_builtin (tree, int, tree *, bool); -static rtx xtensa_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx xtensa_expand_builtin (tree, rtx, rtx, machine_mode, int); static void xtensa_va_start (tree, rtx); static bool xtensa_frame_pointer_required (void); static rtx xtensa_static_chain (const_tree, bool); static void xtensa_asm_trampoline_template (FILE *); static void xtensa_trampoline_init (rtx, tree, rtx); static bool xtensa_output_addr_const_extra (FILE *, rtx); -static bool xtensa_cannot_force_const_mem (enum machine_mode, rtx); +static bool xtensa_cannot_force_const_mem (machine_mode, rtx); static reg_class_t xtensa_preferred_reload_class (rtx, reg_class_t); static reg_class_t xtensa_preferred_output_reload_class (rtx, reg_class_t); static reg_class_t xtensa_secondary_reload (bool, rtx, reg_class_t, - enum machine_mode, + machine_mode, struct secondary_reload_info *); static bool constantpool_address_p (const_rtx addr); -static bool xtensa_legitimate_constant_p (enum machine_mode, rtx); +static bool xtensa_legitimate_constant_p (machine_mode, rtx); static bool xtensa_member_type_forces_blk (const_tree, - enum machine_mode mode); + machine_mode mode); static const int reg_nonleaf_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER; @@ -482,7 +482,7 @@ xt_true_regnum (rtx x) int -xtensa_valid_move (enum machine_mode mode, rtx *operands) +xtensa_valid_move (machine_mode mode, rtx *operands) { /* Either the destination or source must be a register, and the MAC16 accumulator doesn't count. */ @@ -604,7 +604,7 @@ xtensa_extend_reg (rtx dst, rtx src) bool -xtensa_mem_offset (unsigned v, enum machine_mode mode) +xtensa_mem_offset (unsigned v, machine_mode mode) { switch (mode) { @@ -697,7 +697,7 @@ gen_int_relational (enum rtx_code test_code, /* relational test (EQ, etc) */ }; enum internal_test test; - enum machine_mode mode; + machine_mode mode; struct cmp_info *p_info; test = map_test_to_internal_test (test_code); @@ -808,7 +808,7 @@ gen_float_relational (enum rtx_code test_code, /* relational test (EQ, etc) */ void -xtensa_expand_conditional_branch (rtx *operands, enum machine_mode mode) +xtensa_expand_conditional_branch (rtx *operands, machine_mode mode) { enum rtx_code test_code = GET_CODE (operands[0]); rtx cmp0 = operands[1]; @@ -856,7 +856,7 @@ xtensa_expand_conditional_branch (rtx *operands, enum machine_mode mode) static rtx -gen_conditional_move (enum rtx_code code, enum machine_mode mode, +gen_conditional_move (enum rtx_code code, machine_mode mode, rtx op0, rtx op1) { if (mode == SImode) @@ -932,7 +932,7 @@ xtensa_expand_conditional_move (rtx *operands, int isflt) { rtx dest = operands[0]; rtx cmp = operands[1]; - enum machine_mode cmp_mode = GET_MODE (XEXP (cmp, 0)); + machine_mode cmp_mode = GET_MODE (XEXP (cmp, 0)); rtx (*gen_fn) (rtx, rtx, rtx, rtx, rtx); if (!(cmp = gen_conditional_move (GET_CODE (cmp), cmp_mode, @@ -954,7 +954,7 @@ xtensa_expand_conditional_move (rtx *operands, int isflt) int -xtensa_expand_scc (rtx operands[4], enum machine_mode cmp_mode) +xtensa_expand_scc (rtx operands[4], machine_mode cmp_mode) { rtx dest = operands[0]; rtx cmp; @@ -982,7 +982,7 @@ xtensa_expand_scc (rtx operands[4], enum machine_mode cmp_mode) for the output, i.e., the input operands are twice as big as MODE. */ void -xtensa_split_operand_pair (rtx operands[4], enum machine_mode mode) +xtensa_split_operand_pair (rtx operands[4], machine_mode mode) { switch (GET_CODE (operands[1])) { @@ -1029,7 +1029,7 @@ xtensa_split_operand_pair (rtx operands[4], enum machine_mode mode) normally. */ int -xtensa_emit_move_sequence (rtx *operands, enum machine_mode mode) +xtensa_emit_move_sequence (rtx *operands, machine_mode mode) { rtx src = operands[1]; @@ -1142,7 +1142,7 @@ xtensa_copy_incoming_a7 (rtx opnd) { rtx entry_insns = 0; rtx reg, tmp; - enum machine_mode mode; + machine_mode mode; if (!cfun->machine->need_a7_copy) return opnd; @@ -1250,7 +1250,7 @@ xtensa_copy_incoming_a7 (rtx opnd) int xtensa_expand_block_move (rtx *operands) { - static const enum machine_mode mode_from_align[] = + static const machine_mode mode_from_align[] = { VOIDmode, QImode, HImode, VOIDmode, SImode, }; @@ -1260,7 +1260,7 @@ xtensa_expand_block_move (rtx *operands) HOST_WIDE_INT bytes, align; int num_pieces, move_ratio; rtx temp[2]; - enum machine_mode mode[2]; + machine_mode mode[2]; int amount[2]; bool active[2]; int phase = 0; @@ -1376,7 +1376,7 @@ xtensa_init_machine_status (void) /* Shift VAL of mode MODE left by COUNT bits. */ static inline rtx -xtensa_expand_mask_and_shift (rtx val, enum machine_mode mode, rtx count) +xtensa_expand_mask_and_shift (rtx val, machine_mode mode, rtx count) { val = expand_simple_binop (SImode, AND, val, GEN_INT (GET_MODE_MASK (mode)), NULL_RTX, 1, OPTAB_DIRECT); @@ -1402,7 +1402,7 @@ struct alignment_context static void init_alignment_context (struct alignment_context *ac, rtx mem) { - enum machine_mode mode = GET_MODE (mem); + machine_mode mode = GET_MODE (mem); rtx byteoffset = NULL_RTX; bool aligned = (MEM_ALIGN (mem) >= GET_MODE_BITSIZE (SImode)); @@ -1472,7 +1472,7 @@ init_alignment_context (struct alignment_context *ac, rtx mem) void xtensa_expand_compare_and_swap (rtx target, rtx mem, rtx cmp, rtx new_rtx) { - enum machine_mode mode = GET_MODE (mem); + machine_mode mode = GET_MODE (mem); struct alignment_context ac; rtx tmp, cmpv, newv, val; rtx oldval = gen_reg_rtx (SImode); @@ -1536,7 +1536,7 @@ void xtensa_expand_atomic (enum rtx_code code, rtx target, rtx mem, rtx val, bool after) { - enum machine_mode mode = GET_MODE (mem); + machine_mode mode = GET_MODE (mem); struct alignment_context ac; rtx_code_label *csloop = gen_label_rtx (); rtx cmp, tmp; @@ -1807,7 +1807,7 @@ xtensa_emit_call (int callop, rtx *operands) bool -xtensa_legitimate_address_p (enum machine_mode mode, rtx addr, bool strict) +xtensa_legitimate_address_p (machine_mode mode, rtx addr, bool strict) { /* Allow constant pool addresses. */ if (mode != BLKmode && GET_MODE_SIZE (mode) >= UNITS_PER_WORD @@ -1943,7 +1943,7 @@ xtensa_legitimize_tls_address (rtx x) rtx xtensa_legitimize_address (rtx x, rtx oldx ATTRIBUTE_UNUSED, - enum machine_mode mode) + machine_mode mode) { if (xtensa_tls_symbol_p (x)) return xtensa_legitimize_tls_address (x); @@ -2032,7 +2032,7 @@ xtensa_tls_referenced_p (rtx x) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -xtensa_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +xtensa_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return xtensa_tls_referenced_p (x); } @@ -2090,7 +2090,7 @@ init_cumulative_args (CUMULATIVE_ARGS *cum, int incoming) /* Advance the argument to the next argument position. */ static void -xtensa_function_arg_advance (cumulative_args_t cum, enum machine_mode mode, +xtensa_function_arg_advance (cumulative_args_t cum, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { int words, max; @@ -2117,7 +2117,7 @@ xtensa_function_arg_advance (cumulative_args_t cum, enum machine_mode mode, if this is an incoming argument to the current function. */ static rtx -xtensa_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, +xtensa_function_arg_1 (cumulative_args_t cum_v, machine_mode mode, const_tree type, bool incoming_p) { CUMULATIVE_ARGS *cum = get_cumulative_args (cum_v); @@ -2153,7 +2153,7 @@ xtensa_function_arg_1 (cumulative_args_t cum_v, enum machine_mode mode, /* Implement TARGET_FUNCTION_ARG. */ static rtx -xtensa_function_arg (cumulative_args_t cum, enum machine_mode mode, +xtensa_function_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { return xtensa_function_arg_1 (cum, mode, type, false); @@ -2162,14 +2162,14 @@ xtensa_function_arg (cumulative_args_t cum, enum machine_mode mode, /* Implement TARGET_FUNCTION_INCOMING_ARG. */ static rtx -xtensa_function_incoming_arg (cumulative_args_t cum, enum machine_mode mode, +xtensa_function_incoming_arg (cumulative_args_t cum, machine_mode mode, const_tree type, bool named ATTRIBUTE_UNUSED) { return xtensa_function_arg_1 (cum, mode, type, true); } static unsigned int -xtensa_function_arg_boundary (enum machine_mode mode, const_tree type) +xtensa_function_arg_boundary (machine_mode mode, const_tree type) { unsigned int alignment; @@ -2195,7 +2195,7 @@ static void xtensa_option_override (void) { int regno; - enum machine_mode mode; + machine_mode mode; if (!TARGET_BOOLEANS && TARGET_HARD_FLOAT) error ("boolean registers required for the floating-point option"); @@ -2203,7 +2203,7 @@ xtensa_option_override (void) /* Set up array giving whether a given register can hold a given mode. */ for (mode = VOIDmode; mode != MAX_MACHINE_MODE; - mode = (enum machine_mode) ((int) mode + 1)) + mode = (machine_mode) ((int) mode + 1)) { int size = GET_MODE_SIZE (mode); enum mode_class mclass = GET_MODE_CLASS (mode); @@ -2543,7 +2543,7 @@ xtensa_output_addr_const_extra (FILE *fp, rtx x) void -xtensa_output_literal (FILE *file, rtx x, enum machine_mode mode, int labelno) +xtensa_output_literal (FILE *file, rtx x, machine_mode mode, int labelno) { long value_long[2]; REAL_VALUE_TYPE r; @@ -2776,7 +2776,7 @@ xtensa_return_addr (int count, rtx frame) uses of the register, only one of which would be replaced. */ static bool -xtensa_member_type_forces_blk (const_tree, enum machine_mode mode) +xtensa_member_type_forces_blk (const_tree, machine_mode mode) { return mode == CQImode || mode == CHImode; } @@ -3151,7 +3151,7 @@ xtensa_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *args, static rtx xtensa_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore) { tree fndecl = TREE_OPERAND (CALL_EXPR_FN (exp), 0); @@ -3213,7 +3213,7 @@ xtensa_preferred_output_reload_class (rtx x ATTRIBUTE_UNUSED, static reg_class_t xtensa_secondary_reload (bool in_p, rtx x, reg_class_t rclass, - enum machine_mode mode, secondary_reload_info *sri) + machine_mode mode, secondary_reload_info *sri) { int regno; @@ -3307,7 +3307,7 @@ xtensa_multibss_section_type_flags (tree decl, const char *name, int reloc) /* The literal pool stays with the function. */ static section * -xtensa_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED, +xtensa_select_rtx_section (machine_mode mode ATTRIBUTE_UNUSED, rtx x ATTRIBUTE_UNUSED, unsigned HOST_WIDE_INT align ATTRIBUTE_UNUSED) { @@ -3317,7 +3317,7 @@ xtensa_select_rtx_section (enum machine_mode mode ATTRIBUTE_UNUSED, /* Worker function for TARGET_REGISTER_MOVE_COST. */ static int -xtensa_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +xtensa_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { if (from == to && from != BR_REGS && to != BR_REGS) @@ -3336,7 +3336,7 @@ xtensa_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, /* Worker function for TARGET_MEMORY_MOVE_COST. */ static int -xtensa_memory_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +xtensa_memory_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t rclass ATTRIBUTE_UNUSED, bool in ATTRIBUTE_UNUSED) { @@ -3462,7 +3462,7 @@ xtensa_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, case ABS: { - enum machine_mode xmode = GET_MODE (x); + machine_mode xmode = GET_MODE (x); if (xmode == SFmode) *total = COSTS_N_INSNS (TARGET_HARD_FLOAT ? 1 : 50); else if (xmode == DFmode) @@ -3475,7 +3475,7 @@ xtensa_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, case PLUS: case MINUS: { - enum machine_mode xmode = GET_MODE (x); + machine_mode xmode = GET_MODE (x); if (xmode == SFmode) *total = COSTS_N_INSNS (TARGET_HARD_FLOAT ? 1 : 50); else if (xmode == DFmode || xmode == DImode) @@ -3491,7 +3491,7 @@ xtensa_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, case MULT: { - enum machine_mode xmode = GET_MODE (x); + machine_mode xmode = GET_MODE (x); if (xmode == SFmode) *total = COSTS_N_INSNS (TARGET_HARD_FLOAT ? 4 : 50); else if (xmode == DFmode) @@ -3512,7 +3512,7 @@ xtensa_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, case DIV: case MOD: { - enum machine_mode xmode = GET_MODE (x); + machine_mode xmode = GET_MODE (x); if (xmode == SFmode) { *total = COSTS_N_INSNS (TARGET_HARD_FLOAT_DIV ? 8 : 50); @@ -3529,7 +3529,7 @@ xtensa_rtx_costs (rtx x, int code, int outer_code, int opno ATTRIBUTE_UNUSED, case UDIV: case UMOD: { - enum machine_mode xmode = GET_MODE (x); + machine_mode xmode = GET_MODE (x); if (xmode == DImode) *total = COSTS_N_INSNS (50); else if (TARGET_DIV32) @@ -3592,7 +3592,7 @@ xtensa_function_value (const_tree valtype, const_tree func ATTRIBUTE_UNUSED, /* Worker function for TARGET_LIBCALL_VALUE. */ static rtx -xtensa_libcall_value (enum machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) +xtensa_libcall_value (machine_mode mode, const_rtx fun ATTRIBUTE_UNUSED) { return gen_rtx_REG ((GET_MODE_CLASS (mode) == MODE_INT && GET_MODE_SIZE (mode) < UNITS_PER_WORD) @@ -3715,7 +3715,7 @@ xtensa_trampoline_init (rtx m_tramp, tree fndecl, rtx chain) /* Implement TARGET_LEGITIMATE_CONSTANT_P. */ static bool -xtensa_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +xtensa_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return !xtensa_tls_referenced_p (x); } |