diff options
Diffstat (limited to 'gcc/config/arm/arm.c')
| -rw-r--r-- | gcc/config/arm/arm.c | 406 |
1 files changed, 203 insertions, 203 deletions
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index b424d92..f4c4ebd 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -96,20 +96,20 @@ struct four_ints /* Forward function declarations. */ static bool arm_const_not_ok_for_debug_p (rtx); static bool arm_lra_p (void); -static bool arm_needs_doubleword_align (enum machine_mode, const_tree); +static bool arm_needs_doubleword_align (machine_mode, const_tree); static int arm_compute_static_chain_stack_bytes (void); static arm_stack_offsets *arm_get_frame_offsets (void); static void arm_add_gc_roots (void); -static int arm_gen_constant (enum rtx_code, enum machine_mode, rtx, +static int arm_gen_constant (enum rtx_code, machine_mode, rtx, HOST_WIDE_INT, rtx, rtx, int, int); static unsigned bit_count (unsigned long); static int arm_address_register_rtx_p (rtx, int); -static int arm_legitimate_index_p (enum machine_mode, rtx, RTX_CODE, int); -static int thumb2_legitimate_index_p (enum machine_mode, rtx, int); -static int thumb1_base_register_rtx_p (rtx, enum machine_mode, int); -static rtx arm_legitimize_address (rtx, rtx, enum machine_mode); +static int arm_legitimate_index_p (machine_mode, rtx, RTX_CODE, int); +static int thumb2_legitimate_index_p (machine_mode, rtx, int); +static int thumb1_base_register_rtx_p (rtx, machine_mode, int); +static rtx arm_legitimize_address (rtx, rtx, machine_mode); static reg_class_t arm_preferred_reload_class (rtx, reg_class_t); -static rtx thumb_legitimize_address (rtx, rtx, enum machine_mode); +static rtx thumb_legitimize_address (rtx, rtx, machine_mode); inline static int thumb1_index_register_rtx_p (rtx, int); static int thumb_far_jump_used_p (void); static bool thumb_force_lr_save (void); @@ -139,7 +139,7 @@ static int arm_barrier_cost (rtx); static Mfix *create_fix_barrier (Mfix *, HOST_WIDE_INT); static void push_minipool_barrier (rtx_insn *, HOST_WIDE_INT); static void push_minipool_fix (rtx_insn *, HOST_WIDE_INT, rtx *, - enum machine_mode, rtx); + machine_mode, rtx); static void arm_reorg (void); static void note_invalid_constants (rtx_insn *, HOST_WIDE_INT, int); static unsigned long arm_compute_save_reg0_reg12_mask (void); @@ -167,20 +167,20 @@ static int optimal_immediate_sequence_1 (enum rtx_code code, int i); static int arm_get_strip_length (int); static bool arm_function_ok_for_sibcall (tree, tree); -static enum machine_mode arm_promote_function_mode (const_tree, - enum machine_mode, int *, +static machine_mode arm_promote_function_mode (const_tree, + machine_mode, int *, const_tree, int); static bool arm_return_in_memory (const_tree, const_tree); static rtx arm_function_value (const_tree, const_tree, bool); -static rtx arm_libcall_value_1 (enum machine_mode); -static rtx arm_libcall_value (enum machine_mode, const_rtx); +static rtx arm_libcall_value_1 (machine_mode); +static rtx arm_libcall_value (machine_mode, const_rtx); static bool arm_function_value_regno_p (const unsigned int); static void arm_internal_label (FILE *, const char *, unsigned long); static void arm_output_mi_thunk (FILE *, tree, HOST_WIDE_INT, HOST_WIDE_INT, tree); static bool arm_have_conditional_execution (void); -static bool arm_cannot_force_const_mem (enum machine_mode, rtx); -static bool arm_legitimate_constant_p (enum machine_mode, rtx); +static bool arm_cannot_force_const_mem (machine_mode, rtx); +static bool arm_legitimate_constant_p (machine_mode, rtx); static bool arm_rtx_costs_1 (rtx, enum rtx_code, int*, bool); static bool arm_size_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *); static bool arm_slowmul_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool); @@ -188,29 +188,29 @@ static bool arm_fastmul_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, boo static bool arm_xscale_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool); static bool arm_9e_rtx_costs (rtx, enum rtx_code, enum rtx_code, int *, bool); static bool arm_rtx_costs (rtx, int, int, int, int *, bool); -static int arm_address_cost (rtx, enum machine_mode, addr_space_t, bool); -static int arm_register_move_cost (enum machine_mode, reg_class_t, reg_class_t); -static int arm_memory_move_cost (enum machine_mode, reg_class_t, bool); +static int arm_address_cost (rtx, machine_mode, addr_space_t, bool); +static int arm_register_move_cost (machine_mode, reg_class_t, reg_class_t); +static int arm_memory_move_cost (machine_mode, reg_class_t, bool); static void arm_init_builtins (void); static void arm_init_iwmmxt_builtins (void); -static rtx safe_vector_operand (rtx, enum machine_mode); +static rtx safe_vector_operand (rtx, machine_mode); static rtx arm_expand_binop_builtin (enum insn_code, tree, rtx); static rtx arm_expand_unop_builtin (enum insn_code, tree, rtx, int); -static rtx arm_expand_builtin (tree, rtx, rtx, enum machine_mode, int); +static rtx arm_expand_builtin (tree, rtx, rtx, machine_mode, int); static tree arm_builtin_decl (unsigned, bool); static void emit_constant_insn (rtx cond, rtx pattern); static rtx_insn *emit_set_insn (rtx, rtx); static rtx emit_multi_reg_push (unsigned long, unsigned long); -static int arm_arg_partial_bytes (cumulative_args_t, enum machine_mode, +static int arm_arg_partial_bytes (cumulative_args_t, machine_mode, tree, bool); -static rtx arm_function_arg (cumulative_args_t, enum machine_mode, +static rtx arm_function_arg (cumulative_args_t, machine_mode, const_tree, bool); -static void arm_function_arg_advance (cumulative_args_t, enum machine_mode, +static void arm_function_arg_advance (cumulative_args_t, machine_mode, const_tree, bool); -static unsigned int arm_function_arg_boundary (enum machine_mode, const_tree); -static rtx aapcs_allocate_return_reg (enum machine_mode, const_tree, +static unsigned int arm_function_arg_boundary (machine_mode, const_tree); +static rtx aapcs_allocate_return_reg (machine_mode, const_tree, const_tree); -static rtx aapcs_libcall_value (enum machine_mode); +static rtx aapcs_libcall_value (machine_mode); static int aapcs_select_return_coproc (const_tree, const_tree); #ifdef OBJECT_FORMAT_ELF @@ -224,15 +224,15 @@ static void arm_encode_section_info (tree, rtx, int); static void arm_file_end (void); static void arm_file_start (void); -static void arm_setup_incoming_varargs (cumulative_args_t, enum machine_mode, +static void arm_setup_incoming_varargs (cumulative_args_t, machine_mode, tree, int *, int); static bool arm_pass_by_reference (cumulative_args_t, - enum machine_mode, const_tree, bool); + machine_mode, const_tree, bool); static bool arm_promote_prototypes (const_tree); static bool arm_default_short_enums (void); static bool arm_align_anon_bitfield (void); static bool arm_return_in_msb (const_tree); -static bool arm_must_pass_in_stack (enum machine_mode, const_tree); +static bool arm_must_pass_in_stack (machine_mode, const_tree); static bool arm_return_in_memory (const_tree, const_tree); #if ARM_UNWIND_INFO static void arm_unwind_emit (FILE *, rtx_insn *); @@ -256,7 +256,7 @@ static tree arm_build_builtin_va_list (void); static void arm_expand_builtin_va_start (tree, rtx); static tree arm_gimplify_va_arg_expr (tree, tree, gimple_seq *, gimple_seq *); static void arm_option_override (void); -static unsigned HOST_WIDE_INT arm_shift_truncation_mask (enum machine_mode); +static unsigned HOST_WIDE_INT arm_shift_truncation_mask (machine_mode); static bool arm_cannot_copy_insn_p (rtx_insn *); static int arm_issue_rate (void); static void arm_output_dwarf_dtprel (FILE *, int, rtx) ATTRIBUTE_UNUSED; @@ -267,7 +267,7 @@ static const char *arm_invalid_parameter_type (const_tree t); static const char *arm_invalid_return_type (const_tree t); static tree arm_promoted_type (const_tree t); static tree arm_convert_to_type (tree type, tree expr); -static bool arm_scalar_mode_supported_p (enum machine_mode); +static bool arm_scalar_mode_supported_p (machine_mode); static bool arm_frame_pointer_required (void); static bool arm_can_eliminate (const int, const int); static void arm_asm_trampoline_template (FILE *); @@ -277,13 +277,13 @@ static rtx arm_pic_static_addr (rtx orig, rtx reg); static bool cortex_a9_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *); static bool xscale_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *); static bool fa726te_sched_adjust_cost (rtx_insn *, rtx, rtx_insn *, int *); -static bool arm_array_mode_supported_p (enum machine_mode, +static bool arm_array_mode_supported_p (machine_mode, unsigned HOST_WIDE_INT); -static enum machine_mode arm_preferred_simd_mode (enum machine_mode); +static machine_mode arm_preferred_simd_mode (machine_mode); static bool arm_class_likely_spilled_p (reg_class_t); static HOST_WIDE_INT arm_vector_alignment (const_tree type); static bool arm_vector_alignment_reachable (const_tree type, bool is_packed); -static bool arm_builtin_support_vector_misalignment (enum machine_mode mode, +static bool arm_builtin_support_vector_misalignment (machine_mode mode, const_tree type, int misalignment, bool is_packed); @@ -294,7 +294,7 @@ static int arm_default_branch_cost (bool, bool); static int arm_cortex_a5_branch_cost (bool, bool); static int arm_cortex_m_branch_cost (bool, bool); -static bool arm_vectorize_vec_perm_const_ok (enum machine_mode vmode, +static bool arm_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel); static int arm_builtin_vectorization_cost (enum vect_cost_for_stmt type_of_cost, @@ -907,7 +907,7 @@ bool arm_disable_literal_pool = false; /* In case of a PRE_INC, POST_INC, PRE_DEC, POST_DEC memory reference, we must report the mode of the memory reference from TARGET_PRINT_OPERAND to TARGET_PRINT_OPERAND_ADDRESS. */ -enum machine_mode output_memory_reference_mode; +machine_mode output_memory_reference_mode; /* The register number to be used for the PIC offset register. */ unsigned arm_pic_register = INVALID_REGNUM; @@ -2153,14 +2153,14 @@ bit_count (unsigned long value) typedef struct { - enum machine_mode mode; + machine_mode mode; const char *name; } arm_fixed_mode_set; /* A small helper for setting fixed-point library libfuncs. */ static void -arm_set_fixed_optab_libfunc (optab optable, enum machine_mode mode, +arm_set_fixed_optab_libfunc (optab optable, machine_mode mode, const char *funcname, const char *modename, int num_suffix) { @@ -2175,8 +2175,8 @@ arm_set_fixed_optab_libfunc (optab optable, enum machine_mode mode, } static void -arm_set_fixed_conv_libfunc (convert_optab optable, enum machine_mode to, - enum machine_mode from, const char *funcname, +arm_set_fixed_conv_libfunc (convert_optab optable, machine_mode to, + machine_mode from, const char *funcname, const char *toname, const char *fromname) { char buffer[50]; @@ -3658,7 +3658,7 @@ const_ok_for_dimode_op (HOST_WIDE_INT i, enum rtx_code code) /* ??? Tweak this for thumb2. */ int -arm_split_constant (enum rtx_code code, enum machine_mode mode, rtx insn, +arm_split_constant (enum rtx_code code, machine_mode mode, rtx insn, HOST_WIDE_INT val, rtx target, rtx source, int subtargets) { rtx cond; @@ -3958,7 +3958,7 @@ emit_constant_insn (rtx cond, rtx pattern) RTL generation. */ static int -arm_gen_constant (enum rtx_code code, enum machine_mode mode, rtx cond, +arm_gen_constant (enum rtx_code code, machine_mode mode, rtx cond, HOST_WIDE_INT val, rtx target, rtx source, int subtargets, int generate) { @@ -4620,7 +4620,7 @@ static void arm_canonicalize_comparison (int *code, rtx *op0, rtx *op1, bool op0_preserve_value) { - enum machine_mode mode; + machine_mode mode; unsigned HOST_WIDE_INT i, maxval; mode = GET_MODE (*op0); @@ -4768,7 +4768,7 @@ static rtx arm_function_value(const_tree type, const_tree func, bool outgoing ATTRIBUTE_UNUSED) { - enum machine_mode mode; + machine_mode mode; int unsignedp ATTRIBUTE_UNUSED; rtx r ATTRIBUTE_UNUSED; @@ -4900,7 +4900,7 @@ arm_libcall_uses_aapcs_base (const_rtx libcall) } static rtx -arm_libcall_value_1 (enum machine_mode mode) +arm_libcall_value_1 (machine_mode mode) { if (TARGET_AAPCS_BASED) return aapcs_libcall_value (mode); @@ -4915,7 +4915,7 @@ arm_libcall_value_1 (enum machine_mode mode) assuming the value has mode MODE. */ static rtx -arm_libcall_value (enum machine_mode mode, const_rtx libcall) +arm_libcall_value (machine_mode mode, const_rtx libcall) { if (TARGET_AAPCS_BASED && arm_pcs_default != ARM_PCS_AAPCS && GET_MODE_CLASS (mode) == MODE_FLOAT) @@ -5223,9 +5223,9 @@ aapcs_vfp_cum_init (CUMULATIVE_ARGS *pcum ATTRIBUTE_UNUSED, type that doesn't match a non-VOIDmode *MODEP is found, then return -1, otherwise return the count in the sub-tree. */ static int -aapcs_vfp_sub_candidate (const_tree type, enum machine_mode *modep) +aapcs_vfp_sub_candidate (const_tree type, machine_mode *modep) { - enum machine_mode mode; + machine_mode mode; HOST_WIDE_INT size; switch (TREE_CODE (type)) @@ -5416,10 +5416,10 @@ use_vfp_abi (enum arm_pcs pcs_variant, bool is_double) *COUNT to hold the number of such elements. */ static bool aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant, - enum machine_mode mode, const_tree type, - enum machine_mode *base_mode, int *count) + machine_mode mode, const_tree type, + machine_mode *base_mode, int *count) { - enum machine_mode new_mode = VOIDmode; + machine_mode new_mode = VOIDmode; /* If we have the type information, prefer that to working things out from the mode. */ @@ -5457,10 +5457,10 @@ aapcs_vfp_is_call_or_return_candidate (enum arm_pcs pcs_variant, static bool aapcs_vfp_is_return_candidate (enum arm_pcs pcs_variant, - enum machine_mode mode, const_tree type) + machine_mode mode, const_tree type) { int count ATTRIBUTE_UNUSED; - enum machine_mode ag_mode ATTRIBUTE_UNUSED; + machine_mode ag_mode ATTRIBUTE_UNUSED; if (!use_vfp_abi (pcs_variant, false)) return false; @@ -5469,7 +5469,7 @@ aapcs_vfp_is_return_candidate (enum arm_pcs pcs_variant, } static bool -aapcs_vfp_is_call_candidate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, +aapcs_vfp_is_call_candidate (CUMULATIVE_ARGS *pcum, machine_mode mode, const_tree type) { if (!use_vfp_abi (pcum->pcs_variant, false)) @@ -5481,7 +5481,7 @@ aapcs_vfp_is_call_candidate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, } static bool -aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, +aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, machine_mode mode, const_tree type ATTRIBUTE_UNUSED) { int shift = GET_MODE_SIZE (pcum->aapcs_vfp_rmode) / GET_MODE_SIZE (SFmode); @@ -5499,7 +5499,7 @@ aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, int i; int rcount = pcum->aapcs_vfp_rcount; int rshift = shift; - enum machine_mode rmode = pcum->aapcs_vfp_rmode; + machine_mode rmode = pcum->aapcs_vfp_rmode; rtx par; if (!TARGET_NEON) { @@ -5535,7 +5535,7 @@ aapcs_vfp_allocate (CUMULATIVE_ARGS *pcum, enum machine_mode mode, static rtx aapcs_vfp_allocate_return_reg (enum arm_pcs pcs_variant ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, const_tree type ATTRIBUTE_UNUSED) { if (!use_vfp_abi (pcs_variant, false)) @@ -5544,7 +5544,7 @@ aapcs_vfp_allocate_return_reg (enum arm_pcs pcs_variant ATTRIBUTE_UNUSED, if (mode == BLKmode || (mode == TImode && !TARGET_NEON)) { int count; - enum machine_mode ag_mode; + machine_mode ag_mode; int i; rtx par; int shift; @@ -5580,7 +5580,7 @@ aapcs_vfp_allocate_return_reg (enum arm_pcs pcs_variant ATTRIBUTE_UNUSED, static void aapcs_vfp_advance (CUMULATIVE_ARGS *pcum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type ATTRIBUTE_UNUSED) { pcum->aapcs_vfp_regs_free &= ~pcum->aapcs_vfp_reg_alloc; @@ -5613,25 +5613,25 @@ static struct BLKmode) is a candidate for this co-processor's registers; this function should ignore any position-dependent state in CUMULATIVE_ARGS and only use call-type dependent information. */ - bool (*is_call_candidate) (CUMULATIVE_ARGS *, enum machine_mode, const_tree); + bool (*is_call_candidate) (CUMULATIVE_ARGS *, machine_mode, const_tree); /* Return true if the argument does get a co-processor register; it should set aapcs_reg to an RTX of the register allocated as is required for a return from FUNCTION_ARG. */ - bool (*allocate) (CUMULATIVE_ARGS *, enum machine_mode, const_tree); + bool (*allocate) (CUMULATIVE_ARGS *, machine_mode, const_tree); /* Return true if a result of mode MODE (or type TYPE if MODE is BLKmode) is can be returned in this co-processor's registers. */ - bool (*is_return_candidate) (enum arm_pcs, enum machine_mode, const_tree); + bool (*is_return_candidate) (enum arm_pcs, machine_mode, const_tree); /* Allocate and return an RTX element to hold the return type of a call, this routine must not fail and will only be called if is_return_candidate returned true with the same parameters. */ - rtx (*allocate_return_reg) (enum arm_pcs, enum machine_mode, const_tree); + rtx (*allocate_return_reg) (enum arm_pcs, machine_mode, const_tree); /* Finish processing this argument and prepare to start processing the next one. */ - void (*advance) (CUMULATIVE_ARGS *, enum machine_mode, const_tree); + void (*advance) (CUMULATIVE_ARGS *, machine_mode, const_tree); } aapcs_cp_arg_layout[ARM_NUM_COPROC_SLOTS] = { AAPCS_CP(vfp) @@ -5640,7 +5640,7 @@ static struct #undef AAPCS_CP static int -aapcs_select_call_coproc (CUMULATIVE_ARGS *pcum, enum machine_mode mode, +aapcs_select_call_coproc (CUMULATIVE_ARGS *pcum, machine_mode mode, const_tree type) { int i; @@ -5689,7 +5689,7 @@ aapcs_select_return_coproc (const_tree type, const_tree fntype) } static rtx -aapcs_allocate_return_reg (enum machine_mode mode, const_tree type, +aapcs_allocate_return_reg (machine_mode mode, const_tree type, const_tree fntype) { /* We aren't passed a decl, so we can't check that a call is local. @@ -5744,7 +5744,7 @@ aapcs_allocate_return_reg (enum machine_mode mode, const_tree type, } static rtx -aapcs_libcall_value (enum machine_mode mode) +aapcs_libcall_value (machine_mode mode) { if (BYTES_BIG_ENDIAN && ALL_FIXED_POINT_MODE_P (mode) && GET_MODE_SIZE (mode) <= 4) @@ -5756,7 +5756,7 @@ aapcs_libcall_value (enum machine_mode mode) /* Lay out a function argument using the AAPCS rules. The rule numbers referred to here are those in the AAPCS. */ static void -aapcs_layout_arg (CUMULATIVE_ARGS *pcum, enum machine_mode mode, +aapcs_layout_arg (CUMULATIVE_ARGS *pcum, machine_mode mode, const_tree type, bool named) { int nregs, nregs2; @@ -5928,7 +5928,7 @@ arm_lra_p (void) /* Return true if mode/type need doubleword alignment. */ static bool -arm_needs_doubleword_align (enum machine_mode mode, const_tree type) +arm_needs_doubleword_align (machine_mode mode, const_tree type) { return (GET_MODE_ALIGNMENT (mode) > PARM_BOUNDARY || (type && TYPE_ALIGN (type) > PARM_BOUNDARY)); @@ -5955,7 +5955,7 @@ arm_needs_doubleword_align (enum machine_mode mode, const_tree type) indeed make it pass in the stack if necessary). */ static rtx -arm_function_arg (cumulative_args_t pcum_v, enum machine_mode mode, +arm_function_arg (cumulative_args_t pcum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); @@ -6008,7 +6008,7 @@ arm_function_arg (cumulative_args_t pcum_v, enum machine_mode mode, } static unsigned int -arm_function_arg_boundary (enum machine_mode mode, const_tree type) +arm_function_arg_boundary (machine_mode mode, const_tree type) { return (ARM_DOUBLEWORD_ALIGN && arm_needs_doubleword_align (mode, type) ? DOUBLEWORD_ALIGNMENT @@ -6016,7 +6016,7 @@ arm_function_arg_boundary (enum machine_mode mode, const_tree type) } static int -arm_arg_partial_bytes (cumulative_args_t pcum_v, enum machine_mode mode, +arm_arg_partial_bytes (cumulative_args_t pcum_v, machine_mode mode, tree type, bool named) { CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); @@ -6044,7 +6044,7 @@ arm_arg_partial_bytes (cumulative_args_t pcum_v, enum machine_mode mode, (TYPE is null for libcalls where that information may not be available.) */ static void -arm_function_arg_advance (cumulative_args_t pcum_v, enum machine_mode mode, +arm_function_arg_advance (cumulative_args_t pcum_v, machine_mode mode, const_tree type, bool named) { CUMULATIVE_ARGS *pcum = get_cumulative_args (pcum_v); @@ -6083,7 +6083,7 @@ arm_function_arg_advance (cumulative_args_t pcum_v, enum machine_mode mode, static bool arm_pass_by_reference (cumulative_args_t cum ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, const_tree type, bool named ATTRIBUTE_UNUSED) { return type && TREE_CODE (TYPE_SIZE (type)) != INTEGER_CST; @@ -6513,7 +6513,7 @@ require_pic_register (void) } rtx -legitimize_pic_address (rtx orig, enum machine_mode mode, rtx reg) +legitimize_pic_address (rtx orig, machine_mode mode, rtx reg) { if (GET_CODE (orig) == SYMBOL_REF || GET_CODE (orig) == LABEL_REF) @@ -6838,7 +6838,7 @@ will_be_in_index_register (const_rtx x) /* Return nonzero if X is a valid ARM state address operand. */ int -arm_legitimate_address_outer_p (enum machine_mode mode, rtx x, RTX_CODE outer, +arm_legitimate_address_outer_p (machine_mode mode, rtx x, RTX_CODE outer, int strict_p) { bool use_ldrd; @@ -6925,7 +6925,7 @@ arm_legitimate_address_outer_p (enum machine_mode mode, rtx x, RTX_CODE outer, /* Return nonzero if X is a valid Thumb-2 address operand. */ static int -thumb2_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) +thumb2_legitimate_address_p (machine_mode mode, rtx x, int strict_p) { bool use_ldrd; enum rtx_code code = GET_CODE (x); @@ -7020,7 +7020,7 @@ thumb2_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) /* Return nonzero if INDEX is valid for an address index operand in ARM state. */ static int -arm_legitimate_index_p (enum machine_mode mode, rtx index, RTX_CODE outer, +arm_legitimate_index_p (machine_mode mode, rtx index, RTX_CODE outer, int strict_p) { HOST_WIDE_INT range; @@ -7141,7 +7141,7 @@ thumb2_index_mul_operand (rtx op) /* Return nonzero if INDEX is a valid Thumb-2 address index operand. */ static int -thumb2_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p) +thumb2_legitimate_index_p (machine_mode mode, rtx index, int strict_p) { enum rtx_code code = GET_CODE (index); @@ -7234,7 +7234,7 @@ thumb2_legitimate_index_p (enum machine_mode mode, rtx index, int strict_p) /* Return nonzero if X is valid as a 16-bit Thumb state base register. */ static int -thumb1_base_register_rtx_p (rtx x, enum machine_mode mode, int strict_p) +thumb1_base_register_rtx_p (rtx x, machine_mode mode, int strict_p) { int regno; @@ -7282,7 +7282,7 @@ thumb1_index_register_rtx_p (rtx x, int strict_p) reload pass starts. This is so that eliminating such addresses into stack based ones won't produce impossible code. */ int -thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) +thumb1_legitimate_address_p (machine_mode mode, rtx x, int strict_p) { /* ??? Not clear if this is right. Experiment. */ if (GET_MODE_SIZE (mode) < 4 @@ -7381,7 +7381,7 @@ thumb1_legitimate_address_p (enum machine_mode mode, rtx x, int strict_p) /* Return nonzero if VAL can be used as an offset in a Thumb-state address instruction of mode MODE. */ int -thumb_legitimate_offset_p (enum machine_mode mode, HOST_WIDE_INT val) +thumb_legitimate_offset_p (machine_mode mode, HOST_WIDE_INT val) { switch (GET_MODE_SIZE (mode)) { @@ -7399,7 +7399,7 @@ thumb_legitimate_offset_p (enum machine_mode mode, HOST_WIDE_INT val) } bool -arm_legitimate_address_p (enum machine_mode mode, rtx x, bool strict_p) +arm_legitimate_address_p (machine_mode mode, rtx x, bool strict_p) { if (TARGET_ARM) return arm_legitimate_address_outer_p (mode, x, SET, strict_p); @@ -7637,7 +7637,7 @@ legitimize_tls_address (rtx x, rtx reg) /* Try machine-dependent ways of modifying an illegitimate address to be legitimate. If we find one, return the new, valid address. */ rtx -arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) +arm_legitimize_address (rtx x, rtx orig_x, machine_mode mode) { if (arm_tls_referenced_p (x)) { @@ -7783,7 +7783,7 @@ arm_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) /* Try machine-dependent ways of modifying an illegitimate Thumb address to be legitimate. If we find one, return the new, valid address. */ rtx -thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) +thumb_legitimize_address (rtx x, rtx orig_x, machine_mode mode) { if (GET_CODE (x) == PLUS && CONST_INT_P (XEXP (x, 1)) @@ -7849,7 +7849,7 @@ thumb_legitimize_address (rtx x, rtx orig_x, enum machine_mode mode) bool arm_legitimize_reload_address (rtx *p, - enum machine_mode mode, + machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -8036,7 +8036,7 @@ arm_legitimize_reload_address (rtx *p, rtx thumb_legitimize_reload_address (rtx *x_p, - enum machine_mode mode, + machine_mode mode, int opnum, int type, int ind_levels ATTRIBUTE_UNUSED) { @@ -8116,7 +8116,7 @@ arm_tls_referenced_p (rtx x) When generating pic allow anything. */ static bool -arm_legitimate_constant_p_1 (enum machine_mode mode, rtx x) +arm_legitimate_constant_p_1 (machine_mode mode, rtx x) { /* At present, we have no support for Neon structure constants, so forbid them here. It might be possible to handle simple cases like 0 and -1 @@ -8128,7 +8128,7 @@ arm_legitimate_constant_p_1 (enum machine_mode mode, rtx x) } static bool -thumb_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +thumb_legitimate_constant_p (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { return (CONST_INT_P (x) || CONST_DOUBLE_P (x) @@ -8137,7 +8137,7 @@ thumb_legitimate_constant_p (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) } static bool -arm_legitimate_constant_p (enum machine_mode mode, rtx x) +arm_legitimate_constant_p (machine_mode mode, rtx x) { return (!arm_cannot_force_const_mem (mode, x) && (TARGET_32BIT @@ -8148,7 +8148,7 @@ arm_legitimate_constant_p (enum machine_mode mode, rtx x) /* Implement TARGET_CANNOT_FORCE_CONST_MEM. */ static bool -arm_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) +arm_cannot_force_const_mem (machine_mode mode ATTRIBUTE_UNUSED, rtx x) { rtx base, offset; @@ -8172,7 +8172,7 @@ arm_cannot_force_const_mem (enum machine_mode mode ATTRIBUTE_UNUSED, rtx x) static inline int thumb1_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int total, words; switch (code) @@ -8300,7 +8300,7 @@ thumb1_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) static inline bool arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); enum rtx_code subcode; rtx operand; enum rtx_code code = GET_CODE (x); @@ -8762,7 +8762,7 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed) if (GET_MODE_CLASS (mode) == MODE_INT) { rtx op = XEXP (x, 0); - enum machine_mode opmode = GET_MODE (op); + machine_mode opmode = GET_MODE (op); if (mode == DImode) *total += COSTS_N_INSNS (1); @@ -8905,7 +8905,7 @@ arm_rtx_costs_1 (rtx x, enum rtx_code outer, int* total, bool speed) static inline int thumb1_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int words; switch (code) @@ -9047,7 +9047,7 @@ static bool arm_size_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB1) { *total = thumb1_size_rtx_costs (x, code, outer_code); @@ -9402,7 +9402,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, const struct cpu_cost_table *extra_cost, int *cost, bool speed_p) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB1) { @@ -10398,7 +10398,7 @@ arm_new_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, *cost = 0; else { - enum machine_mode op0mode; + machine_mode op0mode; /* We'll mostly assume that the cost of a compare is the cost of the LHS. However, there are some notable exceptions. */ @@ -11122,7 +11122,7 @@ static bool arm_slowmul_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB) { @@ -11176,7 +11176,7 @@ static bool arm_fastmul_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB1) { @@ -11260,7 +11260,7 @@ static bool arm_xscale_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB) { @@ -11349,7 +11349,7 @@ static bool arm_9e_rtx_costs (rtx x, enum rtx_code code, enum rtx_code outer_code, int *total, bool speed) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); if (TARGET_THUMB1) { @@ -11454,7 +11454,7 @@ arm_thumb_address_cost (rtx x) } static int -arm_address_cost (rtx x, enum machine_mode mode ATTRIBUTE_UNUSED, +arm_address_cost (rtx x, machine_mode mode ATTRIBUTE_UNUSED, addr_space_t as ATTRIBUTE_UNUSED, bool speed ATTRIBUTE_UNUSED) { return TARGET_32BIT ? arm_arm_address_cost (x) : arm_thumb_address_cost (x); @@ -11632,7 +11632,7 @@ fa726te_sched_adjust_cost (rtx_insn *insn, rtx link, rtx_insn *dep, int * cost) point to integer conversion does not go through memory. */ int -arm_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, +arm_register_move_cost (machine_mode mode ATTRIBUTE_UNUSED, reg_class_t from, reg_class_t to) { if (TARGET_32BIT) @@ -11660,7 +11660,7 @@ arm_register_move_cost (enum machine_mode mode ATTRIBUTE_UNUSED, /* Implement TARGET_MEMORY_MOVE_COST. */ int -arm_memory_move_cost (enum machine_mode mode, reg_class_t rclass, +arm_memory_move_cost (machine_mode mode, reg_class_t rclass, bool in ATTRIBUTE_UNUSED) { if (TARGET_32BIT) @@ -12219,7 +12219,7 @@ vfp3_const_double_rtx (rtx x) -1 if the given value doesn't match any of the listed patterns. */ static int -neon_valid_immediate (rtx op, enum machine_mode mode, int inverse, +neon_valid_immediate (rtx op, machine_mode mode, int inverse, rtx *modconst, int *elementwidth) { #define CHECK(STRIDE, ELSIZE, CLASS, TEST) \ @@ -12424,7 +12424,7 @@ neon_valid_immediate (rtx op, enum machine_mode mode, int inverse, VMOV) in *MODCONST. */ int -neon_immediate_valid_for_move (rtx op, enum machine_mode mode, +neon_immediate_valid_for_move (rtx op, machine_mode mode, rtx *modconst, int *elementwidth) { rtx tmpconst; @@ -12449,7 +12449,7 @@ neon_immediate_valid_for_move (rtx op, enum machine_mode mode, *ELEMENTWIDTH. See neon_valid_immediate for description of INVERSE. */ int -neon_immediate_valid_for_logic (rtx op, enum machine_mode mode, int inverse, +neon_immediate_valid_for_logic (rtx op, machine_mode mode, int inverse, rtx *modconst, int *elementwidth) { rtx tmpconst; @@ -12475,7 +12475,7 @@ neon_immediate_valid_for_logic (rtx op, enum machine_mode mode, int inverse, because they have different limitations. */ int -neon_immediate_valid_for_shift (rtx op, enum machine_mode mode, +neon_immediate_valid_for_shift (rtx op, machine_mode mode, rtx *modconst, int *elementwidth, bool isleftshift) { @@ -12532,7 +12532,7 @@ neon_immediate_valid_for_shift (rtx op, enum machine_mode mode, MNEM. */ char * -neon_output_logic_immediate (const char *mnem, rtx *op2, enum machine_mode mode, +neon_output_logic_immediate (const char *mnem, rtx *op2, machine_mode mode, int inverse, int quad) { int width, is_valid; @@ -12555,7 +12555,7 @@ neon_output_logic_immediate (const char *mnem, rtx *op2, enum machine_mode mode, char * neon_output_shift_immediate (const char *mnem, char sign, rtx *op2, - enum machine_mode mode, int quad, + machine_mode mode, int quad, bool isleftshift) { int width, is_valid; @@ -12583,10 +12583,10 @@ neon_output_shift_immediate (const char *mnem, char sign, rtx *op2, for no particular gain. */ void -neon_pairwise_reduce (rtx op0, rtx op1, enum machine_mode mode, +neon_pairwise_reduce (rtx op0, rtx op1, machine_mode mode, rtx (*reduc) (rtx, rtx, rtx)) { - enum machine_mode inner = GET_MODE_INNER (mode); + machine_mode inner = GET_MODE_INNER (mode); unsigned int i, parts = GET_MODE_SIZE (mode) / GET_MODE_SIZE (inner); rtx tmpsum = op1; @@ -12605,8 +12605,8 @@ neon_pairwise_reduce (rtx op0, rtx op1, enum machine_mode mode, static rtx neon_vdup_constant (rtx vals) { - enum machine_mode mode = GET_MODE (vals); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (vals); + machine_mode inner_mode = GET_MODE_INNER (mode); int n_elts = GET_MODE_NUNITS (mode); bool all_same = true; rtx x; @@ -12645,7 +12645,7 @@ neon_vdup_constant (rtx vals) rtx neon_make_constant (rtx vals) { - enum machine_mode mode = GET_MODE (vals); + machine_mode mode = GET_MODE (vals); rtx target; rtx const_vec = NULL_RTX; int n_elts = GET_MODE_NUNITS (mode); @@ -12697,8 +12697,8 @@ neon_make_constant (rtx vals) void neon_expand_vector_init (rtx target, rtx vals) { - enum machine_mode mode = GET_MODE (target); - enum machine_mode inner_mode = GET_MODE_INNER (mode); + machine_mode mode = GET_MODE (target); + machine_mode inner_mode = GET_MODE_INNER (mode); int n_elts = GET_MODE_NUNITS (mode); int n_var = 0, one_var = -1; bool all_same = true; @@ -12828,7 +12828,7 @@ neon_const_bounds (rtx operand, HOST_WIDE_INT low, HOST_WIDE_INT high) } HOST_WIDE_INT -neon_element_bits (enum machine_mode mode) +neon_element_bits (machine_mode mode) { if (mode == DImode) return GET_MODE_BITSIZE (mode); @@ -13037,7 +13037,7 @@ arm_eliminable_register (rtx x) coprocessor registers. Otherwise return NO_REGS. */ enum reg_class -coproc_secondary_reload_class (enum machine_mode mode, rtx x, bool wb) +coproc_secondary_reload_class (machine_mode mode, rtx x, bool wb) { if (mode == HFmode) { @@ -13322,7 +13322,7 @@ adjacent_mem_locations (rtx a, rtx b) REGNO (R_dk) = REGNO (R_d0) + k. The pattern for store is similar. */ bool -ldm_stm_operation_p (rtx op, bool load, enum machine_mode mode, +ldm_stm_operation_p (rtx op, bool load, machine_mode mode, bool consecutive, bool return_pc) { HOST_WIDE_INT count = XVECLEN (op, 0); @@ -14780,7 +14780,7 @@ by mode size. */ inline static rtx next_consecutive_mem (rtx mem) { - enum machine_mode mode = GET_MODE (mem); + machine_mode mode = GET_MODE (mem); HOST_WIDE_INT offset = GET_MODE_SIZE (mode); rtx addr = plus_constant (Pmode, XEXP (mem, 0), offset); @@ -14920,7 +14920,7 @@ gen_movmem_ldrd_strd (rtx *operands) here. If we are unable to support a dominance comparison we return CC mode. This will then fail to match for the RTL expressions that generate this call. */ -enum machine_mode +machine_mode arm_select_dominance_cc_mode (rtx x, rtx y, HOST_WIDE_INT cond_or) { enum rtx_code cond1, cond2; @@ -15062,7 +15062,7 @@ arm_select_dominance_cc_mode (rtx x, rtx y, HOST_WIDE_INT cond_or) } } -enum machine_mode +machine_mode arm_select_cc_mode (enum rtx_code op, rtx x, rtx y) { /* All floating point compares return CCFP if it is an equality @@ -15245,7 +15245,7 @@ arm_select_cc_mode (enum rtx_code op, rtx x, rtx y) rtx arm_gen_compare_reg (enum rtx_code code, rtx x, rtx y, rtx scratch) { - enum machine_mode mode; + machine_mode mode; rtx cc_reg; int dimode_comparison = GET_MODE (x) == DImode || GET_MODE (y) == DImode; @@ -15581,7 +15581,7 @@ arm_reload_out_hi (rtx *operands) (padded to the size of a word) should be passed in a register. */ static bool -arm_must_pass_in_stack (enum machine_mode mode, const_tree type) +arm_must_pass_in_stack (machine_mode mode, const_tree type) { if (TARGET_AAPCS_BASED) return must_pass_in_stack_var_size (mode, type); @@ -15597,7 +15597,7 @@ arm_must_pass_in_stack (enum machine_mode mode, const_tree type) aggregate types are placed in the lowest memory address. */ bool -arm_pad_arg_upward (enum machine_mode mode ATTRIBUTE_UNUSED, const_tree type) +arm_pad_arg_upward (machine_mode mode ATTRIBUTE_UNUSED, const_tree type) { if (!TARGET_AAPCS_BASED) return DEFAULT_FUNCTION_ARG_PADDING(mode, type) == upward; @@ -15615,7 +15615,7 @@ arm_pad_arg_upward (enum machine_mode mode ATTRIBUTE_UNUSED, const_tree type) significant byte does. */ bool -arm_pad_reg_upward (enum machine_mode mode, +arm_pad_reg_upward (machine_mode mode, tree type, int first ATTRIBUTE_UNUSED) { if (TARGET_AAPCS_BASED && BYTES_BIG_ENDIAN) @@ -16140,7 +16140,7 @@ struct minipool_node /* The value in table. */ rtx value; /* The mode of value. */ - enum machine_mode mode; + machine_mode mode; /* The size of the value. With iWMMXt enabled sizes > 4 also imply an alignment of 8-bytes. */ int fix_size; @@ -16152,7 +16152,7 @@ struct minipool_fixup rtx_insn * insn; HOST_WIDE_INT address; rtx * loc; - enum machine_mode mode; + machine_mode mode; int fix_size; rtx value; Mnode * minipool; @@ -16873,7 +16873,7 @@ push_minipool_barrier (rtx_insn *insn, HOST_WIDE_INT address) MODE. */ static void push_minipool_fix (rtx_insn *insn, HOST_WIDE_INT address, rtx *loc, - enum machine_mode mode, rtx value) + machine_mode mode, rtx value) { Mfix * fix = (Mfix *) obstack_alloc (&minipool_obstack, sizeof (* fix)); @@ -16940,7 +16940,7 @@ int arm_const_double_inline_cost (rtx val) { rtx lowpart, highpart; - enum machine_mode mode; + machine_mode mode; mode = GET_MODE (val); @@ -16976,7 +16976,7 @@ arm_const_inline_cost (enum rtx_code code, rtx val) bool arm_const_double_by_parts (rtx val) { - enum machine_mode mode = GET_MODE (val); + machine_mode mode = GET_MODE (val); rtx part; if (optimize_size || arm_ld_sched) @@ -17009,7 +17009,7 @@ arm_const_double_by_parts (rtx val) bool arm_const_double_by_immediates (rtx val) { - enum machine_mode mode = GET_MODE (val); + machine_mode mode = GET_MODE (val); rtx part; if (mode == VOIDmode) @@ -18461,7 +18461,7 @@ output_move_vfp (rtx *operands) int integer_p = GET_MODE_CLASS (GET_MODE (operands[0])) == MODE_INT; const char *templ; char buff[50]; - enum machine_mode mode; + machine_mode mode; reg = operands[!load]; mem = operands[load]; @@ -18557,7 +18557,7 @@ output_move_neon (rtx *operands) int regno, nregs, load = REG_P (operands[0]); const char *templ; char buff[50]; - enum machine_mode mode; + machine_mode mode; reg = operands[!load]; mem = operands[load]; @@ -18672,7 +18672,7 @@ arm_attr_length_move_neon (rtx_insn *insn) { rtx reg, mem, addr; int load; - enum machine_mode mode; + machine_mode mode; extract_insn_cached (insn); @@ -20624,7 +20624,7 @@ arm_emit_ldrd_pop (unsigned long saved_regs_mask) static unsigned arm_size_return_regs (void) { - enum machine_mode mode; + machine_mode mode; if (crtl->return_rtx != 0) mode = GET_MODE (crtl->return_rtx); @@ -21718,7 +21718,7 @@ arm_print_operand (FILE *stream, rtx x, int code) case 'R': if (CONST_INT_P (x) || CONST_DOUBLE_P (x)) { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); rtx part; if (mode == VOIDmode) @@ -21879,7 +21879,7 @@ arm_print_operand (FILE *stream, rtx x, int code) register. */ case 'p': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int regno; if (GET_MODE_SIZE (mode) != 8 || !REG_P (x)) @@ -21903,7 +21903,7 @@ arm_print_operand (FILE *stream, rtx x, int code) case 'P': case 'q': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int is_quad = (code == 'q'); int regno; @@ -21939,7 +21939,7 @@ arm_print_operand (FILE *stream, rtx x, int code) case 'e': case 'f': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int regno; if ((GET_MODE_SIZE (mode) != 16 @@ -22080,7 +22080,7 @@ arm_print_operand (FILE *stream, rtx x, int code) /* Translate an S register number into a D register number and element index. */ case 'y': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int regno; if (GET_MODE_SIZE (mode) != 4 || !REG_P (x)) @@ -22114,7 +22114,7 @@ arm_print_operand (FILE *stream, rtx x, int code) number into a D register number and element index. */ case 'z': { - enum machine_mode mode = GET_MODE (x); + machine_mode mode = GET_MODE (x); int regno; if (GET_MODE_SIZE (mode) != 2 || !REG_P (x)) @@ -22239,7 +22239,7 @@ arm_print_operand_address (FILE *stream, rtx x) else if (GET_CODE (x) == PRE_INC || GET_CODE (x) == POST_INC || GET_CODE (x) == PRE_DEC || GET_CODE (x) == POST_DEC) { - extern enum machine_mode output_memory_reference_mode; + extern machine_mode output_memory_reference_mode; gcc_assert (REG_P (XEXP (x, 0))); @@ -22316,7 +22316,7 @@ arm_print_operand_punct_valid_p (unsigned char code) static bool arm_assemble_integer (rtx x, unsigned int size, int aligned_p) { - enum machine_mode mode; + machine_mode mode; if (size == UNITS_PER_WORD && aligned_p) { @@ -22472,7 +22472,7 @@ arm_elf_asm_destructor (rtx symbol, int priority) enum arm_cond_code maybe_get_arm_condition_code (rtx comparison) { - enum machine_mode mode = GET_MODE (XEXP (comparison, 0)); + machine_mode mode = GET_MODE (XEXP (comparison, 0)); enum arm_cond_code code; enum rtx_code comp_code = GET_CODE (comparison); @@ -23021,7 +23021,7 @@ thumb2_asm_output_opcode (FILE * stream) /* Returns true if REGNO is a valid register for holding a quantity of type MODE. */ int -arm_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) +arm_hard_regno_mode_ok (unsigned int regno, machine_mode mode) { if (GET_MODE_CLASS (mode) == MODE_CC) return (regno == CC_REGNUM @@ -23101,7 +23101,7 @@ arm_hard_regno_mode_ok (unsigned int regno, enum machine_mode mode) /* Implement MODES_TIEABLE_P. */ bool -arm_modes_tieable_p (enum machine_mode mode1, enum machine_mode mode2) +arm_modes_tieable_p (machine_mode mode1, machine_mode mode2) { if (GET_MODE_CLASS (mode1) == GET_MODE_CLASS (mode2)) return true; @@ -24741,7 +24741,7 @@ arm_init_iwmmxt_builtins (void) { /* Use one of the operands; the target can have a different mode for mask-generating compares. */ - enum machine_mode mode; + machine_mode mode; tree type; if (d->name == 0 || !(d->mask == FL_IWMMXT || d->mask == FL_IWMMXT2)) @@ -25070,7 +25070,7 @@ arm_convert_to_type (tree type, tree expr) special-cased in the default hook. */ static bool -arm_scalar_mode_supported_p (enum machine_mode mode) +arm_scalar_mode_supported_p (machine_mode mode) { if (mode == HFmode) return (arm_fp16_format != ARM_FP16_FORMAT_NONE); @@ -25085,7 +25085,7 @@ arm_scalar_mode_supported_p (enum machine_mode mode) clear instructions. */ static rtx -safe_vector_operand (rtx x, enum machine_mode mode) +safe_vector_operand (rtx x, machine_mode mode) { if (x != const0_rtx) return x; @@ -25122,10 +25122,10 @@ arm_expand_ternop_builtin (enum insn_code icode, || icode == CODE_FOR_crypto_sha1m); builtin_sha1cpm_p = true; } - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; - enum machine_mode mode2 = insn_data[icode].operand[3].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode mode2 = insn_data[icode].operand[3].mode; if (VECTOR_MODE_P (mode0)) @@ -25174,9 +25174,9 @@ arm_expand_binop_builtin (enum insn_code icode, tree arg1 = CALL_EXPR_ARG (exp, 1); rtx op0 = expand_normal (arg0); rtx op1 = expand_normal (arg1); - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; - enum machine_mode mode1 = insn_data[icode].operand[2].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode mode1 = insn_data[icode].operand[2].mode; if (VECTOR_MODE_P (mode0)) op0 = safe_vector_operand (op0, mode0); @@ -25213,8 +25213,8 @@ arm_expand_unop_builtin (enum insn_code icode, tree arg0 = CALL_EXPR_ARG (exp, 0); rtx op0 = expand_normal (arg0); rtx op1 = NULL_RTX; - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode0 = insn_data[icode].operand[1].mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode0 = insn_data[icode].operand[1].mode; bool builtin_sha1h_p = false; if (insn_data[icode].n_operands == 3) @@ -25269,8 +25269,8 @@ typedef enum { available. */ static tree -neon_dereference_pointer (tree exp, tree type, enum machine_mode mem_mode, - enum machine_mode reg_mode, +neon_dereference_pointer (tree exp, tree type, machine_mode mem_mode, + machine_mode reg_mode, neon_builtin_type_mode type_mode) { HOST_WIDE_INT reg_size, vector_size, nvectors, nelems; @@ -25320,9 +25320,9 @@ arm_expand_neon_args (rtx target, int icode, int have_retval, rtx op[NEON_MAX_BUILTIN_ARGS]; tree arg_type; tree formals; - enum machine_mode tmode = insn_data[icode].operand[0].mode; - enum machine_mode mode[NEON_MAX_BUILTIN_ARGS]; - enum machine_mode other_mode; + machine_mode tmode = insn_data[icode].operand[0].mode; + machine_mode mode[NEON_MAX_BUILTIN_ARGS]; + machine_mode other_mode; int argc = 0; int opno; @@ -25627,7 +25627,7 @@ neon_split_vcombine (rtx operands[3]) unsigned int dest = REGNO (operands[0]); unsigned int src1 = REGNO (operands[1]); unsigned int src2 = REGNO (operands[2]); - enum machine_mode halfmode = GET_MODE (operands[1]); + machine_mode halfmode = GET_MODE (operands[1]); unsigned int halfregs = HARD_REGNO_NREGS (src1, halfmode); rtx destlo, desthi; @@ -25680,7 +25680,7 @@ static rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget ATTRIBUTE_UNUSED, - enum machine_mode mode ATTRIBUTE_UNUSED, + machine_mode mode ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED) { const struct builtin_description * d; @@ -25695,10 +25695,10 @@ arm_expand_builtin (tree exp, rtx pat; unsigned int fcode = DECL_FUNCTION_CODE (fndecl); size_t i; - enum machine_mode tmode; - enum machine_mode mode0; - enum machine_mode mode1; - enum machine_mode mode2; + machine_mode tmode; + machine_mode mode0; + machine_mode mode1; + machine_mode mode2; int opint; int selector; int mask; @@ -26362,7 +26362,7 @@ thumb_exit (FILE *f, int reg_containing_return_addr) int pops_needed; unsigned available; unsigned required; - enum machine_mode mode; + machine_mode mode; int size; int restore_a4 = FALSE; @@ -28773,7 +28773,7 @@ arm_output_load_gr (rtx *operands) static void arm_setup_incoming_varargs (cumulative_args_t pcum_v, - enum machine_mode mode, + machine_mode mode, tree type, int *pretend_size, int second_time ATTRIBUTE_UNUSED) @@ -28804,9 +28804,9 @@ arm_promote_prototypes (const_tree t ATTRIBUTE_UNUSED) return !TARGET_AAPCS_BASED; } -static enum machine_mode +static machine_mode arm_promote_function_mode (const_tree type ATTRIBUTE_UNUSED, - enum machine_mode mode, + machine_mode mode, int *punsignedp ATTRIBUTE_UNUSED, const_tree fntype ATTRIBUTE_UNUSED, int for_return ATTRIBUTE_UNUSED) @@ -29027,7 +29027,7 @@ thumb_set_return_address (rtx source, rtx scratch) /* Implements target hook vector_mode_supported_p. */ bool -arm_vector_mode_supported_p (enum machine_mode mode) +arm_vector_mode_supported_p (machine_mode mode) { /* Neon also supports V2SImode, etc. listed in the clause below. */ if (TARGET_NEON && (mode == V2SFmode || mode == V4SImode || mode == V8HImode @@ -29051,7 +29051,7 @@ arm_vector_mode_supported_p (enum machine_mode mode) /* Implements target hook array_mode_supported_p. */ static bool -arm_array_mode_supported_p (enum machine_mode mode, +arm_array_mode_supported_p (machine_mode mode, unsigned HOST_WIDE_INT nelems) { if (TARGET_NEON @@ -29066,8 +29066,8 @@ arm_array_mode_supported_p (enum machine_mode mode, registers when autovectorizing for Neon, at least until multiple vector widths are supported properly by the middle-end. */ -static enum machine_mode -arm_preferred_simd_mode (enum machine_mode mode) +static machine_mode +arm_preferred_simd_mode (machine_mode mode) { if (TARGET_NEON) switch (mode) @@ -29124,7 +29124,7 @@ arm_class_likely_spilled_p (reg_class_t rclass) /* Implements target hook small_register_classes_for_mode_p. */ bool -arm_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED) +arm_small_register_classes_for_mode_p (machine_mode mode ATTRIBUTE_UNUSED) { return TARGET_THUMB1; } @@ -29135,7 +29135,7 @@ arm_small_register_classes_for_mode_p (enum machine_mode mode ATTRIBUTE_UNUSED) guarantee no particular behavior for out-of-range counts. */ static unsigned HOST_WIDE_INT -arm_shift_truncation_mask (enum machine_mode mode) +arm_shift_truncation_mask (machine_mode mode) { return mode == SImode ? 255 : 0; } @@ -29173,7 +29173,7 @@ arm_dbx_register_number (unsigned int regno) static rtx arm_dwarf_register_span (rtx rtl) { - enum machine_mode mode; + machine_mode mode; unsigned regno; rtx parts[16]; int nregs; @@ -29728,7 +29728,7 @@ arm_output_iwmmxt_shift_immediate (const char *insn_name, rtx *operands, bool wr { int shift = INTVAL (operands[2]); char templ[50]; - enum machine_mode opmode = GET_MODE (operands[0]); + machine_mode opmode = GET_MODE (operands[0]); gcc_assert (shift >= 0); @@ -29906,7 +29906,7 @@ arm_issue_rate (void) composed of NEON vector element types (e.g. __builtin_neon_qi). */ typedef struct { - enum machine_mode mode; + machine_mode mode; const char *element_type_name; const char *aapcs_name; } arm_mangle_map_entry; @@ -30020,7 +30020,7 @@ arm_have_conditional_execution (void) tree arm_builtin_vectorized_function (tree fndecl, tree type_out, tree type_in) { - enum machine_mode in_mode, out_mode; + machine_mode in_mode, out_mode; int in_n, out_n; bool out_unsigned_p = TYPE_UNSIGNED (type_out); @@ -30171,7 +30171,7 @@ arm_vector_alignment_reachable (const_tree type, bool is_packed) } static bool -arm_builtin_support_vector_misalignment (enum machine_mode mode, +arm_builtin_support_vector_misalignment (machine_mode mode, const_tree type, int misalignment, bool is_packed) { @@ -30395,7 +30395,7 @@ arm_post_atomic_barrier (enum memmodel model) Use acquire and release versions if necessary. */ static void -arm_emit_load_exclusive (enum machine_mode mode, rtx rval, rtx mem, bool acq) +arm_emit_load_exclusive (machine_mode mode, rtx rval, rtx mem, bool acq) { rtx (*gen) (rtx, rtx); @@ -30428,7 +30428,7 @@ arm_emit_load_exclusive (enum machine_mode mode, rtx rval, rtx mem, bool acq) } static void -arm_emit_store_exclusive (enum machine_mode mode, rtx bval, rtx rval, +arm_emit_store_exclusive (machine_mode mode, rtx bval, rtx rval, rtx mem, bool rel) { rtx (*gen) (rtx, rtx, rtx); @@ -30478,7 +30478,7 @@ void arm_expand_compare_and_swap (rtx operands[]) { rtx bval, rval, mem, oldval, newval, is_weak, mod_s, mod_f, x; - enum machine_mode mode; + machine_mode mode; rtx (*gen) (rtx, rtx, rtx, rtx, rtx, rtx, rtx); bval = operands[0]; @@ -30559,7 +30559,7 @@ void arm_split_compare_and_swap (rtx operands[]) { rtx rval, mem, oldval, newval, scratch; - enum machine_mode mode; + machine_mode mode; enum memmodel mod_s, mod_f; bool is_weak; rtx_code_label *label1, *label2; @@ -30637,8 +30637,8 @@ arm_split_atomic_op (enum rtx_code code, rtx old_out, rtx new_out, rtx mem, rtx value, rtx model_rtx, rtx cond) { enum memmodel model = (enum memmodel) INTVAL (model_rtx); - enum machine_mode mode = GET_MODE (mem); - enum machine_mode wmode = (mode == DImode ? DImode : SImode); + machine_mode mode = GET_MODE (mem); + machine_mode wmode = (mode == DImode ? DImode : SImode); rtx_code_label *label; rtx x; @@ -30732,7 +30732,7 @@ struct expand_vec_perm_d { rtx target, op0, op1; unsigned char perm[MAX_VECT_LEN]; - enum machine_mode vmode; + machine_mode vmode; unsigned char nelt; bool one_vector_p; bool testing_p; @@ -30743,7 +30743,7 @@ struct expand_vec_perm_d static void arm_expand_vec_perm_1 (rtx target, rtx op0, rtx op1, rtx sel) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); bool one_vector_p = rtx_equal_p (op0, op1); gcc_checking_assert (vmode == V8QImode || vmode == V16QImode); @@ -30782,7 +30782,7 @@ arm_expand_vec_perm_1 (rtx target, rtx op0, rtx op1, rtx sel) void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel) { - enum machine_mode vmode = GET_MODE (target); + machine_mode vmode = GET_MODE (target); unsigned int i, nelt = GET_MODE_NUNITS (vmode); bool one_vector_p = rtx_equal_p (op0, op1); rtx rmask[MAX_VECT_LEN], mask; @@ -31150,7 +31150,7 @@ static bool arm_evpc_neon_vtbl (struct expand_vec_perm_d *d) { rtx rperm[MAX_VECT_LEN], sel; - enum machine_mode vmode = d->vmode; + machine_mode vmode = d->vmode; unsigned int i, nelt = d->nelt; /* TODO: ARM's VTBL indexing is little-endian. In order to handle GCC's @@ -31275,7 +31275,7 @@ arm_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel) /* Implement TARGET_VECTORIZE_VEC_PERM_CONST_OK. */ static bool -arm_vectorize_vec_perm_const_ok (enum machine_mode vmode, +arm_vectorize_vec_perm_const_ok (machine_mode vmode, const unsigned char *sel) { struct expand_vec_perm_d d; @@ -31316,7 +31316,7 @@ arm_vectorize_vec_perm_const_ok (enum machine_mode vmode, } bool -arm_autoinc_modes_ok_p (enum machine_mode mode, enum arm_auto_incmodes code) +arm_autoinc_modes_ok_p (machine_mode mode, enum arm_auto_incmodes code) { /* If we are soft float and we do not have ldrd then all auto increment forms are ok. */ @@ -31620,7 +31620,7 @@ arm_validize_comparison (rtx *comparison, rtx * op1, rtx * op2) { enum rtx_code code = GET_CODE (*comparison); int code_int; - enum machine_mode mode = (GET_MODE (*op1) == VOIDmode) + machine_mode mode = (GET_MODE (*op1) == VOIDmode) ? GET_MODE (*op2) : GET_MODE (*op1); gcc_assert (GET_MODE (*op1) != VOIDmode || GET_MODE (*op2) != VOIDmode); @@ -31722,7 +31722,7 @@ arm_block_set_non_vect_profit_p (rtx val, static bool arm_block_set_vect_profit_p (unsigned HOST_WIDE_INT length, unsigned HOST_WIDE_INT align, - enum machine_mode mode) + machine_mode mode) { int num; bool unaligned_p = ((align & 3) != 0); @@ -31760,7 +31760,7 @@ arm_block_set_unaligned_vect (rtx dstbase, rtx val_elt, val_vec, reg; rtx rval[MAX_VECT_LEN]; rtx (*gen_func) (rtx, rtx); - enum machine_mode mode; + machine_mode mode; unsigned HOST_WIDE_INT v = value; gcc_assert ((align & 0x3) != 0); @@ -31851,7 +31851,7 @@ arm_block_set_aligned_vect (rtx dstbase, rtx dst, addr, mem; rtx val_elt, val_vec, reg; rtx rval[MAX_VECT_LEN]; - enum machine_mode mode; + machine_mode mode; unsigned HOST_WIDE_INT v = value; gcc_assert ((align & 0x3) == 0); @@ -31962,7 +31962,7 @@ arm_block_set_unaligned_non_vect (rtx dstbase, unsigned int i; rtx dst, addr, mem; rtx val_exp, val_reg, reg; - enum machine_mode mode; + machine_mode mode; HOST_WIDE_INT v = value; gcc_assert (align == 1 || align == 2); |