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authorIlya Leoshkevich <iii@linux.ibm.com>2021-01-05 20:55:09 +0100
committerIlya Leoshkevich <iii@linux.ibm.com>2021-03-04 14:33:41 +0100
commite52ef6e60d7a6d6f57b67415c73621ccc79d5440 (patch)
tree748d8b9122bf5fc6a66e7ea0e7bb06dcfd8c4c1c /gcc/config
parentaf60228addb5a8b6294d2ba9e81e134d359ca043 (diff)
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Add input_modes parameter to TARGET_MD_ASM_ADJUST hook
If TARGET_MD_ASM_ADJUST changes a mode of an input operand (which should be ok as long as the hook itself as well as after_md_seq make up for it), input_mode will contain stale information. It might be tempting to fix this by removing input_mode altogether and just using GET_MODE (), but this will not work correctly with constants. So add input_modes parameter and document that it should be updated whenever inputs parameter is updated. gcc/ChangeLog: 2021-01-05 Ilya Leoshkevich <iii@linux.ibm.com> * cfgexpand.c (expand_asm_loc): Pass new parameter. (expand_asm_stmt): Likewise. * config/arm/aarch-common-protos.h (arm_md_asm_adjust): Add new parameter. * config/arm/aarch-common.c (arm_md_asm_adjust): Likewise. * config/arm/arm.c (thumb1_md_asm_adjust): Likewise. * config/cris/cris.c (cris_md_asm_adjust): Likewise. * config/i386/i386.c (ix86_md_asm_adjust): Likewise. * config/mn10300/mn10300.c (mn10300_md_asm_adjust): Likewise. * config/nds32/nds32.c (nds32_md_asm_adjust): Likewise. * config/pdp11/pdp11.c (pdp11_md_asm_adjust): Likewise. * config/rs6000/rs6000.c (rs6000_md_asm_adjust): Likewise. * config/vax/vax.c (vax_md_asm_adjust): Likewise. * config/visium/visium.c (visium_md_asm_adjust): Likewise. * doc/tm.texi (md_asm_adjust): Likewise. * target.def (md_asm_adjust): Likewise.
Diffstat (limited to 'gcc/config')
-rw-r--r--gcc/config/arm/aarch-common-protos.h8
-rw-r--r--gcc/config/arm/aarch-common.c7
-rw-r--r--gcc/config/arm/arm.c14
-rw-r--r--gcc/config/cris/cris.c7
-rw-r--r--gcc/config/i386/i386.c7
-rw-r--r--gcc/config/mn10300/mn10300.c7
-rw-r--r--gcc/config/nds32/nds32.c1
-rw-r--r--gcc/config/pdp11/pdp11.c9
-rw-r--r--gcc/config/rs6000/rs6000.c7
-rw-r--r--gcc/config/vax/vax.c3
-rw-r--r--gcc/config/visium/visium.c12
11 files changed, 47 insertions, 35 deletions
diff --git a/gcc/config/arm/aarch-common-protos.h b/gcc/config/arm/aarch-common-protos.h
index 7a9cf3d..b6171e8 100644
--- a/gcc/config/arm/aarch-common-protos.h
+++ b/gcc/config/arm/aarch-common-protos.h
@@ -144,9 +144,9 @@ struct cpu_cost_table
const struct vector_cost_table vect;
};
-rtx_insn *
-arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs);
+rtx_insn *arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints,
+ vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs);
#endif /* GCC_AARCH_COMMON_PROTOS_H */
diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c
index 6ff4215..24711d5 100644
--- a/gcc/config/arm/aarch-common.c
+++ b/gcc/config/arm/aarch-common.c
@@ -531,9 +531,10 @@ arm_mac_accumulator_is_mul_result (rtx producer, rtx consumer)
We implement asm flag outputs. */
rtx_insn *
-arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
+arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints, vec<rtx> & /*clobbers*/,
+ HARD_REG_SET & /*clobbered_regs*/)
{
bool saw_asm_flag = false;
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d254f41..49635bc 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -328,9 +328,10 @@ static unsigned int arm_hard_regno_nregs (unsigned int, machine_mode);
static bool arm_hard_regno_mode_ok (unsigned int, machine_mode);
static bool arm_modes_tieable_p (machine_mode, machine_mode);
static HOST_WIDE_INT arm_constant_alignment (const_tree, HOST_WIDE_INT);
-static rtx_insn * thumb1_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &, vec<rtx> &,
- HARD_REG_SET &);
+static rtx_insn *thumb1_md_asm_adjust (vec<rtx> &, vec<rtx> &,
+ vec<machine_mode> &,
+ vec<const char *> &, vec<rtx> &,
+ HARD_REG_SET &);
/* Table of machine attributes. */
static const struct attribute_spec arm_attribute_table[] =
@@ -33915,9 +33916,10 @@ arm_run_selftests (void)
Unlike the arm version, we do NOT implement asm flag outputs. */
rtx_insn *
-thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
+thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints, vec<rtx> & /*clobbers*/,
+ HARD_REG_SET & /*clobbered_regs*/)
{
for (unsigned i = 0, n = outputs.length (); i < n; ++i)
if (strncmp (constraints[i], "=@cc", 4) == 0)
diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c
index 0774ed8..42f0a52 100644
--- a/gcc/config/cris/cris.c
+++ b/gcc/config/cris/cris.c
@@ -150,7 +150,7 @@ static rtx cris_function_incoming_arg (cumulative_args_t,
static void cris_function_arg_advance (cumulative_args_t,
const function_arg_info &);
static rtx_insn *cris_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &,
+ vec<machine_mode> &, vec<const char *> &,
vec<rtx> &, HARD_REG_SET &);
static void cris_option_override (void);
@@ -3501,8 +3501,9 @@ cris_function_arg_advance (cumulative_args_t ca_v,
static rtx_insn *
cris_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &inputs,
- vec<const char *> &constraints,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
/* For the time being, all asms clobber condition codes.
Revisit when there's a reasonable use for inputs/outputs
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 6672da5..2603333 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -21373,9 +21373,10 @@ ix86_c_mode_for_suffix (char suffix)
with the old cc0-based compiler. */
static rtx_insn *
-ix86_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+ix86_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
bool saw_asm_flag = false;
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index bdacade..c1c2e6e 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -2847,9 +2847,10 @@ mn10300_conditional_register_usage (void)
with the old cc0-based compiler. */
static rtx_insn *
-mn10300_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
- vec<const char *> &/*constraints*/,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+mn10300_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
clobbers.safe_push (gen_rtx_REG (CCmode, CC_REG));
SET_HARD_REG_BIT (clobbered_regs, CC_REG);
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index 226da0b..7217d78 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -4197,6 +4197,7 @@ nds32_option_override (void)
static rtx_insn *
nds32_md_asm_adjust (vec<rtx> &outputs ATTRIBUTE_UNUSED,
vec<rtx> &inputs ATTRIBUTE_UNUSED,
+ vec<machine_mode> &input_modes ATTRIBUTE_UNUSED,
vec<const char *> &constraints ATTRIBUTE_UNUSED,
vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
{
diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c
index bd6e0dc..eb3bea4 100644
--- a/gcc/config/pdp11/pdp11.c
+++ b/gcc/config/pdp11/pdp11.c
@@ -155,7 +155,7 @@ static bool pdp11_rtx_costs (rtx, machine_mode, int, int, int *, bool);
static int pdp11_addr_cost (rtx, machine_mode, addr_space_t, bool);
static int pdp11_insn_cost (rtx_insn *insn, bool speed);
static rtx_insn *pdp11_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &,
+ vec<machine_mode> &, vec<const char *> &,
vec<rtx> &, HARD_REG_SET &);
static bool pdp11_return_in_memory (const_tree, const_tree);
static rtx pdp11_function_value (const_tree, const_tree, bool);
@@ -2139,9 +2139,10 @@ pdp11_cmp_length (rtx *operands, int words)
compiler. */
static rtx_insn *
-pdp11_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
- vec<const char *> &/*constraints*/,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+pdp11_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
clobbers.safe_push (gen_rtx_REG (CCmode, CC_REGNUM));
SET_HARD_REG_BIT (clobbered_regs, CC_REGNUM);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 71a54ed..cf8e5d8 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3412,9 +3412,10 @@ rs6000_builtin_mask_calculate (void)
not such a great idea. */
static rtx_insn *
-rs6000_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
- vec<const char *> &/*constraints*/,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+rs6000_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
clobbers.safe_push (gen_rtx_REG (SImode, CA_REGNO));
SET_HARD_REG_BIT (clobbered_regs, CA_REGNO);
diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c
index fe4c14e..726c371 100644
--- a/gcc/config/vax/vax.c
+++ b/gcc/config/vax/vax.c
@@ -56,7 +56,7 @@ static int vax_address_cost (rtx, machine_mode, addr_space_t, bool);
static bool vax_rtx_costs (rtx, machine_mode, int, int, int *, bool);
static machine_mode vax_cc_modes_compatible (machine_mode, machine_mode);
static rtx_insn *vax_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &,
+ vec<machine_mode> &, vec<const char *> &,
vec<rtx> &, HARD_REG_SET &);
static rtx vax_function_arg (cumulative_args_t, const function_arg_info &);
static void vax_function_arg_advance (cumulative_args_t,
@@ -1174,6 +1174,7 @@ vax_cc_modes_compatible (machine_mode m1, machine_mode m2)
static rtx_insn *
vax_md_asm_adjust (vec<rtx> &outputs ATTRIBUTE_UNUSED,
vec<rtx> &inputs ATTRIBUTE_UNUSED,
+ vec<machine_mode> &input_modes ATTRIBUTE_UNUSED,
vec<const char *> &constraints ATTRIBUTE_UNUSED,
vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
{
diff --git a/gcc/config/visium/visium.c b/gcc/config/visium/visium.c
index e0b88be..7eb2248 100644
--- a/gcc/config/visium/visium.c
+++ b/gcc/config/visium/visium.c
@@ -188,8 +188,9 @@ static bool visium_frame_pointer_required (void);
static tree visium_build_builtin_va_list (void);
static rtx_insn *visium_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &,
- vec<rtx> &, HARD_REG_SET &);
+ vec<machine_mode> &,
+ vec<const char *> &, vec<rtx> &,
+ HARD_REG_SET &);
static bool visium_legitimate_constant_p (machine_mode, rtx);
@@ -791,9 +792,10 @@ visium_conditional_register_usage (void)
the original cc0-based compiler. */
static rtx_insn *
-visium_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
- vec<const char *> &/*constraints*/,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+visium_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
clobbers.safe_push (gen_rtx_REG (CCmode, FLAGS_REGNUM));
SET_HARD_REG_BIT (clobbered_regs, FLAGS_REGNUM);