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-rw-r--r--gcc/cfgexpand.c16
-rw-r--r--gcc/config/arm/aarch-common-protos.h8
-rw-r--r--gcc/config/arm/aarch-common.c7
-rw-r--r--gcc/config/arm/arm.c14
-rw-r--r--gcc/config/cris/cris.c7
-rw-r--r--gcc/config/i386/i386.c7
-rw-r--r--gcc/config/mn10300/mn10300.c7
-rw-r--r--gcc/config/nds32/nds32.c1
-rw-r--r--gcc/config/pdp11/pdp11.c9
-rw-r--r--gcc/config/rs6000/rs6000.c7
-rw-r--r--gcc/config/vax/vax.c3
-rw-r--r--gcc/config/visium/visium.c12
-rw-r--r--gcc/doc/tm.texi10
-rw-r--r--gcc/target.def13
14 files changed, 69 insertions, 52 deletions
diff --git a/gcc/cfgexpand.c b/gcc/cfgexpand.c
index aef9e91..a6b48d3 100644
--- a/gcc/cfgexpand.c
+++ b/gcc/cfgexpand.c
@@ -2880,6 +2880,7 @@ expand_asm_loc (tree string, int vol, location_t locus)
rtx asm_op, clob;
unsigned i, nclobbers;
auto_vec<rtx> input_rvec, output_rvec;
+ auto_vec<machine_mode> input_mode;
auto_vec<const char *> constraints;
auto_vec<rtx> clobber_rvec;
HARD_REG_SET clobbered_regs;
@@ -2889,9 +2890,8 @@ expand_asm_loc (tree string, int vol, location_t locus)
clobber_rvec.safe_push (clob);
if (targetm.md_asm_adjust)
- targetm.md_asm_adjust (output_rvec, input_rvec,
- constraints, clobber_rvec,
- clobbered_regs);
+ targetm.md_asm_adjust (output_rvec, input_rvec, input_mode,
+ constraints, clobber_rvec, clobbered_regs);
asm_op = body;
nclobbers = clobber_rvec.length ();
@@ -3068,8 +3068,8 @@ expand_asm_stmt (gasm *stmt)
return;
}
- /* There are some legacy diagnostics in here, and also avoids a
- sixth parameger to targetm.md_asm_adjust. */
+ /* There are some legacy diagnostics in here, and also avoids an extra
+ parameter to targetm.md_asm_adjust. */
save_input_location s_i_l(locus);
unsigned noutputs = gimple_asm_noutputs (stmt);
@@ -3420,9 +3420,9 @@ expand_asm_stmt (gasm *stmt)
the flags register. */
rtx_insn *after_md_seq = NULL;
if (targetm.md_asm_adjust)
- after_md_seq = targetm.md_asm_adjust (output_rvec, input_rvec,
- constraints, clobber_rvec,
- clobbered_regs);
+ after_md_seq
+ = targetm.md_asm_adjust (output_rvec, input_rvec, input_mode,
+ constraints, clobber_rvec, clobbered_regs);
/* Do not allow the hook to change the output and input count,
lest it mess up the operand numbering. */
diff --git a/gcc/config/arm/aarch-common-protos.h b/gcc/config/arm/aarch-common-protos.h
index 7a9cf3d..b6171e8 100644
--- a/gcc/config/arm/aarch-common-protos.h
+++ b/gcc/config/arm/aarch-common-protos.h
@@ -144,9 +144,9 @@ struct cpu_cost_table
const struct vector_cost_table vect;
};
-rtx_insn *
-arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs);
+rtx_insn *arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints,
+ vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs);
#endif /* GCC_AARCH_COMMON_PROTOS_H */
diff --git a/gcc/config/arm/aarch-common.c b/gcc/config/arm/aarch-common.c
index 6ff4215..24711d5 100644
--- a/gcc/config/arm/aarch-common.c
+++ b/gcc/config/arm/aarch-common.c
@@ -531,9 +531,10 @@ arm_mac_accumulator_is_mul_result (rtx producer, rtx consumer)
We implement asm flag outputs. */
rtx_insn *
-arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
+arm_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints, vec<rtx> & /*clobbers*/,
+ HARD_REG_SET & /*clobbered_regs*/)
{
bool saw_asm_flag = false;
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index d254f41..49635bc 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -328,9 +328,10 @@ static unsigned int arm_hard_regno_nregs (unsigned int, machine_mode);
static bool arm_hard_regno_mode_ok (unsigned int, machine_mode);
static bool arm_modes_tieable_p (machine_mode, machine_mode);
static HOST_WIDE_INT arm_constant_alignment (const_tree, HOST_WIDE_INT);
-static rtx_insn * thumb1_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &, vec<rtx> &,
- HARD_REG_SET &);
+static rtx_insn *thumb1_md_asm_adjust (vec<rtx> &, vec<rtx> &,
+ vec<machine_mode> &,
+ vec<const char *> &, vec<rtx> &,
+ HARD_REG_SET &);
/* Table of machine attributes. */
static const struct attribute_spec arm_attribute_table[] =
@@ -33915,9 +33916,10 @@ arm_run_selftests (void)
Unlike the arm version, we do NOT implement asm flag outputs. */
rtx_insn *
-thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &/*clobbers*/, HARD_REG_SET &/*clobbered_regs*/)
+thumb1_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints, vec<rtx> & /*clobbers*/,
+ HARD_REG_SET & /*clobbered_regs*/)
{
for (unsigned i = 0, n = outputs.length (); i < n; ++i)
if (strncmp (constraints[i], "=@cc", 4) == 0)
diff --git a/gcc/config/cris/cris.c b/gcc/config/cris/cris.c
index 0774ed8..42f0a52 100644
--- a/gcc/config/cris/cris.c
+++ b/gcc/config/cris/cris.c
@@ -150,7 +150,7 @@ static rtx cris_function_incoming_arg (cumulative_args_t,
static void cris_function_arg_advance (cumulative_args_t,
const function_arg_info &);
static rtx_insn *cris_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &,
+ vec<machine_mode> &, vec<const char *> &,
vec<rtx> &, HARD_REG_SET &);
static void cris_option_override (void);
@@ -3501,8 +3501,9 @@ cris_function_arg_advance (cumulative_args_t ca_v,
static rtx_insn *
cris_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &inputs,
- vec<const char *> &constraints,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
/* For the time being, all asms clobber condition codes.
Revisit when there's a reasonable use for inputs/outputs
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index 6672da5..2603333 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -21373,9 +21373,10 @@ ix86_c_mode_for_suffix (char suffix)
with the old cc0-based compiler. */
static rtx_insn *
-ix86_md_asm_adjust (vec<rtx> &outputs, vec<rtx> &/*inputs*/,
- vec<const char *> &constraints,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+ix86_md_asm_adjust (vec<rtx> &outputs, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> &constraints, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
bool saw_asm_flag = false;
diff --git a/gcc/config/mn10300/mn10300.c b/gcc/config/mn10300/mn10300.c
index bdacade..c1c2e6e 100644
--- a/gcc/config/mn10300/mn10300.c
+++ b/gcc/config/mn10300/mn10300.c
@@ -2847,9 +2847,10 @@ mn10300_conditional_register_usage (void)
with the old cc0-based compiler. */
static rtx_insn *
-mn10300_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
- vec<const char *> &/*constraints*/,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+mn10300_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
clobbers.safe_push (gen_rtx_REG (CCmode, CC_REG));
SET_HARD_REG_BIT (clobbered_regs, CC_REG);
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index 226da0b..7217d78 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -4197,6 +4197,7 @@ nds32_option_override (void)
static rtx_insn *
nds32_md_asm_adjust (vec<rtx> &outputs ATTRIBUTE_UNUSED,
vec<rtx> &inputs ATTRIBUTE_UNUSED,
+ vec<machine_mode> &input_modes ATTRIBUTE_UNUSED,
vec<const char *> &constraints ATTRIBUTE_UNUSED,
vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
{
diff --git a/gcc/config/pdp11/pdp11.c b/gcc/config/pdp11/pdp11.c
index bd6e0dc..eb3bea4 100644
--- a/gcc/config/pdp11/pdp11.c
+++ b/gcc/config/pdp11/pdp11.c
@@ -155,7 +155,7 @@ static bool pdp11_rtx_costs (rtx, machine_mode, int, int, int *, bool);
static int pdp11_addr_cost (rtx, machine_mode, addr_space_t, bool);
static int pdp11_insn_cost (rtx_insn *insn, bool speed);
static rtx_insn *pdp11_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &,
+ vec<machine_mode> &, vec<const char *> &,
vec<rtx> &, HARD_REG_SET &);
static bool pdp11_return_in_memory (const_tree, const_tree);
static rtx pdp11_function_value (const_tree, const_tree, bool);
@@ -2139,9 +2139,10 @@ pdp11_cmp_length (rtx *operands, int words)
compiler. */
static rtx_insn *
-pdp11_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
- vec<const char *> &/*constraints*/,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+pdp11_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
clobbers.safe_push (gen_rtx_REG (CCmode, CC_REGNUM));
SET_HARD_REG_BIT (clobbered_regs, CC_REGNUM);
diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 71a54ed..cf8e5d8 100644
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -3412,9 +3412,10 @@ rs6000_builtin_mask_calculate (void)
not such a great idea. */
static rtx_insn *
-rs6000_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
- vec<const char *> &/*constraints*/,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+rs6000_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
clobbers.safe_push (gen_rtx_REG (SImode, CA_REGNO));
SET_HARD_REG_BIT (clobbered_regs, CA_REGNO);
diff --git a/gcc/config/vax/vax.c b/gcc/config/vax/vax.c
index fe4c14e..726c371 100644
--- a/gcc/config/vax/vax.c
+++ b/gcc/config/vax/vax.c
@@ -56,7 +56,7 @@ static int vax_address_cost (rtx, machine_mode, addr_space_t, bool);
static bool vax_rtx_costs (rtx, machine_mode, int, int, int *, bool);
static machine_mode vax_cc_modes_compatible (machine_mode, machine_mode);
static rtx_insn *vax_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &,
+ vec<machine_mode> &, vec<const char *> &,
vec<rtx> &, HARD_REG_SET &);
static rtx vax_function_arg (cumulative_args_t, const function_arg_info &);
static void vax_function_arg_advance (cumulative_args_t,
@@ -1174,6 +1174,7 @@ vax_cc_modes_compatible (machine_mode m1, machine_mode m2)
static rtx_insn *
vax_md_asm_adjust (vec<rtx> &outputs ATTRIBUTE_UNUSED,
vec<rtx> &inputs ATTRIBUTE_UNUSED,
+ vec<machine_mode> &input_modes ATTRIBUTE_UNUSED,
vec<const char *> &constraints ATTRIBUTE_UNUSED,
vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
{
diff --git a/gcc/config/visium/visium.c b/gcc/config/visium/visium.c
index e0b88be..7eb2248 100644
--- a/gcc/config/visium/visium.c
+++ b/gcc/config/visium/visium.c
@@ -188,8 +188,9 @@ static bool visium_frame_pointer_required (void);
static tree visium_build_builtin_va_list (void);
static rtx_insn *visium_md_asm_adjust (vec<rtx> &, vec<rtx> &,
- vec<const char *> &,
- vec<rtx> &, HARD_REG_SET &);
+ vec<machine_mode> &,
+ vec<const char *> &, vec<rtx> &,
+ HARD_REG_SET &);
static bool visium_legitimate_constant_p (machine_mode, rtx);
@@ -791,9 +792,10 @@ visium_conditional_register_usage (void)
the original cc0-based compiler. */
static rtx_insn *
-visium_md_asm_adjust (vec<rtx> &/*outputs*/, vec<rtx> &/*inputs*/,
- vec<const char *> &/*constraints*/,
- vec<rtx> &clobbers, HARD_REG_SET &clobbered_regs)
+visium_md_asm_adjust (vec<rtx> & /*outputs*/, vec<rtx> & /*inputs*/,
+ vec<machine_mode> & /*input_modes*/,
+ vec<const char *> & /*constraints*/, vec<rtx> &clobbers,
+ HARD_REG_SET &clobbered_regs)
{
clobbers.safe_push (gen_rtx_REG (CCmode, FLAGS_REGNUM));
SET_HARD_REG_BIT (clobbered_regs, FLAGS_REGNUM);
diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi
index a25ca6c..b272fa4 100644
--- a/gcc/doc/tm.texi
+++ b/gcc/doc/tm.texi
@@ -11491,15 +11491,17 @@ from shared libraries (DLLs).
You need not define this macro if it would always evaluate to zero.
@end defmac
-@deftypefn {Target Hook} {rtx_insn *} TARGET_MD_ASM_ADJUST (vec<rtx>& @var{outputs}, vec<rtx>& @var{inputs}, vec<const char *>& @var{constraints}, vec<rtx>& @var{clobbers}, HARD_REG_SET& @var{clobbered_regs})
+@deftypefn {Target Hook} {rtx_insn *} TARGET_MD_ASM_ADJUST (vec<rtx>& @var{outputs}, vec<rtx>& @var{inputs}, vec<machine_mode>& @var{input_modes}, vec<const char *>& @var{constraints}, vec<rtx>& @var{clobbers}, HARD_REG_SET& @var{clobbered_regs})
This target hook may add @dfn{clobbers} to @var{clobbers} and
@var{clobbered_regs} for any hard regs the port wishes to automatically
clobber for an asm. The @var{outputs} and @var{inputs} may be inspected
to avoid clobbering a register that is already used by the asm.
-It may modify the @var{outputs}, @var{inputs}, and @var{constraints}
-as necessary for other pre-processing. In this case the return value is
-a sequence of insns to emit after the asm.
+It may modify the @var{outputs}, @var{inputs}, @var{input_modes}, and
+@var{constraints} as necessary for other pre-processing. In this case the
+return value is a sequence of insns to emit after the asm. Note that
+changes to @var{inputs} must be accompanied by the corresponding changes
+to @var{input_modes}.
@end deftypefn
@defmac MATH_LIBRARY
diff --git a/gcc/target.def b/gcc/target.def
index d9e151b..d7b94bd 100644
--- a/gcc/target.def
+++ b/gcc/target.def
@@ -4172,12 +4172,15 @@ DEFHOOK
clobber for an asm. The @var{outputs} and @var{inputs} may be inspected\n\
to avoid clobbering a register that is already used by the asm.\n\
\n\
-It may modify the @var{outputs}, @var{inputs}, and @var{constraints}\n\
-as necessary for other pre-processing. In this case the return value is\n\
-a sequence of insns to emit after the asm.",
+It may modify the @var{outputs}, @var{inputs}, @var{input_modes}, and\n\
+@var{constraints} as necessary for other pre-processing. In this case the\n\
+return value is a sequence of insns to emit after the asm. Note that\n\
+changes to @var{inputs} must be accompanied by the corresponding changes\n\
+to @var{input_modes}.",
rtx_insn *,
- (vec<rtx>& outputs, vec<rtx>& inputs, vec<const char *>& constraints,
- vec<rtx>& clobbers, HARD_REG_SET& clobbered_regs),
+ (vec<rtx>& outputs, vec<rtx>& inputs, vec<machine_mode>& input_modes,
+ vec<const char *>& constraints, vec<rtx>& clobbers,
+ HARD_REG_SET& clobbered_regs),
NULL)
/* This target hook allows the backend to specify a calling convention
generated by cgit v1.1 at 2024-11-02 08:47:13 +0000