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| author | Kito Cheng <kito.cheng@sifive.com> | 2022-11-05 17:01:02 -0700 |
|---|---|---|
| committer | Kito Cheng <kito.cheng@sifive.com> | 2022-12-19 15:57:48 +0800 |
| commit | e4337398620098f96a7680ce748c9da178514acf (patch) | |
| tree | db6b32cf4ea982969225f264e6abe51c355e3fb3 /gcc/config | |
| parent | e2e154fe5bac0f62cc8bfe59165c742885490a79 (diff) | |
| download | gcc-e4337398620098f96a7680ce748c9da178514acf.zip gcc-e4337398620098f96a7680ce748c9da178514acf.tar.gz gcc-e4337398620098f96a7680ce748c9da178514acf.tar.bz2 | |
RISC-V: Fix RVV related testsuite
Use wrapper of riscv_vector.h for RVV related testcases,
more detail see https://gcc.gnu.org/pipermail/gcc-patches/2022-October/603140.html
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/mov-1.c: Use double quotes to
include riscv_vector.h rather than angle brackets.
* gcc.target/riscv/rvv/base/mov-10.c: Ditto.
* gcc.target/riscv/rvv/base/mov-11.c: Ditto.
* gcc.target/riscv/rvv/base/mov-12.c: Ditto.
* gcc.target/riscv/rvv/base/mov-13.c: Ditto.
* gcc.target/riscv/rvv/base/mov-2.c: Ditto.
* gcc.target/riscv/rvv/base/mov-3.c: Ditto.
* gcc.target/riscv/rvv/base/mov-4.c: Ditto.
* gcc.target/riscv/rvv/base/mov-5.c: Ditto.
* gcc.target/riscv/rvv/base/mov-6.c: Ditto.
* gcc.target/riscv/rvv/base/mov-7.c: Ditto.
* gcc.target/riscv/rvv/base/mov-8.c: Ditto.
* gcc.target/riscv/rvv/base/mov-9.c: Ditto.
* gcc.target/riscv/rvv/base/vread_csr.c: Ditto.
* gcc.target/riscv/rvv/base/vsetvl-1.c: Ditto.
* gcc.target/riscv/rvv/base/vwrite_csr.c: Ditto.
Diffstat (limited to 'gcc/config')
0 files changed, 0 insertions, 0 deletions