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| author | Uros Bizjak <ubizjak@gmail.com> | 2021-12-24 17:09:36 +0100 |
|---|---|---|
| committer | Uros Bizjak <ubizjak@gmail.com> | 2021-12-24 17:09:36 +0100 |
| commit | 8f921393e339090566c1589d81009caa954de90d (patch) | |
| tree | 9e3d67b60b2217fa0ea52e0fc6d2ad9be49d1295 /gcc/config | |
| parent | 43dadcf3e7b0cba5a3ed3a8414b77e3fd75dfcd0 (diff) | |
| download | gcc-8f921393e339090566c1589d81009caa954de90d.zip gcc-8f921393e339090566c1589d81009caa954de90d.tar.gz gcc-8f921393e339090566c1589d81009caa954de90d.tar.bz2 | |
i386: Add V2SFmode DIV insn pattern [PR95046, PR103797]
Use V4SFmode "DIVPS X,Y" with [y0, y1, 1.0f, 1.0f] as a divisor
to avoid division by zero.
2021-12-24 Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog:
PR target/95046
PR target/103797
* config/i386/mmx.md (divv2sf3): New instruction pattern.
gcc/testsuite/ChangeLog:
PR target/95046
PR target/103797
* gcc.target/i386/pr95046-1.c (test_div): Add.
(dg-options): Add -mno-recip.
Diffstat (limited to 'gcc/config')
| -rw-r--r-- | gcc/config/i386/mmx.md | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md index 6c5cbcf..5a57556 100644 --- a/gcc/config/i386/mmx.md +++ b/gcc/config/i386/mmx.md @@ -523,6 +523,26 @@ (set_attr "prefix" "*,orig,vex") (set_attr "mode" "V2SF,V4SF,V4SF")]) +(define_expand "divv2sf3" + [(set (match_operand:V2SF 0 "register_operand") + (div:V2SF (match_operand:V2SF 1 "register_operand") + (match_operand:V2SF 2 "register_operand")))] + "TARGET_MMX_WITH_SSE" +{ + rtx op0 = lowpart_subreg (V4SFmode, operands[0], + GET_MODE (operands[0])); + rtx op1 = lowpart_subreg (V4SFmode, operands[1], + GET_MODE (operands[1])); + rtx op2 = gen_rtx_VEC_CONCAT (V4SFmode, operands[2], + force_reg (V2SFmode, CONST1_RTX (V2SFmode))); + rtx tmp = gen_reg_rtx (V4SFmode); + + emit_insn (gen_rtx_SET (tmp, op2)); + + emit_insn (gen_divv4sf3 (op0, op1, tmp)); + DONE; +}) + (define_expand "mmx_<code>v2sf3" [(set (match_operand:V2SF 0 "register_operand") (smaxmin:V2SF |