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2024-01-04Update year range in copyright notice of binutils filesAlan Modra1-1/+1
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The newer update-copyright.py fixes file encoding too, removing cr/lf on binutils/bfdtest2.c and ld/testsuite/ld-cygwin/exe-export.exp, and embedded cr in binutils/testsuite/binutils-all/ar.exp string match.
2022-01-02Update year range in copyright notice of binutils filesAlan Modra1-1/+1
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
2021-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2020-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2019-01-01Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2018-04-09PowerPC inline PLT call supportAlan Modra1-0/+4
In addition to the existing relocs we need two more to mark all instructions in the call sequence, PLTCALL on the call itself (plus the toc restore insn for ppc64), and PLTSEQ on others. All relocations in a particular sequence have the same symbol. Example ppc64 ELFv2 assembly: .reloc .,R_PPC64_PLTSEQ,puts std 2,24(1) addis 12,2,puts@plt@ha # .reloc .,R_PPC64_PLT16_HA,puts ld 12,puts@plt@l(12) # .reloc .,R_PPC64_PLT16_LO_DS,puts .reloc .,R_PPC64_PLTSEQ,puts mtctr 12 .reloc .,R_PPC64_PLTCALL,puts bctrl ld 2,24(1) Example ppc32 -fPIC assembly: addis 12,30,puts+32768@plt@ha # .reloc .,R_PPC_PLT16_HA,puts+0x8000 lwz 12,12,puts+32768@plt@l # .reloc .,R_PPC_PLT16_LO,puts+0x8000 .reloc .,R_PPC_PLTSEQ,puts+32768 mtctr 12 .reloc .,R_PPC_PLTCALL,puts+32768 bctrl Marking sequences like this allows the linker to convert them to nops and a direct call if the target symbol turns out to be local. When the call is __tls_get_addr, each relocation shown above is paired with an R_PPC*_TLSLD or R_PPC*_TLSGD reloc to additionally mark the sequence for possible TLS optimization. The TLSLD or TLSGD relocs are emitted first. include/ * elf/ppc.h (R_PPC_PLTSEQ, R_PPC_PLTCALL): Define. * elf/ppc64.h (R_PPC64_PLTSEQ, R_PPC64_PLTCALL): Define. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add PLTSEQ and PLTCALL howtos. (is_plt_seq_reloc): New function. (ppc_elf_check_relocs): Handle PLTSEQ and PLTCALL relocs. (ppc_elf_tls_optimize): Handle inline plt call sequence. (ppc_elf_relax_section): Handle PLTCALL reloc. (ppc_elf_relocate_section): Nop out inline plt call sequence when resolving locally. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_PLTSEQ and R_PPC64_PLTCALL entries. Comment R_PPC64_TOCSAVE. (has_tls_get_addr_call): Correct comment. (is_branch_reloc): Add PLTCALL. (is_plt_seq_reloc): New function. (ppc64_elf_check_relocs): Handle PLT16_LO_DS reloc. Set has_tls_reloc for R_PPC64_TLSGD and R_PPC64_TLSLD. Create plt entry for R_PPC64_PLTCALL. (ppc64_elf_tls_optimize): Handle inline plt call sequence. (ppc_type_of_stub): Handle PLTCALL reloc. (toc_adjusting_stub_needed): Likewise. (ppc64_elf_relocate_section): Set "can_plt_call" for PLTCALL reloc insn. Nop out inline plt call sequence when resolving locally. Handle __tls_get_addr inline plt call optimization. elfcpp/ * powerpc.h (R_POWERPC_PLTSEQ, R_POWERPC_PLTCALL): Define. gold/ * powerpc.cc (Target_powerpc::Track_tls::maybe_skip_tls_get_addr_call): Handle inline plt sequence relocs. (Stub_table::Plt_stub_key::Plt_stub_key): Likewise. (Target_powerpc::Scan::reloc_needs_plt_for_ifunc): Likewise. (Target_powerpc::Relocate::relocate): Likewise.
2018-01-03Update year range in copyright notice of binutils filesAlan Modra1-1/+1
2017-09-05Missing relocation R_PPC_VLE_ADDR20 and add VLE flag to details in readelfAlexander Fedotov-B556131-0/+1
include/ * elf/ppc.h (R_PPC_VLE_ADDR20): New relocation. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_VLE_ADDR20. (ppc_elf_check_relocs): Handle it. (ppc_elf_vle_split20): New function. (ppc_elf_relocate_section): Handle R_PPC_VLE_ADDR20. binutils/ * readelf.c (get_elf_section_flags): Add VLE. (process_section_headers): Add VLE key to details. gas/ * config/tc-ppc.c (md_parse_option): Handle "mno-vle" flag. (ppc_elf_section_letter): New function. * config/tc-ppc.h (md_elf_section_letter): New. * testsuite/gas/elf/section10.d: Adjust for VLE.
2017-02-28PowerPC addpcis fixAlan Modra1-1/+5
This came up because I was looking at ld/tmpdir/addpcis.o and noticed the odd addends on REL16DX_HA. They ought to both be -4. The error crept in due REL16DX_HA howto being pc-relative (as indeed it should be), and code at gas/write.c:1001 after this comment /* Make it pc-relative. If the back-end code has not selected a pc-relative reloc, cancel the adjustment we do later on all pc-relative relocs. */ *not* cancelling the pc-relative adjustment. So I've made a dummy non-relative split reloc so that the generic code handles this, rather than attempting to add hacks later in md_apply_fix which would not be very robust. Having the new internal reloc also makes it easy to support addpcis rx,sym@ha as an equivalent to addpcis rx,(sym-0f)@ha 0: The patch also fixes overflow checking, which must test whether the addi will overflow too since @l relocs don't have any overflow check. Lastly, since I was poking at md_apply_fix, I arranged to have the generic gas/write.c code emit errors for subtraction expressions where we lack reloc support. include/ * elf/ppc64.h (R_PPC64_16DX_HA): New. Expand fake reloc comment. * elf/ppc.h (R_PPC_16DX_HA): Likewise. bfd/ * reloc.c (BFD_RELOC_PPC_16DX_HA): New. * elf64-ppc.c (ppc64_elf_howto_raw <R_PPC64_16DX_HA>): New howto. (ppc64_elf_reloc_type_lookup): Translate new bfd reloc. (ppc64_elf_ha_reloc): Correct overflow test on REL16DX_HA. (ppc64_elf_relocate_section): Likewise. * elf32-ppc.c (ppc_elf_howto_raw <R_PPC_16DX_HA>): New howto. (ppc_elf_reloc_type_lookup): Translate new bfd reloc. (ppc_elf_check_relocs): Handle R_PPC_16DX_HA to pacify gcc. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (md_assemble): Use BFD_RELOC_PPC_16DX_HA for addpcis. (md_apply_fix): Remove fx_subsy check. Move code converting to pcrel reloc earlier and handle BFD_RELOC_PPC_16DX_HA. Remove code emiiting errors on seeing fx_pcrel set on unexpected relocs, as that is done now by the generic code via.. * config/tc-ppc.h (TC_FORCE_RELOCATION_SUB_LOCAL): ..this. Define. (TC_VALIDATE_FIX_SUB): Define. ld/ * testsuite/ld-powerpc/addpcis.d: Define ext1 and ext2 at limits of addpcis range.
2017-01-02Update year range in copyright notice of all files.Alan Modra1-1/+1
2016-09-26PowerPC .gnu.attributesAlan Modra1-5/+12
This patch extends Tag_GNU_Power_ABI_FP to cover long double ABIs, makes the assembler warn about undefined tag values, and removes similar warnings from the linker. I think it is better to not warn in the linker about undefined tag values as future extensions to the tags then won't result in likely bogus warnings. This is consistent with the fact that an older linker won't warn on an entirely new tag. include/ * elf/ppc.h (Tag_GNU_Power_ABI_FP): Comment. bfd/ * elf-bfd.h (_bfd_elf_ppc_merge_fp_attributes): Declare. * elf32-ppc.c (_bfd_elf_ppc_merge_fp_attributes): New function. (ppc_elf_merge_obj_attributes): Use it. Don't copy first file attributes, merge them. Don't warn about undefined tag bits, or copy unknown values to output. * elf64-ppc.c (ppc64_elf_merge_private_bfd_data): Call _bfd_elf_ppc_merge_fp_attributes. binutils/ * readelf.c (display_power_gnu_attribute): Catch truncated section for all powerpc attributes. Display long double ABI. Don't capitalize words, except for names. Show known bits of tag values when some unknown bits are present. Whitespace fixes. gas/ * config/tc-ppc.c (ppc_elf_gnu_attribute): New function. (md_pseudo_table <ELF>): Handle "gnu_attribute". ld/ * testsuite/ld-powerpc/attr-gnu-4-4.s: Delete. * testsuite/ld-powerpc/attr-gnu-4-14.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-24.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-34.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-41.d: Delete. * testsuite/ld-powerpc/attr-gnu-4-32.d: Adjust expected warning. * testsuite/ld-powerpc/attr-gnu-8-23.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-01.d: Adjust expected output. * testsuite/ld-powerpc/attr-gnu-4-02.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-03.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-10.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-11.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-20.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-22.d: Likewise. * testsuite/ld-powerpc/attr-gnu-4-33.d: Likewise. * testsuite/ld-powerpc/attr-gnu-8-11.d: Likewise. * testsuite/ld-powerpc/powerpc.exp: Don't run deleted tests.
2016-06-07PowerPC VLEAlan Modra1-0/+13
VLE is an encoding, not a particular processor architecture, so it isn't really proper to select insns based on PPC_OPCODE_VLE. For example {"evaddw", VX (4, 512), VX_MASK, PPCSPE|PPCVLE, PPCNONE, {RS, RA, RB}}, {"vaddubs", VX (4, 512), VX_MASK, PPCVEC|PPCVLE, PPCNONE, {VD, VA, VB}}, shows two insns that have the same encoding, both available with VLE. Enabling both with VLE means we can't disassemble the second variant even if -Maltivec is given rather than -Mspe. Also, we don't check user assembly against the processor type as well as we could. Another problem is that when using the VLE encoding, insns from the main ppc opcode table are not available, except those using opcode 4 and 31. Correcting this revealed two errors in the ld testsuite, use of "nop" and "rfmci" when -mvle. This patch fixes those problems in the opcode table, and removes PPCNONE. I find a plain 0 distracts less from other values. In addition, I've implemented code to recognize some machine values from the apuinfo note present in ppc32 objects. It's not a complete disambiguation since we're lacking info to detect newer chips, but what we have should help with disassembly. include/ * elf/ppc.h (APUINFO_SECTION_NAME, APUINFO_LABEL, PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE: Define. opcodes/ * ppc-dis.c (ppc_opts): Delete extraneous parentheses. Default cpu for "vle" to e500. * ppc-opc.c (ALLOW8_SPRG): Remove PPC_OPCODE_VLE. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW, DCBT_EO): Likewise. (PPCNONE): Delete, substitute throughout. (powerpc_opcodes): Remove PPCVLE from "flags". Add to "deprecated" except for major opcode 4 and 31. (vle_opcodes <se_rfmci>): Add PPCRFMCI to flags. bfd/ * cpu-powerpc.c (powerpc_compatible): Allow bfd_mach_ppc_vle entry to match other 32-bit archs. * elf32-ppc.c (_bfd_elf_ppc_set_arch): New function. (ppc_elf_object_p): Call it. (ppc_elf_special_sections): Use APUINFO_SECTION_NAME. Fix overlong line. (APUINFO_SECTION_NAME, APUINFO_LABEL): Don't define here. * elf64-ppc.c (ppc64_elf_object_p): Call _bfd_elf_ppc_set_arch. * bfd-in.h (_bfd_elf_ppc_at_tls_transform, _bfd_elf_ppc_at_tprel_transform): Move to.. * elf-bfd.h: ..here. (_bfd_elf_ppc_set_arch): Declare. * bfd-in2.h: Regenerate. gas/ * config/tc-ppc.c (PPC_APUINFO_ISEL, PPC_APUINFO_PMR, PPC_APUINFO_RFMCI, PPC_APUINFO_CACHELCK, PPC_APUINFO_SPE, PPC_APUINFO_EFS, PPC_APUINFO_BRLOCK, PPC_APUINFO_VLE): Don't define. (ppc_setup_opcodes): Check vle disables powerpc_opcodes overridden by vle_opcodes, and that vle flag doesn't enable opcodes. Don't add vle_opcodes twice. (ppc_cleanup): Use APUINFO_SECTION_NAME and APUINFO_LABEL. ld/ * testsuite/ld-powerpc/apuinfo1.s: Delete nop. * testsuite/ld-powerpc/apuinfo-vle2.s: New. * testsuite/ld-powerpc/powerpc.exp: Use apuinfo-vle2.s.
2016-01-01Copyright update for binutilsAlan Modra1-1/+1
2015-11-11Add assembler, disassembler and linker support for power9.Peter Bergner1-0/+3
include/opcode/ * ppc.h (PPC_OPCODE_POWER9): New define. (PPC_OPCODE_VSX3): Likewise. opcodes/ * ppc-dis.c (ppc_opts): Add "power9" and "pwr9" entries. Add PPC_OPCODE_VSX3 to the vsx entry. (powerpc_init_dialect): Set default dialect to power9. * ppc-opc.c (insert_dcmxs, extract_dcmxs, insert_dxd, extract_dxd, insert_dxdn, extract_dxdn, insert_l0, extract_l0, insert_l1, extract_l1 insert_xtq6, extract_xtq6): New static functions. (insert_esync): Test for illegal L operand value. (DCMX, DCMXS, DXD, NDXD, L0, L1, RC, FC, UIM6, X_R, RIC, PRS, XSQ6, XTQ6, LRAND, IMM8, DQX, DQX_MASK, DX, DX_MASK, VXVAPS_MASK, VXVA,XVA, XX2VA, XVARC, XBF_MASK, XX2UIM4_MASK, XX2BFD_MASK, XX2DCMXS_MASK, XVA_MASK, XRLA_MASK, XBFRARB_MASK, XLRAND_MASK, POWER9, PPCVEC3, PPCVSX3): New defines. (powerpc_opcodes) <ps_cmpu0, ps_cmpo0, ps_cmpu1, ps_cmpo1, fcmpu, fcmpo, ftdiv, ftsqrt>: Use XBF_MASK. <mcrxr>: Use XBFRARB_MASK. <addpcis, bcdcfn., bcdcfsq., bcdcfz., bcdcpsgn., bcdctn., bcdctsq., bcdctz., bcds., bcdsetsgn., bcdsr., bcdtrunc., bcdus., bcdutrunc., cmpeqb, cmprb, cnttzd, cnttzd., cnttzw, cnttzw., copy, copy_first, cp_abort, darn, dtstsfi, dtstsfiq, extswsli, extswsli., ldat, ldmx, lwat, lxsd, lxsibzx, lxsihzx, lxssp, lxv, lxvb16x, lxvh8x, lxvl, lxvll, lxvwsx, lxvx, maddhd, maddhdu, maddld, mcrxrx, mfvsrld, modsd, modsw, modud, moduw, msgsync, mtvsrdd, mtvsrws, paste, paste., paste_last, rmieg, setb, slbieg, slbsync, stdat, stop, stwat, stxsd, stxsibx, stxsihx, stxssp, stxv, stxvb16x, stxvh8x, stxvl, stxvll, stxvx, subpcis, urfid, vbpermd, vclzlsbb, vcmpneb, vcmpneb., vcmpneh, vcmpneh., vcmpnew, vcmpnew., vcmpnezb, vcmpnezb., vcmpnezh, vcmpnezh., vcmpnezw, vcmpnezw., vctzb, vctzd, vctzh, vctzlsbb, vctzw, vextractd, vextractub, vextractuh, vextractuw, vextsb2d, vextsb2w, vextsh2d, vextsh2w, vextsw2d, vextublx, vextubrx, vextuhlx, vextuhrx, vextuwlx, vextuwrx, vinsertb, vinsertd, vinserth, vinsertw, vmul10cuq, vmul10ecuq, vmul10euq, vmul10uq, vnegd, vnegw, vpermr, vprtybd, vprtybq, vprtybw, vrldmi, vrldnm, vrlwmi, vrlwnm, vslv, vsrv, wait, xsabsqp, xsaddqp, xsaddqpo, xscmpeqdp, xscmpexpdp, xscmpexpqp, xscmpgedp, xscmpgtdp, xscmpnedp, xscmpoqp, xscmpuqp, xscpsgnqp, xscvdphp, xscvdpqp, xscvhpdp, xscvqpdp, xscvqpdpo, xscvqpsdz, xscvqpswz, xscvqpudz, xscvqpuwz, xscvsdqp, xscvudqp, xsdivqp, xsdivqpo, xsiexpdp, xsiexpqp, xsmaddqp, xsmaddqpo, xsmaxcdp, xsmaxjdp, xsmincdp, xsminjdp, xsmsubqp, xsmsubqpo, xsmulqp, xsmulqpo, xsnabsqp, xsnegqp, xsnmaddqp, xsnmaddqpo, xsnmsubqp, xsnmsubqpo, xsrqpi, xsrqpix, xsrqpxp, xssqrtqp, xssqrtqpo, xssubqp, xssubqpo, xststdcdp, xststdcqp, xststdcsp, xsxexpdp, xsxexpqp, xsxsigdp, xsxsigqp, xvcmpnedp, xvcmpnedp., xvcmpnesp, xvcmpnesp., xvcvhpsp, xvcvsphp, xviexpdp, xviexpsp, xvtstdcdp, xvtstdcsp, xvxexpdp, xvxexpsp, xvxsigdp, xvxsigsp, xxbrd, xxbrh, xxbrq, xxbrw, xxextractuw, xxinsertw, xxperm, xxpermr, xxspltib>: New instructions. <doze, nap, sleep, rvwinkle, waitasec, lxvx, stxvx>: Disable on POWER9. <tlbiel, tlbie, sync, slbmfev, slbmfee>: Add additional operands. include/elf/ * ppc.h (R_PPC_REL16DX_HA): New reloction. * ppc64.h (R_PPC64_REL16DX_HA): Likewise. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_REL16DX_HA. (ppc_elf_reloc_type_lookup): Handle R_PPC_REL16DX_HA. (ppc_elf_addr16_ha_reloc): Likewise. (ppc_elf_check_relocs): Likewise. (ppc_elf_relocate_section): Likewise. (is_insn_dq_form): Handle lxv and stxv instructions. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_REL16DX_HA. (ppc64_elf_reloc_type_lookup): Handle R_PPC64_REL16DX_HA. (ppc64_elf_ha_reloc): Likewise. (ppc64_elf_check_relocs): Likewise. (ppc64_elf_relocate_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Likewise. * reloc.c (BFD_RELOC_PPC_REL16DX_HA): New. elfcpp/ * powerpc.h (R_POWERPC_REL16DX_HA): Define. gas/ * doc/as.texinfo (Target PowerPC): Document -mpower9 and -mpwr9. * doc/c-ppc.texi (PowerPC-Opts): Likewise. * config/tc-ppc.c (md_show_usage): Likewise. (md_assemble): Handle BFD_RELOC_PPC_REL16DX_HA. (md_apply_fix): Likewise. (ppc_handle_align): Handle power9's group ending nop. gas/testsuite/ * gas/ppc/altivec3.s: New test. * gas/ppc/altivec3.d: Likewise. * gas/ppc/vsx3.s: Likewise. * gas/ppc/vsx3.d: Likewise. * gas/ppc/power9.s: Likewise. * gas/ppc/power9.d: Likewise. * gas/ppc/ppc.exp: Run them. * gas/ppc/power8.s <lxvx, lxvd2x, stxvx, stxvd2x>: Add new tests. * gas/ppc/power8.d: Likewise. * gas/ppc/vsx.s: <lxvx, stxvx>: Rename invalid mnemonics ... <lxvd2x, stxvd2x>: ...to this. * gas/ppc/vsx.d: Likewise. gold/ * gold/powerpc.cc (Powerpc_relocate_functions::addr16_dq): New function. (Powerpc_relocate_functions::addr16dx_ha): Likewise. (Target_powerpc::Scan::local): Handle R_POWERPC_REL16DX_HA. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Likewise. ld/testsuite/ * ld-powerpc/addpcis.d: New test. * ld-powerpc/addpcis.s: New test. * ld-powerpc/powerpc.exp: Run it.
2015-01-02ChangeLog rotatation and copyright year updateAlan Modra1-1/+1
2014-03-05Update copyright yearsAlan Modra1-2/+1
2013-10-30Replace DT_PPC_TLSOPT with DT_PPC_OPT.Alan Modra1-1/+2
This removes the DT_PPC_TLSOPT/DT_PPC64_TLSOPT dynamic tag and replaces it with DT_PPC_OPT/DT_PPC64_OPT tag to provide the same functionality and more. This isn't backwards compatible, but the TLSOPT tag hasn't been used since the tls optimisation support was never submitted to glibc. /include/elf/ * ppc.h (DT_PPC_TLSOPT): Delete. (DT_PPC_OPT, PPC_OPT_TLS): Define. * ppc64.h (DT_PPC64_TLSOPT): Delete. (DT_PPC64_OPT, PPC64_OPT_TLS, PPC64_OPT_MULTI_TOC): Define. bfd/ * elf32-ppc.c (ppc_elf_size_dynamic_sections): Use new DT_PPC_OPT tag to specify tls optimisation. * elf64-ppc.c (ppc64_elf_size_dynamic_sections): Likewise. (ppc64_elf_finish_dynamic_sections): Specify whether multiple toc pointers are used via DT_PPC64_OPT. binutils/ * readelf.c (get_ppc_dynamic_type): Replace PPC_TLSOPT with PPC_OPT. (get_ppc64_dynamic_type): Replace PPC64_TLSOPT with PPC64_OPT.
2012-05-14Add support for PowerPC VLE.James Lemke1-3/+24
2012-05-14 Catherine Moore <clm@codesourcery.com> * NEWS: Mention PowerPC VLE port. 2012-05-14 James Lemke <jwlemke@codesourcery.com> Catherine Moore <clm@codesourcery.com> bfd/ * bfd.c (bfd_lookup_section_flags): Add section parm. * ecoff.c (bfd_debug_section): Remove flag_info initializer. * elf-bfd.h (bfd_elf_section_data): Move in section_flag_info. (bfd_elf_lookup_section_flags): Add section parm. * elf32-ppc.c (is_ppc_vle): New function. (ppc_elf_modify_segment_map): New function. (elf_backend_modify_segment_map): Define. (has_vle_insns): New define. * elf32-ppc.h (ppc_elf_modify_segment_map): Declare. * elflink.c (bfd_elf_lookup_section_flags): Add return value & parm. Move in logic to omit / include a section. * libbfd-in.h (bfd_link_info): Add section parm. (bfd_generic_lookup_section_flags): Likewise. * reloc.c (bfd_generic_lookup_section_flags): Likewise. * section.c (bfd_section): Move out section_flag_info. (BFD_FAKE_SECTION): Remove flag_info initializer. * targets.c (_bfd_lookup_section_flags): Add section parm. 2012-05-14 Catherine Moore <clm@codesourcery.com> bfd/ * archures.c (bfd_mach_ppc_vle): New. * bfd-in2.h: Regenerated. * cpu-powerpc.c (bfd_powerpc_archs): New entry for vle. * elf32-ppc.c (split16_format_type): New enumeration. (ppc_elf_vle_split16): New function. (HOWTO): Add entries for R_PPC_VLE relocations. (ppc_elf_reloc_type_lookup): Handle PPC_VLE relocations. (ppc_elf_section_flags): New function. (ppc_elf_lookup_section_flags): New function. (ppc_elf_section_processing): New function. (ppc_elf_check_relocs): Handle PPC_VLE relocations. (ppc_elf_relocation_section): Likewise. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_section_flags): Define. (elf_backend_section_processing): Define. * elf32-ppc.h (ppc_elf_section_processing): Declare. * libbfd.h: Regenerated. * reloc.c (BFD_RELOC_PPC_VLE_REL8, BFD_RELOC_PPC_VLE_REL15, BFD_RELOC_PPC_VLE_REL24, BFD_RELOC_PPC_VLE_LO16A, BFD_RELOC_PPC_VLE_LO16D, BFD_RELOC_PPC_VLE_HI16A, BFD_RELOC_PPC_VLE_HI16D, BFD_RELOC_PPC_VLE_HA16A, BFD_RELOC_PPC_VLE_HA16D, BFD_RELOC_PPC_VLE_SDA21, BFD_RELOC_PPC_VLE_SDA21_LO, BFD_RELOC_PPC_VLE_SDAREL_LO16A, BFD_RELOC_PPC_VLE_SDAREL_LO16D, BFD_RELOC_PPC_VLE_SDAREL_HI16A, BFD_RELOC_PPC_VLE_SDAREL_HI16D, BFD_RELOC_PPC_VLE_SDAREL_HA16A, BFD_RELOC_PPC_VLE_SDAREL_HA16D): New bfd relocations. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (insn_validate): New func of existing code to call.. (ppc_setup_opcodes): ..from 2 places here. Revise for second (VLE) opcode table. Add #ifdef'd code to print opcode tables. 2012-05-14 James Lemke <jwlemke@codesourcery.com> gas/ * config/tc-ppc.c (ppc_setup_opcodes): Allow out-of-order for the VLE conditional branches. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/ * config/tc-ppc.c (PPC_VLE_SPLIT16A): New macro. (PPC_VLE_SPLIT16D): New macro. (PPC_VLE_LO16A): New macro. (PPC_VLE_LO16D): New macro. (PPC_VLE_HI16A): New macro. (PPC_VLE_HI16D): New macro. (PPC_VLE_HA16A): New macro. (PPC_VLE_HA16D): New macro. (PPC_APUINFO_VLE): New definition. (md_chars_to_number): New function. (md_parse_option): Check for combinations of little endian and -mvle. (md_show_usage): Document -mvle. (ppc_arch): Recognize VLE. (ppc_mach): Recognize bfd_mach_ppc_vle. (ppc_setup_opcodes): Print the opcode table if * config/tc-ppc.h (ppc_frag_check): Declare. * doc/c-ppc.texi: Document -mvle. * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> gas/ * config/tc-ppc.h (ppc_dw2_line_min_insn_length): Declare. (DWARF2_LINE_MIN_INSN_LENGTH): Redefine. * config/tc-ppc.c (ppc_dw2_line_min_insn_length): New. * dwarf2dbg.c (scale_addr_delta): Handle values of 1 for DWARF2_LINE_MIN_INSN_LENGTH. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> gas/testsuite/ * gas/ppc/ppc.exp: Run new tests. * gas/ppc/vle-reloc.d: New test. * gas/ppc/vle-reloc.s: New test. * gas/ppc/vle-simple-1.d: New test. * gas/ppc/vle-simple-1.s: New test. * gas/ppc/vle-simple-2.d: New test. * gas/ppc/vle-simple-2.s: New test. * gas/ppc/vle-simple-3.d: New test. * gas/ppc/vle-simple-3.s: New test. * gas/ppc/vle-simple-4.d: New test. * gas/ppc/vle-simple-4.s: New test. * gas/ppc/vle-simple-5.d: New test. * gas/ppc/vle-simple-5.s: New test. * gas/ppc/vle-simple-6.d: New test. * gas/ppc/vle-simple-6.s: New test. * gas/ppc/vle.d: New test. * gas/ppc/vle.s: New test. 2012-05-14 James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (SEC_PPC_VLE): Remove. 2012-05-14 Catherine Moore <clm@codesourcery.com> James Lemke <jwlemke@codesourcery.com> include/elf/ * ppc.h (R_PPC_VLE_REL8): New reloction. (R_PPC_VLE_REL15): Likewise. (R_PPC_VLE_REL24): Likewise. (R_PPC_VLE_LO16A): Likewise. (R_PPC_VLE_LO16D): Likewise. (R_PPC_VLE_HI16A): Likewise. (R_PPC_VLE_HI16D): Likewise. (R_PPC_VLE_HA16A): Likewise. (R_PPC_VLE_HA16D): Likewise. (R_PPC_VLE_SDA21): Likewise. (R_PPC_VLE_SDA21_LO): Likewise. (R_PPC_VLE_SDAREL_LO16A): Likewise. (R_PPC_VLE_SDAREL_LO16D): Likewise. (R_PPC_VLE_SDAREL_HI16A): Likewise. (R_PPC_VLE_SDAREL_HI16D): Likewise. (R_PPC_VLE_SDAREL_HA16A): Likewise. (R_PPC_VLE_SDAREL_HA16D): Likewise. (SEC_PPC_VLE): Remove. (PF_PPC_VLE): New program header flag. (SHF_PPC_VLE): New section header flag. (vle_opcodes, vle_num_opcodes): New. (VLE_OP): New macro. (VLE_OP_TO_SEG): New macro. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> include/opcode/ * ppc.h (PPC_OPCODE_VLE): New definition. (PPC_OP_SA): New macro. (PPC_OP_SE_VLE): New macro. (PPC_OP): Use a variable shift amount. (powerpc_operand): Update comments. (PPC_OPSHIFT_INV): New macro. (PPC_OPERAND_CR): Replace with... (PPC_OPERAND_CR_BIT): ...this and (PPC_OPERAND_CR_REG): ...this. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/ * ldlang.c (walk_wild_consider_section): Don't copy section_flag_list. Pass it to callback. (walk_wild_section_general): Pass section_flag_list to callback. (lang_add_section): Add sflag_list parm. Move out logic to keep / omit a section & call bfd_lookup_section_flags. (output_section_callback_fast): Add sflag_list parm. Add new parm to lang_add_section calls. (output_section_callback): Likewise. (check_section_callback): Add sflag_list parm. (lang_place_orphans): Add new parm to lang_add_section calls. (gc_section_callback): Add sflag_list parm. (find_relro_section_callback): Likewise. * ldlang.h (callback_t): Add flag_info parm. (lang_add_section): Add sflag_list parm. * emultempl/armelf.em (elf32_arm_add_stub_section): Add lang_add_section parm. * emultempl/beos.em (gld*_place_orphan): Likewise. * emultempl/elf32.em (gld*_place_orphan): Likewise. * emultempl/hppaelf.em (hppaelf_add_stub_section): Likewise. * emultempl/m68hc1xelf.em (m68hc11elf_add_stub_section): Likewise. * emultempl/mipself.em (mips_add_stub_section): Likewise. * emultempl/mmo.em (mmo_place_orphan): Likewise. * emultempl/pe.em (gld_*_place_orphan): Likewise. * emultempl/pep.em (gld_*_place_orphan): Likewise. * emultempl/ppc64elf.em (ppc_add_stub_section): Likewise. * emultempl/spuelf.em (spu_place_special_section): Likewise. * emultempl/vms.em (vms_place_orphan): Likewise. 2012-05-14 James Lemke <jwlemke@codesourcery.com> ld/testsuite/ * ld-powerpc/powerpc.exp: Create ppceabitests. * ld-powerpc/vle-multiseg.s: New. * ld-powerpc/vle-multiseg-1.d: New. * ld-powerpc/vle-multiseg-1.ld: New. * ld-powerpc/vle-multiseg-2.d: New. * ld-powerpc/vle-multiseg-2.ld: New. * ld-powerpc/vle-multiseg-3.d: New. * ld-powerpc/vle-multiseg-3.ld: New. * ld-powerpc/vle-multiseg-4.d: New. * ld-powerpc/vle-multiseg-4.ld: New. * ld-powerpc/vle-multiseg-5.d: New. * ld-powerpc/vle-multiseg-5.ld: New. * ld-powerpc/vle-multiseg-6.d: New. * ld-powerpc/vle-multiseg-6.ld: New. * ld-powerpc/vle-multiseg-6a.s: New. * ld-powerpc/vle-multiseg-6b.s: New. * ld-powerpc/vle-multiseg-6c.s: New. * ld-powerpc/vle-multiseg-6d.s: New. * ld-powerpc/powerpc.exp: Run new tests. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/ * NEWS: Mention PowerPC VLE port. 2012-05-14 Catherine Moore <clm@codesourcery.com> ld/testsuite/ * ld-powerpc/apuinfo.rd: Update for VLE. * ld-powerpc/vle-reloc-1.d: New. * ld-powerpc/vle-reloc-1.s: New. * ld-powerpc/vle-reloc-2.d: New. * ld-powerpc/vle-reloc-2.s: New. * ld-powerpc/vle-reloc-3.d: New. * ld-powerpc/vle-reloc-3.s: New. * ld-powerpc/vle-reloc-def-1.s: New. * ld-powerpc/vle-reloc-def-2.s: New. * ld-powerpc/vle-reloc-def-3.s: New. 2012-05-14 James Lemke <jwlemke@codesourcery.com> opcodes/ * ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle. (PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines. (vle_opcd_indices): New array. (lookup_vle): New function. (disassemble_init_powerpc): Revise for second (VLE) opcode table. (print_insn_powerpc): Likewise. * ppc-opc.c: Likewise. 2012-05-14 Catherine Moore <clm@codesourcery.com> Maciej W. Rozycki <macro@codesourcery.com> Rhonda Wittels <rhonda@codesourcery.com> Nathan Froyd <froydnj@codesourcery.com> opcodes/ * ppc-opc.c (insert_arx, extract_arx): New functions. (insert_ary, extract_ary): New functions. (insert_li20, extract_li20): New functions. (insert_rx, extract_rx): New functions. (insert_ry, extract_ry): New functions. (insert_sci8, extract_sci8): New functions. (insert_sci8n, extract_sci8n): New functions. (insert_sd4h, extract_sd4h): New functions. (insert_sd4w, extract_sd4w): New functions. (insert_vlesi, extract_vlesi): New functions. (insert_vlensi, extract_vlensi): New functions. (insert_vleui, extract_vleui): New functions. (insert_vleil, extract_vleil): New functions. (BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT. (BI16, BI32, BO32, B8): New. (B15, B24, CRD32, CRS): New. (CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG. (DB, IMM20, RD, Rx, ARX, RY, RZ): New. (ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New. (SH6_MASK): Use PPC_OPSHIFT_INV. (SI8, UI5, OIMM5, UI7, BO16): New. (VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New. (XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV. (ALLOW8_SPRG): New. (insert_sprg, extract_sprg): Check ALLOW8_SPRG. (OPVUP, OPVUP_MASK OPVUP): New (BD8, BD8_MASK, BD8IO, BD8IO_MASK): New. (EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New. (BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New. (BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New. (IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New. (IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New. (SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New. (SE_IM5, SE_IM5_MASK): New. (SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New. (EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New. (BO32DNZ, BO32DZ): New. (NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE. (PPCVLE): New. (powerpc_opcodes): Add new VLE instructions. Update existing instruction to include PPCVLE if supported. * ppc-dis.c (ppc_opts): Add vle entry. (get_powerpc_dialect): New function. (powerpc_init_dialect): VLE support. (print_insn_big_powerpc): Call get_powerpc_dialect. (print_insn_little_powerpc): Likewise. (operand_value_powerpc): Handle negative shift counts. (print_insn_powerpc): Handle 2-byte instruction lengths.
2011-07-11include/ChangeLogCatherine Moore1-0/+4
2011-07-11 Catherine Moore <clm@codesourcery.com> * bfdlink.h (flag_type): New enumeration. (flag_info_list): New structure. (flag_info): New structure. bfd/ChangeLog 2011-07-11 Catherine Moore <clm@codesourcery.com> * aout-adobe.c (aout_32_bfd_lookup_section_flags): New definition. * aout-target.h (MY_bfd_lookup_section_flags): New definition. * aout-tic30.c (MY_bfd_lookup_section_flags): New definition. * bfd-in2.h: Regenerated. * bfd.c (bfd_lookup_section_flags): New definition. * binary.c (binary_bfd_lookup_section_flags): New definition. * bout.c (b_out_bfd_lookup_section_flags): New definition. * coff-alpha.c (_bfd_ecoff_bfd_lookup_section_flags): New definition. * coff-mips.c (_bfd_ecoff_bfd_lookup_section_flags): New definition. * coff-rs6000.c (rs6000coff_vec): Include bfd_generic_lookup_section_flags. (pmac_xcoff_vec): Likewise. * coffcode.h (coff_bfd_lookup_section_flags): New definition. * coff64-rs6000.c (rs6000coff64_vec): Include bfd_generic_lookup_section_flags. (aix5coff64_vec): Likewise. * ecoff.c (bfd_debug_section): Initialize flag_info field. * elf-bfd.h (elf_backend_lookup_section_flags_hook): Declare. (bfd_elf_lookup_section_flags): Declare. * elflink.c (bfd_elf_lookup_section_flags): New function. * elfxx-target.h (bfd_elfNN_bfd_lookup_section_flags): Define. (elf_backend_lookup_section_flags_hook): Define. (elf_backend_data): Add elf_backend_lookup_section_flags_hook. * i386msdos.c (msdos_bfd_lookup_section_flags): New define. * i386os9k.c (os9k_bfd_lookup_section_flags): New define. * ieee.c (ieee_bfd_lookup_section_flags): New define. * ihex.c (ihex_bfd_lookup_section_flags): New define. * libbfd-in.h (_bfd_nolink_bfd_lookup_section_flags): Declare. (bfd_generic_lookup_section_flags): Declare. * libbfd.h: Regenerated. * mach-o-target.c (bfd_mach_o_bfd_lookup_section_flags): New. * mmo.c (mmo_bfd_lookup_section_flags): New definition. * nlm-target.h (nlm_bfd_lookup_section_flags): New definition. * oasys.c (oasys_bfd_lookup_section_flags): New definition. * pef.c (bfd_pef_bfd_lookup_section_flags): New definition. * plugin.c (bfd_plugin_bfd_lookup_section_flags): New definition. * ppcboot.c (ppcboot_bfd_lookup_section_flags): New definition. * reloc.c (bfd_generic_lookup_section_flags): New function. * som.c (som_bfd_lookup_section_flags): New definition. * srec.c (srec_bfd_lookup_section_flags): New definition. * targets.c (flag_info): Declare. (NAME##_bfd_lookup_section_flags): Add to LINK jump table. (_bfd_lookup_section_flags): New. * tekhex.c (tekhex_bfd_lookup_section_flags): New definition. * versados.c (versados_bfd_lookup_section_flags): New definition. * vms-alpha.c (alpha_vms_bfd_lookup_section_flag): New definition. * xsym.c (bfd_sym_bfd_lookup_section_flags): New definition. ld/ChangeLog 2011-07-11 Catherine Moore <clm@codesourcery.com> * ld.h (section_flag_list): Add field to struct wildcard_spec. * ld.texinfo (INPUT_SECTION_FLAGS): Document. * ldgram.y (flag_info_list, flag_info): Add to union. (INPUT_SECTION_FLAGS): New token. (wildcard_spec): Initialize section_flag_list to NULL for each alternative. (sect_flag_list, sect_flags): New rules. (input_section_spec_no_keep): Add alternatives to recognize sect_flags. * ldlang.c (walk_wild_consider_section): Initialize section_flag_info field of the section struct. (lang_add_section): Check input section flags. (lang_add_wild): Initialize section_flag_list field of the statement struct. * ldlang.h (lang_input_statement_struct): Add section_flag_list field. (lang_wild_statement_struct): Likewise. * ldlex.l (INPUT_SECTION_FLAGS): New token. * mri.c (mri_draw_tree): Initialize section_flag_list to NULL. * NEWS: Announce INPUT_SECTION_FLAGS enhancement. ld/testsuite/ChangeLog 2011-07-11 Catherine Moore <clm@cm00re.com> * ld-scripts/section-flags-1.s: New. * ld-scripts/section-flags-1.t: New. * ld-scripts/section-flags-2.s: New. * ld-scripts/section-flags-2.t: New. * ld-scripts/section-flags.exp: New.
2010-05-18Implement generic SHF_EXCLUDE.H.J. Lu1-9/+0
bfd/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * elf.c (_bfd_elf_make_section_from_shdr): Handle SHF_EXCLUDE (elf_fake_sections): Likewise. * elf32-i370.c (i370_elf_section_from_shdr): Don't handle SHF_EXCLUDE here. * elf32-ppc.c (ppc_elf_fake_sections): Likewise. binutils/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * readelf.c (get_elf_section_flags): Treat SHF_EXCLUDE as a generic flag. binutils/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * binutils-all/objcopy.exp: Run exclude-1a and exclude-1b for ELF targets. * binutils-all/exclude-1.s: New. * binutils-all/exclude-1a.d: Likewise. * binutils-all/exclude-1b.d: Likewise. gas/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * obj-elf.c (obj_elf_change_section): Handle SHF_EXCLUDE. (obj_elf_parse_section_letters): Likewise. (obj_elf_section_word): Likewise. * config/tc-ppc.c (ppc_section_letter): Removed. (ppc_section_word): Likewise. * config/tc-ppc.h (ppc_section_letter): Likewise. (ppc_section_word): Likewise. (md_elf_section_letter): Likewise. (md_elf_section_word): Likewise. * doc/as.texinfo: Document `e' and `#exclude'. gas/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * gas/elf/elf.exp: Run section8. * gas/elf/section8.d: New. * gas/elf/section8.s: Likewise. include/elf/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * common.h (SHF_EXCLUDE): New. * i370.h (SHF_EXCLUDE): Removed. * or32.h (SHF_EXCLUDE): Likewise. * ppc.h (SHF_EXCLUDE): Likewise. * sparc.h (SHF_EXCLUDE): Likewise. ld/testsuite/ 2010-05-18 H.J. Lu <hongjiu.lu@intel.com> PR gas/11600 * ld-elf/exclude3.s: New. * ld-elf/exclude3a.d: Likewise. * ld-elf/exclude3b.d: Likewise. * ld-elf/exclude3c.d: Likewise.
2010-04-15Upgrade header files to use GPLv3Nick Clifton1-16/+18
2009-12-17 PR ld/11088Alan Modra1-4/+3
include/elf/ * ppc.h (R_PPC_RELAX32, R_PPC_RELAX32PC, R_PPC_RELAX32_PLT, R_PPC_RELAX32PC_PLT): Delete. (R_PPC_RELAX, R_PPC_RELAX_PLT, R_PPC_RELAX_PLTREL24): Define. bfd/ * elf32-ppc.c (update_plt_info): Clear sec here when addend is less than 32768.. (ppc_elf_check_relocs): ..rather than doing so here. Ignore new relax relocs. (ppc_elf_gc_sweep_hook): Don't segfault when symbol hiding has removed plt_entry records. (ppc_elf_tls_setup): Handle PIE calls to __tls_get_addr correctly. (ppc_elf_tls_optimize): Likewise. Also dec __tls_get_addr refcount when optimizing code using new tlsgd and tlsld marker relocs. (ppc_elf_relax_section): Differentiate relaxed PLTREL24 relocs from ADDR24 relocs using plt or glink. Don't clear the addend for R_PPC_RELAX_PLTREL24. (ppc_elf_relocate_section): Correctly handle addends on relaxed PLTREL24 relocs.
2009-09-21include/elf/Alan Modra1-1/+4
* ppc.h (DT_PPC_TLSOPT): Define. * ppc64.h (DT_PPC64_TLSOPT): Define. bfd/ * elf32-ppc.c (TLS_GET_ADDR_GLINK_SIZE): Define. (ADD_3_12_2, BEQLR, CMPWI_11_0, LWZ_11_3, LWZ_12_3): Define. (MR_0_3, MR_3_0): Define. (struct ppc_elf_link_hash_table): Add no_tls_get_addr_opt. (ppc_elf_select_plt_layout): Save emit_stub_syms param earlier. (ppc_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt (allocate_dynrelocs): Increase glink entry size for __tls_get_addr. (ppc_elf_size_dynamic_sections): Add DT_PPC_TLS_OPT tag. (write_glink_stub): Add param p. (ppc_elf_relocate_section): Adjust write_glink_stub call. (ppc_elf_finish_dynamic_symbol): Emit special glink call stub for __tls_get_addr. * elf32-ppc.h (ppc_elf_tls_setup): Update prototype. * elf64-ppc.c (struct ppc_link_hash_table): Add no_tls_get_addr_opt. (ppc64_elf_tls_setup): Add no_tls_get_addr_opt param and save to hash table. Check for presense of __tls_get_addr_opt. (ppc64_elf_size_dynamic_sections): Add DT_PPC64_TLS_OPT tag. (LD_R11_0R3, LD_R12_0R3, MR_R0_R3, CMPDI_R11_0, ADD_R3_R12_R13, BEQLR, MR_R3_R0, MFLR_R11, STD_R11_0R1, BCTRL, LD_R11_0R1, LD_R2_0R1, MTLR_R11): Define. (build_tls_get_addr_stub): New function. (ppc_build_one_stub): Call it. (ppc_size_one_stub): Add extra size for __tls_get_addr stub. (ppc64_elf_relocate_section): Don't change nop to ld 2,40(1) for __tls_get_addr plt call. * elf64-ppc.h (ppc64_elf_tls_setup): Update prototype. binutils/ * readelf.c (get_ppc_dynamic_type): Add TLSOPT. (get_ppc64_dynamic_type): Likewise. ld/ * emultempl/ppc32elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. Redefine other options in terms of previous option. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. * emultempl/ppc64elf.em (no_tls_get_addr_opt): New var. (ppc_before_allocation): Pass to ppc64_elf_tls_setup. (OPTION_NO_TLS_GET_ADDR_OPT): Define. (PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS): Add --no-tls-get-addr-optimize. (PARSE_AND_LIST_ARGS_CASES): Handle it. ld/testsuite/ * ld-powerpc/tlslib.s: Delete dot-symbol entry syms. Add __tls_get_addr_opt. * ld-powerpc/tlslib32.s: Add __tls_get_addr_opt. * ld-powerpc/oldtlslib.s: New file, old-abi version of tlslib.s. * ld-powerpc/powerpc.exp: Build old-abi library and use it in two new link tests. * ld-powerpc/tlsexe.d: Update for new __tls_get_addr stub. * ld-powerpc/tlsexe.g, * ld-powerpc/tlsexe.r, *ld-powerpc/tlsexe32.d, * ld-powerpc/tlsexe32.g, * ld-powerpc/tlsexe32.r, * ld-powerpc/tlsexetoc.d, * ld-powerpc/tlsexetoc.g, * ld-powerpc/tlsexetoc.r: Likewise.
2009-07-10STT_GNU_IFUNC support for PowerPC.Alan Modra1-7/+10
2009-06-22include/elf/Alan Modra1-4/+6
* ppc.h (R_PPC_RELAX*): Define as enum. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Handle R_PPC_RELAX* in switch. * elf32-v850.c (v850_elf_relocate_section): Warning fix.
2009-03-04include/elf/Alan Modra1-2/+4
* ppc.h (R_PPC_TLSGD, R_PPC_TLSLD): Add new relocs. * ppc64.h (R_PPC64_TLSGD, R_PPC64_TLSLD): Add new relocs. bfd/ * reloc.c (BFD_RELOC_PPC_TLSGD, BFD_RELOC_PPC_TLSLD): New. * section.c (struct bfd_section): Add has_tls_get_addr_call. (BFD_FAKE_SECTION): Init new flag. * ecoff.c (bfd_debug_section): Likewise. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * elf32-ppc.c (ppc_elf_howto_raw): Add R_PPC_TLSGD and R_PPC_TLSLD. (ppc_elf_reloc_type_lookup): Handle new relocs. (ppc_elf_check_relocs): Set has_tls_get_addr_call on finding such without marker relocs. (ppc_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs if section has no old-style calls. (ppc_elf_relocate_section): Set tls_mask for non-tls relocs too. Don't try to optimize new-style __tls_get_addr call when handling arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD relocs. * elf64-ppc.c (ppc64_elf_howto_raw): Add R_PPC64_TLSGD, R_PPC64_TLSLD. (ppc64_elf_reloc_type_lookup): Handle new relocs. (ppc64_elf_check_relocs): Set has_tls_get_addr_call on finding such without marker relocs. (ppc64_elf_tls_optimize): Allow out-of-order __tls_get_addr relocs if section has no old-style calls. Set toc_ref for new relocs as appropriate. (ppc64_elf_relocate_section): Set tls_mask for non-tls relocs too. Don't try to optimize new-style __tls_get_addr call when handling arg setup relocs. Instead do so for R_PPC_TLSGD and R_PPC_TLSLD relocs. gas/ * config/tc-ppc.c (ppc_elf_suffix): Error if ppc32 tls got relocs have non-zero addend. (md_assemble): Parse args of __tls_get_addr calls. (md_apply_fix): Handle BFD_RELOC_PPC_TLSGD and BFD_RELOC_PPC_TLSLD. ld/testsuite/ * ld-powerpc/tlsmark.s, * ld-powerpc/tlsmark.d: New test. * ld-powerpc/tlsmark32.s, * ld-powerpc/tlsmark32.d: New test. * ld-powerpc/powerpc.exp: Run them.
2008-10-10include/elf/Nathan Froyd1-0/+5
* ppc.h: Add Tag_GNU_Power_ABI_Struct_Return. bfd/ * elf32-ppc.c (ppc_elf_merge_obj_attributes): Merge Tag_GNU_Power_ABI_Struct_Return. binutils/ * readelf.c (display_power_gnu_attribute): Decode Tag_GNU_Power_ABI_Struct_Return. ld/testsuite/ * ld-powerpc/gnu-attr-12-1.s: New file. * ld-powerpc/gnu-attr-12-2.s: New file. * ld-powerpc/gnu-attr-12-11.d: New file. * ld-powerpc/gnu-attr-12-21.d: New file. * ld-powerpc/powerpc.exp: Run new dump tests.
2008-07-26Support PowerPC single-precision float.Alan Modra1-2/+3
2007-10-25 * elf32-ppc.c (ppc_elf_merge_obj_attributes): Add support forDaniel Jacobowitz1-0/+5
Tag_GNU_Power_ABI_Vector. * readelf.c (display_power_gnu_attribute): Add support for Tag_GNU_Power_ABI_Vector. * ppc.h (Tag_GNU_Power_ABI_Vector): New. * ld-powerpc/attr-gnu-8-1.s, ld-powerpc/attr-gnu-8-11.d, ld-powerpc/attr-gnu-8-2.s, ld-powerpc/attr-gnu-8-23.d, ld-powerpc/attr-gnu-8-3.s, ld-powerpc/attr-gnu-8-31.d: New. * ld-powerpc/powerpc.exp: Run new tests.
2007-06-30bfd:Joseph Myers1-0/+11
* elf32-ppc.c (ppc_elf_merge_obj_attributes): New. (ppc_elf_merge_private_bfd_data): Call it. binutils: * readelf.c (display_power_gnu_attribute, process_power_specific): New. (process_arch_specific): Call process_power_specific. include/elf: * ppc.h (Tag_GNU_Power_ABI_FP): Define. ld/testsuite: * ld-powerpc/attr-gnu-4-0.s, ld-powerpc/attr-gnu-4-00.d, ld-powerpc/attr-gnu-4-01.d, ld-powerpc/attr-gnu-4-02.d, ld-powerpc/attr-gnu-4-1.s, ld-powerpc/attr-gnu-4-10.d, ld-powerpc/attr-gnu-4-11.d, ld-powerpc/attr-gnu-4-12.d, ld-powerpc/attr-gnu-4-13.d, ld-powerpc/attr-gnu-4-2.s, ld-powerpc/attr-gnu-4-20.d, ld-powerpc/attr-gnu-4-21.d, ld-powerpc/attr-gnu-4-22.d, ld-powerpc/attr-gnu-4-3.s, ld-powerpc/attr-gnu-4-31.d: New. * ld-powerpc/powerpc.exp: Run these new tests.
2005-05-14include/elf/Alan Modra1-2/+2
* ppc.h (DT_PPC_GOT): Rename from DT_PPC_GLINK. bfd/ * elf32-ppc.c (ppc_elf_size_dynamic_sections): Set DT_PPC_GOT, not DT_PPC_GLINK. (ppc_elf_finish_dynamic_sections): Likewise. binutils/ * readelf.c (get_ppc_dynamic_type): Display DT_PPC_GOT, not DT_PPC_GLINK.
2005-05-11 * ppc.h (R_PPC_RELAX32, R_PPC_RELAX32PC, R_PPC_RELAX32_PLT,Alan Modra1-6/+14
R_PPC_RELAX32PC_PLT) Adjust. (R_PPC_REL16, R_PPC_REL16_LO, R_PPC_REL16_HI, R_PPC_REL16_HA): Define. (DT_PPC_GLINK): Define.
2005-05-10Update the address and phone number of the FSF organizationNick Clifton1-1/+1
2005-03-03update copyright datesAlan Modra1-1/+1
2005-01-12include/elf/Alan Modra1-2/+4
* ppc.h (R_PPC_RELAX32_PLT, R_PPC_RELAX32PC_PLT): Define. (R_PPC_RELAX32, R_PPC_RELAX32PC): Adjust value. bfd/ * elf32-ppc.c (ppc_elf_howto_raw): Delete RELAX32* entries. (ppc_elf_relax_section): Use PLT variants of RELAX32 relocs for reaching PLT. (ppc_elf_relocate_section): Handle R_PPC_RELAX32_PLT and R_PPC_RELAX32PC_PLT.
2003-11-06 * ppc.h (R_PPC_RELAX32PC): Define.Alan Modra1-1/+2
2003-07-292003-07-28 Eric Christopher <echristo@redhat.com>Eric Christopher1-1/+5
* elf32-ppc.c (R_PPC_RELAX32): New relocation. (ppc_elf_install_value): New function. (ppc_elf_sort_rela): Remove. (ppc_elf_relax_section): Rewrite. Remove old relaxation and replace with out of range branch stubs. (ppc_elf_relocate_section): Handle R_PPC_RELAX32. 2003-07-28 Eric Christopher <echristo@redhat.com> * ppc.h (R_PPC_RELAX32): New. Fake relocation.
2003-02-18 * ppc.h: Replace DTPMOD64, TPREL64, DTPREL64 with DTPMOD32 etc.Alan Modra1-3/+5
(IS_PPC_TLS_RELOC): Define.
2003-02-04 * ppc.h: Add TLS relocs. Format.Alan Modra1-57/+87
* ppc64.h: Likewise.
2003-01-16 * ppc.h: Split out ppc64 definitions to..Alan Modra1-79/+2
* pcc64.h: ..here. New file. (R_PPC64_REL30): Rename from R_PPC64_ADDR30.
2002-02-12Add DT_PPC64_OPD and DT_PPC64_OPDSZ dynamic tagsAlan Modra1-0/+4
2002-01-16 * ppc.h (DT_PPC64_GLINK): Define.Alan Modra1-0/+3
2001-08-27 * ppc.h: Add relocs from the 64-bit PowerPC ELF ABI revision 1.2.Alan Modra1-1/+73
2001-03-14Fix typos in ChangeLogs; add coff/external.h; fix copyright datesNick Clifton1-1/+1
2000-08-07Remove spurious CYGNUS LOCAL commentsNick Clifton1-6/+5
2000-06-07Update copyright dates for last patch.Alan Modra1-1/+1
Scanning ChangeLog showed others were lazy/forgetful too :-)
2000-06-07Get rid of the -1 dummy valued enum in START_RELOC_NUMBERS.Alan Modra1-2/+1
Remove duplicate reloc enums in elf32-d[13]0v.c Remove EMPTY_HOWTOs in elf32-i386.c
1999-05-0319990502 sourceware importbinu_ss_19990502Richard Henderson1-0/+127
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