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2026-01-22gas: implement parsing of object attributes v2Richard Ball1-0/+17
This patch adds the parsing logic for Object Attributes v2 (OAv2), enabling Gas to interpret and process these attributes correctly. It also updates the AArch64 backend to utilize the new parsing capabilities, and handle the new AArch64-specific directives. This patch relies on the abstractions introduced in the previous patch to store the data. Its scope is limited to parsing the new assembly directives, checking the inputs, and storing the data into the relevant OAv2 abstractions. Note that, for now, the new parsing capabilities are only available for AArch64. Even if the implementation was splitted into a generic part available in gas/config/obj-elf.c, and an AArch64-specific one in gas/config/tc-aarch64.c, the lack of GNU generic directives to handle OAv2 prevented the capability from being exposed to others backends. ** GNU assembler interface for aeabi subsections OAv2 introduced two new directives for AArch64: - .aeabi_subsection name, comprehension, encoding Create or switch the current subsection to 'name'. Comprehension values can be 'required' or 'optional'. Encoding values are limited for now to 'ULEB128', and 'NTBS' The comprehension and encoding are mandatory arguments on the first declaration of the subsection, but become optional for subsequent ones. - .aeabi_attribute tag, value Set 'tag' to 'value' in the current subsection. Tag can either be an integer, or one of the defined symbols in the backend. The usage of those directives will error if the following requirements are breached: - If the subsection X has been previously declared, the comprehension and encoding parameters of the current .aeabi_subsection that redeclares X have to match with the previous declaration. If those parameters are omited, no check is performed. - The type of the value set via .aeabi_attribute has to align with the current subsection. - If the tag N has already been declared for the current subsection, a later assignment to tag N is tolerated only if the newly set value is equal to the former one. This check is stricter than needed. Ideally, the tag N's values should be merged together, and an error should be raised only if an incompatibility is detected. Because the attributes are set in one chunk by GCC, there is no real use case for such a merge. The new parsing code is enabled/disabled via the TC_OBJ_ATTR_v1 and TC_OBJ_ATTR_v2 defines, and supports the following configurations: - enable both OAv1 and OAv2 parsing. This is currently used by no target, but is useful for migration from OAv1 to OAv2. - enable OAv1 parsing only. This is used by all targets supporting OAs except for AArch64. - enable OAv2 parsing only. This is only used by AArch64. ** Regarding the implementation The logic of OAv1 does not always keep separated the different data processing steps: parsing, convertion to internal abstractions, error checking and further processing (if any) on those abstractions, and their serialization into the object files. This patch takes into account the specifities of syntax for OAv1 and OAv2, but mutualize as much as possible the common behavior so that the same methods can be used for parsing the OAv1 and OAv2 directives. However, the mutualization of the code is limited by a different internal model for OAv1 and OAv2. Even if it is technically feaseable to have only one middle -end for OAv1, OAv2 and even GNU properties, sharing the same data model to perform the merge logic with the same code, it is a significant amount of work. This extra work was not considered as a part of this new feature, so this patch series will stick with the minimum of mutualization as possible. Co-Authored-By: Matthieu Longo <matthieu.longo@arm.com>
2026-01-16[include] Add AT_HWCAP3/AT_HWCAP4 in elf/common.hTom de Vries1-0/+2
Since glibc 2.39, containing commit 3ab9b88 ("powerpc: Add HWCAP3/HWCAP4 data to TCB for Power Architecture."), glibc's elf/elf.h contains constants AT_HWCAP3/AT_HWCAP4. Add these in elf/common.h. Approved-By: Simon Marchi <simon.marchi@efficios.com>
2026-01-15RISC-V: Add second-pass relaxation for JAL to C.J/C.JALKito Cheng1-6/+7
When linker relaxation converts CALL (auipc+jalr, 8 bytes) to JAL (4 bytes), further relaxation to C.J or C.JAL (2 bytes) may become possible as code shrinks and jump distances decrease. This patch adds _bfd_riscv_relax_jal to perform this second-pass relaxation. To enable this, we introduce R_RISCV_DELETE_AND_RELAX, a new internal relocation that combines piecewise deletion with preservation of relaxation capability. When _bfd_riscv_relax_call relaxes CALL to JAL, it marks the deletion as R_RISCV_DELETE_AND_RELAX instead of R_RISCV_DELETE. After the piecewise deletion is resolved, R_RISCV_DELETE_AND_RELAX is converted back to R_RISCV_RELAX at the JAL instruction offset, allowing _bfd_riscv_relax_jal to further relax JAL to C.J/C.JAL. C.JAL is only available on RV32 (rd=ra), while C.J is available on both RV32 and RV64 (rd=x0). Changes since v1: - Use R_RISCV_DELETE_AND_RELAX with piecewise deletion instead of calling _riscv_relax_delete_immediate directly, to maintain relaxation performance. - Add preserve_relax parameter to riscv_relax_delete_bytes to simplify the logic in _bfd_riscv_relax_call.
2026-01-01Update year range in copyright notice of binutils filesAlan Modra85-85/+85
Avoid warnings about invalid escapes in etc/update-copyright.py by using raw strings, add BinutilsFilter to skip psql.rc and add "Kalray SA." as another copyright holder.
2025-12-15bfd/ELF: fold BFD_RELOC_<arch>_RELATIVEJan Beulich1-1/+1
There's no need to have a separate reloc per arch; just like for other more or less generic ones a single one will (mostly) do. Arm64, C-Sky, and KVX - sadly - are exceptions.
2025-12-15bfd/ELF: fold BFD_RELOC_<arch>_J{,U}MP_SLOTJan Beulich1-1/+1
There's no need to have a separate reloc per arch; just like for other more or less generic ones a single one will (mostly) do. Arm64, C-Sky, and KVX - sadly - are exceptions.
2025-12-15bfd/ELF: fold BFD_RELOC_<arch>_GLOB_DATJan Beulich1-1/+1
There's no need to have a separate reloc per arch; just like for other more or less generic ones a single one will (mostly) do. Arm64, C-Sky, and KVX - sadly - are exceptions.
2025-12-15bfd/ELF: fold BFD_RELOC_<arch>_COPYJan Beulich1-1/+1
There's no need to have a separate reloc per arch; just like for other more or less generic ones a single one will (mostly) do. Arm64, C-Sky, and KVX - sadly - are exceptions.
2025-12-12bfd: Add minimal support to handle note that describes xsave layoutVignesh Balasubramanian1-0/+2
This note section is already supported by Linux kernel. https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/arch/x86/kernel/fpu/xstate.c?id=ba386777a30b38dabcc7fb8a89ec2869a09915f7 Co-Authored-By: Jini Susan George <jinisusan.george@amd.com>
2025-12-10LoongArch: Add LA32 and LA32R relocationsmengqinggang1-0/+35
LA32 and LA32R do not have pcaddu18i. LA32R does not have pcalau12i. Add R_LARCH_CALL30 for pcaddu12i + jirl used in LA32 and LA32R. Add R_LARCH_*_PCADD_HI20 for pcaddu12i used in LA32R. Add R_LARCH_*_PCADD_LO12 for addi.w/ld.w used in LA32R.
2025-12-08elf: Add SHT_SUNW_ctf and SHT_SUNW_symnsortH.J. Lu1-2/+3
On Solaris 11.4, there is SHT_SUNW_symnsort and no SHT_SUNW_symtabnsort. SHT_SUNW_symnsort is defined to 0x6fffffec, which is the same as SHT_SUNW_symtabnsort. There is also SHT_SUNW_ctf. Add SHT_SUNW_ctf and rename SHT_SUNW_symtabnsort to SHT_SUNW_symnsort. Move SHT_SUNW_phname after SHT_SUNW_symnsort. binutils/ * readelf.c (get_solaris_section_type): Add SHT_SUNW_ctf and SHT_SUNW_symnsort. Move SHT_SUNW_phname after SHT_SUNW_symnsort. Remove SHT_SUNW_symtabnsort. include/ * elf/common.h (SHT_SUNW_ctf): New. (SHT_SUNW_symtabnsort): Renamed to ... (SHT_SUNW_symnsort): This. (SHT_SUNW_phname): Moved after SHT_SUNW_symnsort. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-11-17bfd/ELF: Core file support for AArch64 FPMREzra Sitorus1-0/+2
The Floating Point Mode Register is a new register which controls the behaviour of FP8 instructions. This is handled by the Linux kernel through a new NT_ARM_FPMR register set. This patch adds required code to support core file dumps with NT_ARM_FPMR in them.
2025-11-08readelf: Display the base symbol version as empty stringH.J. Lu1-0/+5
Update readelf to display the base symbol version as Symbol table for image contains 5 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND 1: 0000000000003008 0 OBJECT GLOBAL DEFAULT 10 bar@@ 2: 0000000000000000 0 OBJECT GLOBAL DEFAULT ABS VERS_1 3: 0000000000003008 0 OBJECT GLOBAL DEFAULT 10 bar@@VERS_1 4: 0000000000003000 0 OBJECT GLOBAL DEFAULT 10 foo@ instead of Symbol table for image contains 5 entries: Num: Value Size Type Bind Vis Ndx Name 0: 0000000000000000 0 NOTYPE LOCAL DEFAULT UND 1: 0000000000003008 0 OBJECT GLOBAL DEFAULT 10 bar 2: 0000000000000000 0 OBJECT GLOBAL DEFAULT ABS VERS_1 3: 0000000000003008 0 OBJECT GLOBAL DEFAULT 10 bar@@VERS_1 4: 0000000000003000 0 OBJECT GLOBAL DEFAULT 10 foo That is bar@@ and foo@ vs bar and foo. binutils/ PR binutils/33599 * readelf.c (process_version_sections): Replace 0x8001 with (VERSYM_HIDDEN | VERSYM_BASE). (get_symbol_version_string): Likewise. Return "" for the base version. include/ PR binutils/33599 * elf/common.h (VERSYM_BASE): New. ld/ PR binutils/33599 * testsuite/ld-elf/pr33599.d: New file. * testsuite/ld-elf/pr33599.map: Likewise. * testsuite/ld-elf/pr33599.s: Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-09-07elf: Define more SHT_SUNW_XXXH.J. Lu1-1/+15
binutils/ * readelf.c (get_solaris_section_type): Use SHT_SUNW_XXX and add SHT_SUNW_phname and SHT_SUNW_symtabnsort. include/ * elf/common.h (SHT_SUNW_symtabnsort): New. (SHT_SUNW_ancillary): Likewise. (SHT_SUNW_capchain): Likewise. (SHT_SUNW_capinfo): Likewise. (SHT_SUNW_symsort): Likewise. (SHT_SUNW_tlssort): Likewise. (SHT_SUNW_LDYNSYM): Likewise. (SHT_SUNW_dof): Likewise. (SHT_SUNW_cap): Likewise. (SHT_SUNW_SIGNATURE): Likewise. (SHT_SUNW_ANNOTATE): Likewise. (SHT_SUNW_DEBUGSTR): Likewise. (SHT_SUNW_DEBUG): Likewise. (SHT_SUNW_verdef): Likewise. (SHT_SUNW_verneed): Likewise. (SHT_SUNW_versym): Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-12ld/aarch64elf: add support for DT_AARCH64_MEMTAG_STACK dynamic tagIndu Bhagat1-0/+1
Add new command line option -z memtag-stack for aarch64 elf. This option instructs the linker to generate the necessary dynamic tag DT_AARCH64_MEMTAG_STACK, which the dynamic loader can then use to protect the stack memory with PROT_MTE. Linker issues an 'unrecognized option' error when -z memtag-stack is specified for non-aarch64 based emulations. readelf displays the dynamic tag when present: $ readelf -d <exectutable> Dynamic section at offset 0xfdd8 contains XX entries: Tag Type Name/Value 0x0000000000000001 (NEEDED) Shared library: [libc.so.6] 0x000000000000000c (INIT) 0x400520 0x000000000000000d (FINI) 0x400b64 0x0000000000000019 (INIT_ARRAY) 0x41fdc8 ... ... ... 0x000000007000000c (AARCH64_MEMTAG_STACK) 0x1 ... ... ... ChangeLog: * bfd/elfnn-aarch64.c (elfNN_aarch64_late_size_sections): Emit DT_AARCH64_MEMTAG_STACK dynamic tag. * bfd/elfxx-aarch64.h (struct aarch64_memtag_opts): Add new member for tracking whether stack access uses MTE insns. * binutils/readelf.c (get_aarch64_dynamic_type): Handle DT_AARCH64_MEMTAG_STACK. * ld/emultempl/aarch64elf.em: Add new command line option. * ld/ld.texi: Add documentation for -z memtag-stack. * ld/testsuite/ld-aarch64/aarch64-elf.exp: Add new test. * ld/testsuite/ld-aarch64/dt-memtag-stack.d: New test. include/ChangeLog: * elf/aarch64.h (DT_AARCH64_MEMTAG_STACK): New definition.
2025-07-12ld/aarch64elf: add support for DT_AARCH64_MEMTAG_MODE dynamic tagIndu Bhagat1-0/+1
Add new command line option -z memtag-mode=<mode> to aarch64 elf, where <mode> can be one of none, sync, or async. For mode of sync or async, a DT_AARCH64_MEMTAG_MODE dynamic tag with a value of 0 or 1 respectively is emitted. readelf displays the dynamic tag when present: $ readelf -d <exectutable> Dynamic section at offset 0xfdd8 contains XX entries: Tag Type Name/Value 0x0000000000000001 (NEEDED) Shared library: [libc.so.6] 0x000000000000000c (INIT) 0x400520 0x000000000000000d (FINI) 0x400b64 0x0000000000000019 (INIT_ARRAY) 0x41fdc8 ... ... ... 0x0000000070000009 (AARCH64_MEMTAG_MODE) 0x1 ... ... ... Note that this patch doesn't add support for the "asymm" MTE mode, which is an Armv8.7 extension. ChangeLog: * bfd/elfnn-aarch64.c (struct elf_aarch64_link_hash_table): Add new member for memtag properties. (bfd_elfNN_aarch64_set_options): New argument to pass memtag properties. (elfNN_aarch64_late_size_sections): Emit DT_AARCH64_MEMTAG_MODE dynamic tag. * bfd/elfxx-aarch64.h: New definition for the various memtag properties. * binutils/readelf.c (get_aarch64_dynamic_type): Handle DT_AARCH64_MEMTAG_MODE. * ld/emultempl/aarch64elf.em: Likewise. * ld/ld.texi: Add documentation for the new option -z memtag-mode. * ld/testsuite/ld-aarch64/aarch64-elf.exp: New test. * ld/testsuite/ld-aarch64/dt-memtag.d: New test. * ld/testsuite/ld-aarch64/dt-memtag-mode.s: New test. include/ChangeLog: * elf/aarch64.h (DT_AARCH64_MEMTAG_MODE): New definition.
2025-07-11gas: elf: binutils: add new section type SHT_GNU_SFRAMEIndu Bhagat1-0/+1
So far, SFrame sections were of type SHT_PROGBITS. As per ELF specification, SHT_PROGBITS indicates that the section holds information defined by the program, whose format and meaning are determined solely by the program. On the linker side, SHT_PROGBITS should be reserved for the simple "cat contents after applying relocs" semantics. Currently, the only way to know that a section contains SFrame stack trace data is if consumer checks for section name. Such a check for section name is not quite conformant to ELF principles. Some of this was discussed here https://sourceware.org/pipermail/binutils/2025-March/140181.html With this change, the SFrame sections generated by gas, ld will have section type set to SHT_GNU_SFRAME. The new section type is defined in the SHT_LOOS/SHT_HIOS space. The SFrame parsing routine _bfd_elf_parse_sframe () now admits sections only when the the section type is SHT_GNU_SFRAME. No special handling / validation is done at the moment for the case of manual creation of SFrame sections via obj_elf_section (). Add function level comments for now to add a note about this. Although the default handling for (sh_type >= SHT_LOOS && sh_type <= SHT_HIOS) is sufficient when SHT_GNU_SFRAME is in that range, it makes sense to add it as a case of its own. bfd/ * elf-sframe.c (_bfd_elf_parse_sframe): Check if section type is SHT_GNU_SFRAME. (_bfd_elf_set_section_sframe): Set SHT_GNU_SFRAME for output SFrame section. * elflink.c (obj_elf_section): Use section type for check instead of section name. * elfxx-x86.c: Set SHT_GNU_SFRAME for SFrame sections for .plt* sections. * elf.c (bfd_section_from_shdr): Add case for SHT_GNU_SFRAME. binutils/ * readelf.c (get_os_specific_section_type_name): Add SHT_GNU_SFRAME. gas/ * NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME set. * config/obj-elf.c (obj_elf_attach_to_group): Add comments to indicate no special handling for SFrame yet. * dw2gencfi.c (cfi_finish): Set SHT_GNU_SFRAME for emitted SFrame section. ld/ * NEWS: Announce emitted SFrame sections have SHT_GNU_SFRAME set. gas/testsuite/ * gas/cfi-sframe/cfi-sframe.exp: Add new test. * gas/cfi-sframe/cfi-sframe-common-1b.d: New test. * gas/cfi-sframe/cfi-sframe-common-1b.s: New test. include/ * elf/common.h (SHT_GNU_SFRAME): Add new section type for SFrame stack trace information. libsframe/doc/ * sframe-spec.texi: Add expected ELF section type.
2025-07-03bfd/aarch64-linux: Support reading and writing the GCS core file noteThiago Jung Bauermann1-0/+3
Reviewed-By: Luis Machado <luis.machado@arm.com>
2025-06-24RISC-V: Add GNU_PROPERTY_RISCV_FEATURE_1_CFI_SS and ↵Kito Cheng1-0/+5
GNU_PROPERTY_RISCV_FEATURE_1_CFI_LP_UNLABELED This patch adds two new GNU properties for RISC-V: GNU_PROPERTY_RISCV_FEATURE_1_CFI_SS and GNU_PROPERTY_RISCV_FEATURE_1_CFI_LP_UNLABELED. We only add readelf and define the properties in this patch. Ref: https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/417
2025-03-04clean-up aarch64: move the name of the build attributes section into ↵Matthieu Longo1-0/+2
include/elf/aarch64.h
2025-01-14elf: Add GNU_PROPERTY_MEMORY_SEAL gnu propertyAdhemerval Zanella1-0/+1
The GNU_PROPERTY_MEMORY_SEAL gnu property is a way to mark binaries to be memory sealed by the loader, to avoid further changes of PT_LOAD segments (such as unmapping or change permission flags). This is done along with Linux kernel (the mseal syscall [1]), and C runtime supports to instruct the kernel on the correct time during program startup (for instance, after RELRO handling). This support is added along the glibc support to handle the new gnu property [2]. This is a opt-in security features, like other security hardening ones like NX-stack or RELRO. The new property is ignored if present on ET_REL objects, and only added on ET_EXEC/ET_DYN if the linker option is used. A gnu property is used instead of DT_FLAGS_1 flag to allow memory sealing to work with ET_EXEC without PT_DYNAMIC support (at least on glibc some ports still do no support static-pie). [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=8be7258aad44b5e25977a98db136f677fa6f4370 [2] https://sourceware.org/pipermail/libc-alpha/2024-September/160291.html Change-Id: Id47fadabecd24be0e83cff45653f7ce9a900ecf4
2025-01-14ld: Add LTO and none-LTO output support for ld -rH.J. Lu1-0/+1
Link with mixed IR/non-IR objects * 2 kinds of object files o non-IR object file has * non-IR sections o IR object file has * IR sections * non-IR sections * The output of "ld -r" with mixed IR/non-IR objects should work with: o Compilers/linkers with IR support. o Compilers/linkers without IR support. * Add the mixed object file which has o IR sections o non-IR sections: * Object codes from IR sections. * Object codes from non-IR object files. o Object-only section: * With section name ".gnu_object_only" and SHT_GNU_OBJECT_ONLY type on ELF: https://gitlab.com/x86-psABIs/Linux-ABI #define SHT_GNU_OBJECT_ONLY 0x6ffffff8 /* Object only */ * Contain non-IR object file. * Input is discarded after link. * Linker action: o Classify each input object file: * If there is a ".gnu_object_only" section, it is a mixed object file. * If there is a IR section, it is an IR object file. * Otherwise, it is a non-IR object file. o Relocatable non-IR link: * Prepare for an object-only output. * Prepare for a regular output. * For each mixed object file: * Add IR and non-IR sections to the regular output. * For object-only section: * Extract object only file. * Add it to the object-only output. * Discard object-only section. * For each IR object file: * Add IR and non-IR sections to the regular output. * For each non-IR object file: * Add non-IR sections to the regular output. * Add non-IR sections to the object-only output. * Final output: * If there are IR objects, non-IR objects and the object-only output isn't empty: * Put the object-only output into the object-only section. * Add the object-only section to the regular output. * Remove the object-only output. o Normal link and relocatable IR link: * Prepare for output. * IR link: * For each mixed object file: * Compile and add IR sections to the output. * Discard non-IR sections. * Object-only section: * Extract object only file. * Add it to the output. * Discard object-only section. * For each IR object file: * Compile and add IR sections to the output. * Discard non-IR sections. * For each non-IR object file: * Add non-IR sections to the output. * Non-IR link: * For each mixed object file: * Add non-IR sections to the output. * Discard IR sections and object-only section. * For each IR object file: * Add non-IR sections to the output. * Discard IR sections. * For each non-IR object file: * Add non-IR sections to the output. This is useful for Linux kernel build with LTO. bfd/ PR ld/12291 PR ld/12430 PR ld/13298 * bfd.c (bfd_lto_object_type): Add lto_mixed_object. (bfd): Add object_only_section. (bfd_group_signature): New. * elf.c (special_sections_g): Add .gnu_object_only. * format.c: Include "plugin-api.h" and "plugin.h" if BFD_SUPPORTS_PLUGINS is defined. (bfd_set_lto_type): Set type to lto_mixed_object for GNU_OBJECT_ONLY_SECTION_NAME section. (bfd_check_format_matches): Don't check the plugin target twice if the plugin target is explicitly specified. * opncls.c (bfd_extract_object_only_section): New. * plugin.c (bfd_plugin_fake_text_section): New. (bfd_plugin_fake_data_section): Likewise. (bfd_plugin_fake_bss_section): Likewise. (bfd_plugin_fake_common_section): Likewise. (bfd_plugin_get_symbols_in_object_only): Likewise. * plugin.c (add_symbols): Call bfd_plugin_get_symbols_in_object_only and count plugin_data->object_only_nsyms. (bfd_plugin_get_symtab_upper_bound): Count plugin_data->object_only_nsyms. bfd_plugin_get_symbols_in_object_only and add symbols from object only section. (bfd_plugin_canonicalize_symtab): Remove fake_section, fake_data_section, fake_bss_section and fake_common_section. Set udata.p to NULL. Use bfd_plugin_fake_text_section, bfd_plugin_fake_data_section, bfd_plugin_fake_bss_section and bfd_plugin_fake_common_section. Set udata.p to NULL. * plugin.h (plugin_data_struct): Add object_only_nsyms and object_only_syms. * section.c (GNU_OBJECT_ONLY_SECTION_NAME): New. * bfd-in2.h: Regenerated. binutils/ PR ld/12291 PR ld/12430 PR ld/13298 * objcopy.c (group_signature): Removed. (is_strip_section): Replace group_signature with bfd_group_signature. (setup_section): Likewise. * readelf.c (get_os_specific_section_type_name): Handle SHT_GNU_OBJECT_ONLY. gas/ PR ld/12291 PR ld/12430 PR ld/13298 * testsuite/gas/elf/section9.s: Add the .gnu_object_only test. * testsuite/gas/elf/section9.d: Updated. include/ PR ld/12291 PR ld/12430 PR ld/13298 * elf/common.h (SHT_GNU_OBJECT_ONLY): New. ld/ PR ld/12291 PR ld/12430 PR ld/13298 * ld.h (ld_config_type): Add emit_gnu_object_only and emitting_gnu_object_only. * ldelf.c (orphan_init_done): Make it file scope. (ldelf_place_orphan): Rename hold to orig_hold. Initialize hold from orig_hold at run-time. (ldelf_finish): New. * ldelf.h (ldelf_finish): New. * ldexp.c (ldexp_init): Take a bfd_boolean argument to supprt object-only output. (ldexp_finish): Likewise. * ldexp.h (ldexp_init): Take a bfd_boolean argument. (ldexp_finish): Likewise. * ldfile.c (ldfile_try_open_bfd): Call cmdline_check_object_only_section. * ldlang.c: Include "ldwrite.h" and elf-bfd.h. * ldlang.c (cmdline_object_only_file_list): New. (cmdline_object_only_archive_list): Likewise. (cmdline_temp_object_only_list): Likewise. (cmdline_lists_init): Likewise. (cmdline_list_new): Likewise. (cmdline_list_append): Likewise. (print_cmdline_list): Likewise. (cmdline_on_object_only_archive_list_p): Likewise. (cmdline_object_only_list_append): Likewise. (cmdline_get_object_only_input_files): Likewise. (cmdline_arg): Likewise. (setup_section): Likewise. (copy_section): Likewise. (cmdline_fopen_temp): Likewise. (cmdline_add_object_only_section): Likewise. (cmdline_emit_object_only_section): Likewise. (cmdline_extract_object_only_section): Likewise. (cmdline_check_object_only_section): Likewise. (cmdline_remove_object_only_files): Likewise. (lang_init): Take a bfd_boolean argument to supprt object-only output. Call cmdline_lists_init. (load_symbols): Call cmdline_on_object_only_archive_list_p to check if an archive member should be loaded. (lang_process): Handle object-only link. * ldlang.h (lang_init): Take a bfd_boolean argument. (cmdline_enum_type): New. (cmdline_header_type): Likewise. (cmdline_file_type): Likewise. (cmdline_bfd_type): Likewise. (cmdline_union_type): Likewise. (cmdline_list_type): Likewise. (cmdline_emit_object_only_section): Likewise. (cmdline_check_object_only_section): Likewise. (cmdline_remove_object_only_files): Likewise. * ldmain.c (main): Call xatexit with cmdline_remove_object_only_files. Pass FALSE to lang_init, ldexp_init and ldexp_finish. Use ld_parse_linker_script. Set link_info.output_bfd to NULL after close. Call cmdline_emit_object_only_section if needed. (add_archive_element): Call cmdline_check_object_only_section. (ld_parse_linker_script): New. * ldmain.h (ld_parse_linker_script): New. * plugin.c (plugin_maybe_claim): Call cmdline_check_object_only_section on claimed IR files. * scripttempl/elf.sc: Also discard .gnu_object_only sections. * scripttempl/elf64hppa.sc: Likewise. * scripttempl/elfxtensa.sc: Likewise. * scripttempl/mep.sc: Likewise. * scripttempl/pe.sc: Likewise. * scripttempl/pep.sc: Likewise. * emultempl/aarch64elf.em (gld${EMULATION_NAME}_finish): Replace finish_default with ldelf_finish. * emultempl/alphaelf.em (alpha_finish): Likewise. * emultempl/avrelf.em (avr_finish): Likewise. * emultempl/elf.em (ld_${EMULATION_NAME}_emulation): Likewise. * emultempl/ppc32elf.em (ppc_finish): Likewise. * emultempl/ppc64elf.em (gld${EMULATION_NAME}_finish): Likewise. * emultempl/spuelf.em (gld${EMULATION_NAME}_finish): Likewise. * testsuite/ld-plugin/lto-10.out: New file. * testsuite/ld-plugin/lto-10a.c: Likewise. * testsuite/ld-plugin/lto-10b.c: Likewise. * testsuite/ld-plugin/lto-10r.d: Likewise. * testsuite/ld-plugin/lto-4.out: Likewise. * testsuite/ld-plugin/lto-4a.c: Likewise. * testsuite/ld-plugin/lto-4b.c: Likewise. * testsuite/ld-plugin/lto-4c.c: Likewise. * testsuite/ld-plugin/lto-4r-a.d: Likewise. * testsuite/ld-plugin/lto-4r-b.d: Likewise. * testsuite/ld-plugin/lto-4r-c.d: Likewise. * testsuite/ld-plugin/lto-4r-d.d: Likewise. * testsuite/ld-plugin/lto.exp (lto_link_tests): Prepare for "LTO 4[acd]", "lto-4r-[abcd]" and "LTO 10" tests. (lto_run_tests): Add "LTO 4[acd]" and "LTO 10" tests. Build liblto-4.a. Run "lto-4r-[abcd]" tests. Run lto-10r and create tmpdir/lto-10.o. Add test for nm on mixed LTO/non-LTO object. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-01-01Update year range in copyright notice of binutils filesAlan Modra85-85/+85
2024-12-19x86-64: correct CODE_5 relocsJan Beulich1-6/+6
Two of them had their numbers swapped; luckily they aren't really in use just yet. Correct indentation as well while at it.
2024-12-02aarch64: GCS feature check in GNU note properties for input objectsSrinath Parvathaneni1-0/+1
This patch adds support for Guarded Control Stack in AArch64 linker. This patch implements the following: 1) Defines GNU_PROPERTY_AARCH64_FEATURE_1_GCS bit for GCS in GNU_PROPERTY_AARCH64_FEATURE_1_AND macro. 2) Adds readelf support to read and print the GCS feature in GNU properties in AArch64. Displaying notes found in: .note.gnu.property [ ]+Owner[ ]+Data size[ ]+Description GNU 0x00000010 NT_GNU_PROPERTY_TYPE_0 Properties: AArch64 feature: GCS 3) Adds support for the "-z gcs" linker option and document all the values allowed with this option (-z gcs[=always|never|implicit]) where "-z gcs" is equivalent to "-z gcs=always". When '-z gcs' option is omitted from the command line, it defaults to "implicit" and relies on the GCS feature marking in GNU properties. 4) Adds support for the "-z gcs-report" linker option and document all the values allowed with this option (-z gcs-report[=none|warning|error]) where "-z gcs-report" is equivalent to "-z gcs-report=warning". When this option is omitted from the command line, it defaults to "warning". The ABI changes adding GNU_PROPERTY_AARCH64_FEATURE_1_GCS to the GNU property GNU_PROPERTY_AARCH64_FEATURE_1_AND is merged into main and can be found in [1]. [1] https://github.com/ARM-software/abi-aa/blob/main/sysvabi64/sysvabi64.rst Co-authored-by: Matthieu Longo <matthieu.longo@arm.com> Co-authored-by: Yury Khrustalev <yury.khrustalev@arm.com>
2024-06-25gdb: LoongArch: Add support for hardware breakpointHui Li1-0/+2
LoongArch defines hardware watchpoint functions for fetch operations. After the software configures the watchpoints for fetch, the processor hardware will monitor the access addresses of the fetch operations and trigger a watchpoint exception when the watchpoint setting conditions are met. Hardware watchpoints for fetch operations is used to implement hardware breakpoint function on LoongArch. Refer to the following document for hardware breakpoint. https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints A simple test is as follows: lihui@bogon:~$ cat test.c #include <stdio.h> int a = 0; int main() { printf("start test\n"); a = 1; printf("a = %d\n", a); printf("end test\n"); return 0; } lihui@bogon:~$ gcc -g test.c -o test without this patch: lihui@bogon:~$ gdb test ... (gdb) start ... Temporary breakpoint 1, main () at test.c:5 5 printf("start test\n"); (gdb) hbreak 8 No hardware breakpoint support in the target. with this patch: lihui@bogon:~$ gdb test ... (gdb) start ... Temporary breakpoint 1, main () at test.c:5 5 printf("start test\n"); (gdb) hbreak 8 Hardware assisted breakpoint 2 at 0x1200006ec: file test.c, line 8. (gdb) c Continuing. start test a = 1 Breakpoint 2, main () at test.c:8 8 printf("end test\n"); (gdb) c Continuing. end test [Inferior 1 (process 25378) exited normally] Signed-off-by: Hui Li <lihui@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
2024-06-25gdb: LoongArch: Add support for hardware watchpointHui Li1-0/+2
LoongArch defines hardware watchpoint functions for load/store operations. After the software configures the watchpoints for load/store, the processor hardware will monitor the access addresses of the load/store operations and trigger watchpoint exception when the watchpoint setting conditions are met. After this patch, watch/rwatch/awatch command are supported. Refer to the following document for hardware watchpoint. https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#control-and-status-registers-related-to-watchpoints A simple test is as follows: lihui@bogon:~$ cat test.c #include <stdio.h> int a = 0; int main() { printf("start test\n"); a = 1; printf("a = %d\n", a); printf("end test\n"); return 0; } lihui@bogon:~$ gcc -g test.c -o test without this patch: lihui@bogon:~$ gdb test ... (gdb) start ... Temporary breakpoint 1, main () at test.c:5 5 printf("start test\n"); (gdb) awatch a Target does not support this type of hardware watchpoint. ... with this patch: lihui@bogon:~$ gdb test ... (gdb) start ... Temporary breakpoint 1, main () at test.c:5 5 printf("start test\n"); (gdb) awatch a Hardware access (read/write) watchpoint 2: a (gdb) c Continuing. start test Hardware access (read/write) watchpoint 2: a Old value = 0 New value = 1 main () at test.c:7 7 printf("a = %d\n", a); (gdb) c Continuing. Hardware access (read/write) watchpoint 2: a Value = 1 0x00000001200006e0 in main () at test.c:7 7 printf("a = %d\n", a); (gdb) c Continuing. a = 1 end test [Inferior 1 (process 22250) exited normally] Signed-off-by: Hui Li <lihui@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
2024-05-28Add new ELF section and segment types to readelf.Nick Clifton10-89/+134
2024-05-20readelf: add pretty printing for FDO Dlopen Metadata noteLuca Boccassi1-0/+3
2024-05-14arm: remove Maverick support from BFD.Richard Earnshaw1-1/+1
Remove the handling of Maverick from BFD. Where appropriate we handle legacy code by mapping ep9312 onto Armv4t.
2024-02-29RISC-V: Add TLSDESC reloc definitions.Tatsuyuki Ishi1-0/+5
bfd/ * elfxx-riscv.c: Add 5 TLSDESC reloc descriptions. * reloc.c: Likewise. * libbfd.h: Regenerate. * bfd-in2.h: Regenerate. include/ * elf/riscv.h: Add 5 TLSDESC reloc descriptions.
2024-02-24xtensa: move xtensa_make_property_section from bfd to gasAlan Modra1-1/+1
This function is only used by gas, so move it there. Necessary for gas to keep track of group sections as they are created. PR 25333 bfd/ * elf32-xtensa.c (xtensa_make_property_section): Delete. (xtensa_property_section_name): Make public. include/ * elf/xtensa.h (xtensa_make_property_section): Delete. (xtensa_property_section_name): Declare gas/ * config/tc-xtensa.c (xtensa_make_property_section): New, moved from elf32-xtensa.c.
2024-02-12Add support to readelf for the PT_OPENBSD_SYSCALLS segment type.Frederic Cambus1-0/+1
binutils * readelf.c (get_segment_type): Handle PT_OPENBSD_SYSCALLS segment type. include * elf/common.h (PT_OPENBSD_SYSCALLS): Define.
2024-02-08x86-64: Add R_X86_64_CODE_6_GOTTPOFFH.J. Lu1-0/+20
For add %reg1, name@gottpoff(%rip), %reg2 and add name@gottpoff(%rip), %reg1, %reg2 add #define R_X86_64_CODE_6_GOTTPOFF 50 if the instruction starts at 6 bytes before the relocation offset. They are similar to R_X86_64_GOTTPOFF. Linker can covert GOTTPOFF to add $name@tpoff, %reg1, %reg2 Rewrite fx_tcbit, fx_tcbit2 and fx_tcbit3 usage to generate R_X86_64_GOTPCRELX, R_X86_64_REX_GOTPCRELX, R_X86_64_CODE_4_GOTPCRELX, R_X86_64_CODE_4_GOTTPOFF, R_X86_64_CODE_4_GOTPC32_TLSDESC and R_X86_64_CODE_6_GOTTPOFF. NB: There is no need to check BFD_RELOC_X86_64_CODE_4_GOTTPOFF in md_assemble since there is only BFD_RELOC_X86_64_GOTTPOFF at this stage, which will be converted to BFD_RELOC_X86_64_CODE_4_GOTTPOFF or BFD_RELOC_X86_64_CODE_6_GOTTPOFF in i386_validate_fix. 5 relocations: #define R_X86_64_CODE_5_GOTPCRELX 46 #define R_X86_64_CODE_5_GOTTPOFF 47 #define R_X86_64_CODE_5_GOTPC32_TLSDESC 48 #define R_X86_64_CODE_6_GOTPCRELX 49 #define R_X86_64_CODE_6_GOTPC32_TLSDESC 51 are added for completeness and they are unused. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. (elf_x86_64_check_tls_transition): Handle R_X86_64_CODE_6_GOTTPOFF. (elf_x86_64_tls_transition): Likewise. (elf_x86_64_scan_relocs): Handle R_X86_64_CODE_6_GOTTPOFF. Issue an error for R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX and R_X86_64_CODE_6_GOTPC32_TLSDESC. (elf_x86_64_relocate_section): Handle R_X86_64_CODE_6_GOTTPOFF. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_5_GOTPCRELX, BFD_RELOC_X86_64_CODE_5_GOTTPOFF, BFD_RELOC_X86_64_CODE_5_GOTPC32_TLSDESC, BFD_RELOC_X86_64_CODE_6_GOTPCRELX, BFD_RELOC_X86_64_CODE_6_GOTTPOFF and BFD_RELOC_X86_64_CODE_6_GOTPC32_TLSDESC. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. elfcpp/ * x86_64.h (R_X86_64_CODE_5_GOTPCRELX): New. (R_X86_64_CODE_5_GOTTPOFF): Likewise. (R_X86_64_CODE_5_GOTPC32_TLSDESC): Likewise. (R_X86_64_CODE_6_GOTPCRELX): Likewise. (R_X86_64_CODE_6_GOTTPOFF): Likewise. (R_X86_64_CODE_6_GOTPC32_TLSDESC): Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. (md_assemble): Don't check BFD_RELOC_X86_64_CODE_4_GOTTPOFF. Allow "add %reg1, foo@gottpoff(%rip), %reg2". (output_disp): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. Rewrite setting fx_tcbitX bits for BFD_RELOC_X86_64_GOTTPOFF, BFD_RELOC_X86_64_GOTPC32_TLSDESC and BFD_RELOC_32_PCREL. (md_apply_fix): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. (i386_validate_fix): Rewrite fx_tcbitX bit checking for BFD_RELOC_X86_64_GOTTPOFF, BFD_RELOC_X86_64_GOTPC32_TLSDESC and BFD_RELOC_32_PCREL. (tc_gen_reloc): Handle BFD_RELOC_X86_64_CODE_6_GOTTPOFF. * testsuite/gas/i386/x86-64-gottpoff.d: Updated. * testsuite/gas/i386/x86-64-gottpoff.s: Add tests for "add %reg1, foo@gottpoff(%rip), %reg2" and "add foo@gottpoff(%rip), %reg, %reg2". gold/ * x86_64.cc (Target_x86_64::optimize_tls_reloc): Handle R_X86_64_CODE_6_GOTTPOFF. (Target_x86_64::Scan::get_reference_flags): Likewise. (Target_x86_64::Scan::local): Likewise. (Target_x86_64::Scan::global): Likewise. (Target_x86_64::Relocate::relocate): Likewise. (Target_x86_64::Relocate::relocate_tls): Likewise. (Target_x86_64::Relocate::tls_ie_to_le): Handle. R_X86_64_CODE_6_GOTTPOFF. * testsuite/x86_64_ie_to_le.s: Add tests for "add %reg1, foo@gottpoff(%rip), %reg2" and "add foo@gottpoff(%rip), %reg, %reg2". * testsuite/x86_64_ie_to_le.sh: Updated. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_5_GOTPCRELX, R_X86_64_CODE_5_GOTTPOFF, R_X86_64_CODE_5_GOTPC32_TLSDESC, R_X86_64_CODE_6_GOTPCRELX, R_X86_64_CODE_6_GOTTPOFF and R_X86_64_CODE_6_GOTPC32_TLSDESC. ld/ * testsuite/ld-x86-64/tlsbindesc.s: Add R_X86_64_CODE_6_GOTTPOFF tests. * testsuite/ld-x86-64/tlsbindesc.d: Updated. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise.
2024-01-04Update year range in copyright notice of binutils filesAlan Modra85-85/+85
Adds two new external authors to etc/update-copyright.py to cover bfd/ax_tls.m4, and adds gprofng to dirs handled automatically, then updates copyright messages as follows: 1) Update cgen/utils.scm emitted copyrights. 2) Run "etc/update-copyright.py --this-year" with an extra external author I haven't committed, 'Kalray SA.', to cover gas testsuite files (which should have their copyright message removed). 3) Build with --enable-maintainer-mode --enable-cgen-maint=yes. 4) Check out */po/*.pot which we don't update frequently.
2023-12-29LoongArch: include: Add support for tls le relax.changjiachen1-0/+12
Add new relocs number for tls le relax. include/ChangeLog: * elf/loongarch.h: (RELOC_NUMBER (R_LARCH_TLS_LE_HI20_R, 121)): New relocs number. (RELOC_NUMBER (R_LARCH_TLS_LE_ADD_R, 122)): Likewise. (RELOC_NUMBER (R_LARCH_TLS_LE_LO12_R, 123)): Likewise.
2023-12-28x86-64: Add R_X86_64_CODE_4_GOTTPOFF/R_X86_64_CODE_4_GOTPC32_TLSDESCH.J. Lu1-0/+6
For add name@gottpoff(%rip), %reg mov name@gottpoff(%rip), %reg add # define R_X86_64_CODE_4_GOTTPOFF 44 and for lea name@tlsdesc(%rip), %reg add # define R_X86_64_CODE_4_GOTPC32_TLSDESC 45 if the instruction starts at 4 bytes before the relocation offset. They are similar to R_X86_64_GOTTPOFF and R_X86_64_GOTPC32_TLSDESC, respectively. Linker can covert GOTTPOFF to add $name@tpoff, %reg mov $name@tpoff, %reg and GOTPC32_TLSDESC to mov $name@tpoff, %reg mov name@gottpoff(%rip), %reg if the instruction is encoded with the REX2 prefix when possible. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (elf_x86_64_check_tls_transition): Handle R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC. (elf_x86_64_tls_transition): Likewise. (elf_x86_64_scan_relocs): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (md_assemble): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF. (output_insn): Don't add empty REX prefix with REX2 prefix. (output_disp): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. (md_apply_fix): Likewise. (i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTTPOFF or BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC if ixp->fx_tcbit3 is set. (tc_gen_reloc): Handle BFD_RELOC_X86_64_CODE_4_GOTTPOFF and BFD_RELOC_X86_64_CODE_4_GOTPC32_TLSDESC. * testsuite/gas/i386/x86-64-gottpoff.d: New file. * testsuite/gas/i386/x86-64-gottpoff.s: Likewise. * testsuite/gas/i386/x86-64-tlsdesc.d: Likewise. * testsuite/gas/i386/x86-64-tlsdesc.s: Likewise. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC ld/ * testsuite/ld-x86-64/tlsbindesc.d: Updated. * testsuite/ld-x86-64/tlsbindesc.rd: Likewise. * testsuite/ld-x86-64/tlsbindesc.s: Add R_X86_64_CODE_4_GOTTPOFF and R_X86_64_CODE_4_GOTPC32_TLSDESC tests.
2023-12-28x86-64: Add R_X86_64_CODE_4_GOTPCRELXH.J. Lu1-1/+5
For mov name@GOTPCREL(%rip), %reg test %reg, name@GOTPCREL(%rip) binop name@GOTPCREL(%rip), %reg where binop is one of adc, add, add, cmp, or, sbb, sub, xor instructions, add # define R_X86_64_CODE_4_GOTPCRELX 43 if the instruction starts at 4 bytes before the relocation offset. It similar to R_X86_64_GOTPCRELX. Linker can treat R_X86_64_CODE_4_GOTPCRELX as R_X86_64_GOTPCREL or convert the above instructions to lea name(%rip), %reg mov $name, %reg test $name, %reg binop $name, %reg if the instruction is encoded with the REX2 prefix when possible. bfd/ * elf64-x86-64.c (x86_64_elf_howto_table): Add R_X86_64_CODE_4_GOTPCRELX. (R_X86_64_standard): Updated. (x86_64_reloc_map): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_convert_load_reloc): Handle R_X86_64_CODE_4_GOTPCRELX. (elf_x86_64_scan_relocs): Likewise. (elf_x86_64_relocate_section): Likewise. * reloc.c (bfd_reloc_code_real): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. * bfd-in2.h: Regenerated. * libbfd.h: Likewise. gas/ * write.h (fix): Add fx_tcbit3. Change fx_unused to 1 bit. * config/tc-i386.c (tc_i386_fix_adjustable): Handle BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (tc_gen_reloc): Likewise. (output_disp): Set fixP->fx_tcbit3 for REX2 prefix. (i386_validate_fix): Generate BFD_RELOC_X86_64_CODE_4_GOTPCRELX if fixp->fx_tcbit3 is set. * config/tc-i386.h (TC_FORCE_RELOCATION_LOCAL): Add BFD_RELOC_X86_64_CODE_4_GOTPCRELX. (TC_FORCE_RELOCATION_ABS): Likewise. * testsuite/gas/i386/x86-64-gotpcrel.s: Add tests for R_X86_64_CODE_4_GOTPCRELX. * testsuite/gas/i386/x86-64-localpic.s: Likewise. * testsuite/gas/i386/x86-64-gotpcrel.d: Updated. * testsuite/gas/i386/x86-64-localpic.d: Likewise. * testsuite/gas/i386/ilp32/x86-64-localpic.d: Likewise. include/ * elf/x86-64.h (elf_x86_64_reloc_type): Add R_X86_64_CODE_4_GOTPCRELX. ld/ * testsuite/ld-x86-64/apx-load1.s: New file. * testsuite/ld-x86-64/apx-load1a.d: Likewise. * testsuite/ld-x86-64/apx-load1b.d: Likewise. * testsuite/ld-x86-64/apx-load1c.d: Likewise. * testsuite/ld-x86-64/apx-load1d.d: Likewise. * testsuite/ld-x86-64/x86-64.exp: Run apx-load1a, apx-load1b, apx-load1c and apx-load1d.
2023-12-28x86: Add NT_X86_SHSTK noteSchimpe, Christina1-0/+3
Define NT_X86_SHSTK which is the note for x86 Shadow Stack (SHSTK) to support Intel SHSTK in Linux kernel. For now only userspace shadow stack and kernel IBT are supported by the linux kernel. This note should be used instead of NT_X86_CET introduced in the commit "x86: Add NT_X86_CET note", as it is outdated and only used by old binutils versions.
2023-12-25LoongArch: Add support for TLS LD/GD/DESC relaxationmengqinggang1-0/+4
The pcalau12i + addi.d of TLS LD/GD/DESC relax to pcaddi. Relaxation is only performed when the TLS model transition is not possible.
2023-12-25LoongArch: Add new relocs and macro for TLSDESC.Lulu Cai1-1/+21
The normal DESC instruction sequence is: pcalau12i $a0,%desc_pc_hi20(var) #R_LARCH_TLS_DESC_PC_HI20 addi.d $a0,$a0,%desc_pc_lo12(var) #R_LARCH_TLS_DESC_PC_LO12 ld.d $ra,$a0,%desc_ld(var) #R_LARCH_TLS_DESC_LD jirl $ra,$ra,%desc_call(var) #R_LARCH_TLS_DESC_CALL add.d $a0,$a0,$tp
2023-12-18LoongArch: Add new relocation R_LARCH_CALL36mengqinggang1-0/+2
R_LARCH_CALL36 is used for medium code model function call pcaddu18i+jirl, and these two instructions must adjacent. The LoongArch ABI v2.20 at here: https://github.com/loongson/la-abi-specs.
2023-11-10bfd, binutils: add gfx11 amdgpu architecturesSimon Marchi1-0/+3
Teach bfd and readelf about some recent gfx11 architectures. This code is taken from the rocgdb 5.7.x branch [1]. [1] https://github.com/rocm-Developer-Tools/rocgdb/tree/rocm-5.7.x bfd/ChangeLog: * archures.c (bfd_mach_amdgcn_gfx1100, bfd_mach_amdgcn_gfx1101, bfd_mach_amdgcn_gfx1102): New. * bfd-in2.h (bfd_mach_amdgcn_gfx1100, bfd_mach_amdgcn_gfx1101, bfd_mach_amdgcn_gfx1102): New. * cpu-amdgcn.c (arch_info_struct): Add entries for bfd_mach_amdgcn_gfx1100, bfd_mach_amdgcn_gfx1101, bfd_mach_amdgcn_gfx1102. binutils/ChangeLog: * readelf.c (decode_AMDGPU_machine_flags): Handle gfx1100, gfx1101, gfx1102. include/ChangeLog: * elf/amdgpu.h (EF_AMDGPU_MACH_AMDGCN_GFX1100, EF_AMDGPU_MACH_AMDGCN_GFX1101, EF_AMDGPU_MACH_AMDGCN_GFX1102): New. Change-Id: I95a8a62942e359781a1c9fa2079950fbcf2a78b8 Co-Authored-By: Laurent Morichetti <laurent.morichetti@amd.com> Cc: Lancelot Six <lancelot.six@amd.com>
2023-11-10MIPS: Change all E_MIPS_* to EF_MIPS_*Ying Huang1-38/+81
2023-11-06RISC-V: Moved out linker internal relocations after R_RISCV_max.Nelson Chu1-0/+8
Just the lightest modifications about this, without any further checks and considering --emit-relocs. We will need to improve it in the future, but first do this to avoid conflicts between linker internal relocations and the new definition of psabi. For example, TLSDESC relocs. Passed riscv-gnu-toolchain regressions, so should be safe enough to commit. Co-authored-by: Tsukasa OI <research_trasio@irq.a4lg.com> bfd/ * reloc.c: Removed linker internal relocations. * bfd-in2.h: Regenerated. * libbfd.h: Regenerated. * elfnn-riscv.c: Defined R_RISCV_DELETE in include/elf/riscv.h. * elfxx-riscv.c (howto_table, howto_table_internal): Moved linker internal relocations from howto_table into howto_table_internal. (riscv_reloc_map): Removed linker internal relocations mapping. (riscv_elf_rtype_to_howto): Return howto of linker internal relocations from howto_table_internal. include/ * elf/riscv.h: Defined linker internal relocations after R_RISCV_max.
2023-10-30Accept and ignore the R_BPF_64_NODLYD32 relocation.Nick Clifton1-2/+2
2023-10-20bfd: microblaze: Add 32_NONE reloc typeNeal Frager1-0/+1
This patch adds the R_MICROBLAZE_32_NONE relocation type. This is a 32-bit reloc that stores the 32-bit pc relative value in two words (with an imm instruction). Add test case to gas test suite. Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michael J. Eager <eager@eagercon.com>
2023-10-07Revert "opcodes: microblaze: Add new bit-field instructions"Michael J. Eager1-1/+0
This reverts commit 6bbf249557ba17cfebe01c67370df4da9e6a56f9. Maciej W. Rozycki <macro@orcam.me.uk>: Yet it has caused numerous regressions: microblaze-elf +FAIL: unordered .debug_info references to .debug_ranges microblaze-elf +FAIL: binutils-all/pr26548 microblaze-elf +FAIL: readelf -Wwi pr26548e (reason: unexpected output) microblaze-elf +FAIL: readelf --debug-dump=loc locview-1 (reason: unexpected output) Yet it has caused numerous regressions: microblaze-elf +FAIL: unordered .debug_info references to .debug_ranges microblaze-elf +FAIL: binutils-all/pr26548 microblaze-elf +FAIL: readelf -Wwi pr26548e (reason: unexpected output) ...
2023-10-06gdb: support rseq auxvsIlya Leoshkevich1-0/+2
Linux kernel commit commit 317c8194e6ae ("rseq: Introduce feature size and alignment ELF auxiliary vector entries") introduced two new auxvs: AT_RSEQ_FEATURE_SIZE and AT_RSEQ_ALIGN. Support them in GDB. This fixes auxv.exp on kernels >= v6.3. Change-Id: I8966c4d5c73eb7b45de6d410a9b28a6628edad2e Bug: https://sourceware.org/bugzilla/show_bug.cgi?id=30540 Approved-By: Tom Tromey <tom@tromey.com>
2023-10-06opcodes: microblaze: Add new bit-field instructionsNeal Frager1-0/+1
This patches adds new bsefi and bsifi instructions. BSEFI- The instruction shall extract a bit field from a register and place it right-adjusted in the destination register. The other bits in the destination register shall be set to zero. BSIFI- The instruction shall insert a right-adjusted bit field from a register at another position in the destination register. The rest of the bits in the destination register shall be unchanged. Further documentation of these instructions can be found here: https://docs.xilinx.com/v/u/en-US/ug984-vivado-microblaze-ref This patch has been tested for years of AMD Xilinx Yocto releases as part of the following patch set: https://github.com/Xilinx/meta-xilinx/tree/master/meta-microblaze/recipes-devtools/binutils/binutils Signed-off-by: nagaraju <nagaraju.mekala@amd.com> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@amd.com> Signed-off-by: Neal Frager <neal.frager@amd.com> Signed-off-by: Michael J. Eager <eager@eagercon.com>
generated by cgit v1.1 at 2026-02-10 12:06:20 +0000