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2024-06-06arm: fix testsuite fallout on arm-elf and arm-nto from FPA removalRichard Earnshaw5-3/+7
2024-06-06RISC-V: Add support for Zvfbfwma extensionXiao Zeng4-0/+22
2024-06-06RISC-V: Add support for Zvfbfmin extensionXiao Zeng4-0/+22
2024-06-06RISC-V: Add support for Zfbfmin extensionXiao Zeng4-0/+20
2024-06-05arm: minor documentation cleanup given removal of FPARichard Earnshaw1-3/+0
2024-06-05arm: remove disassembly support for the FPA co-processorRichard Earnshaw2-6/+6
2024-06-05arm: remove FPA instructions from assemblerRichard Earnshaw1-699/+0
2024-06-05arm: remove options to select the FPARichard Earnshaw2-23/+2
2024-06-05arm: change default FPUs from FPA to noneRichard Earnshaw1-62/+63
2024-06-05arm: redirect fp constant data directives through a wrapperRichard Earnshaw12-10/+55
2024-06-05arm: adjust FPU selection logicRichard Earnshaw1-9/+2
2024-06-05arm: default to softvfp on armv6 or later coresRichard Earnshaw1-17/+17
2024-06-05arm: rename FPU_ARCH_VFP to FPU_ARCH_SOFTVFPRichard Earnshaw5-58/+96
2024-06-05arm: remove FPA related testsRichard Earnshaw27-1858/+119
2024-06-05RISC-V: Tidy vendor core-v extension gas testcasesNelson Chu146-1629/+1393
2024-06-05RISC-V: Add support for XCVmem extension in CV32E40PMary Bennett68-0/+730
2024-06-05RISC-V: Add support for XCVbi extension in CV32E40PMary Bennett19-1/+102
2024-06-05RISC-V: Add support for XCVelw extension in CV32E40PMary Bennett10-0/+191
2024-06-04LoongArch: Make align symbol be in same section with alignment directivemengqinggang5-4/+103
2024-06-04arm: testsuite: fix msdos line endings in testsRichard Earnshaw2-18/+18
2024-05-31aarch64, testsuite: avoid regexes in opcode fieldClaudio Bantaloukas2-493/+493
2024-05-31gas, aarch64: Fixes in texi and tests following faminmax and lut changessaurabh.jha@arm.com4-162/+162
2024-05-31x86: reduce check_{byte,word,long,qword}_reg() overheadJan Beulich1-4/+15
2024-05-29x86/Intel: warn about undue mnemonic suffixesJan Beulich33-157/+117
2024-05-29x86/Intel: SHLD/SHRD have dual meaningJan Beulich4-2/+79
2024-05-29PR31796, Internal error in write_function_pdata at obj-coff-sehAlan Modra1-2/+22
2024-05-28gas, aarch64: Add SVE2 lut extensionsaurabh.jha@arm.com9-1/+464
2024-05-28gas, aarch64: Add AdvSIMD lut extensionsaurabh.jha@arm.com10-0/+499
2024-05-28Fix typo in assembler documentationNick Clifton1-1/+1
2024-05-28Fix: internal error in write_function_pdata at obj-coff-sehNick Clifton1-0/+5
2024-05-28RISC-V: Fix U insn; replace opcode6 with opcode7 in gas/doc/c-riscv.texiJavier Mora1-22/+22
2024-05-24Re: LoongArch: gas: Adjust DWARF CIE alignment factorsAlan Modra1-22/+22
2024-05-24gas: extend \+ support to .irp / .irpcJan Beulich6-23/+24
2024-05-24gas: adjust handling of quotes for .irpcJan Beulich5-21/+40
2024-05-24x86: simplify VexVVVV_SRC2 handling for the XOP caseJan Beulich1-9/+5
2024-05-24x86: simplify / consolidate check_{word,long,qword}_reg()Jan Beulich1-16/+4
2024-05-24x86: correct VCVT{,U}SI2SDJan Beulich3-5/+56
2024-05-22restore build with --enable-maintainer-modeIndu Bhagat3-3/+0
2024-05-22aarch64: fix incorrect encoding for system register pmsdsfr_el1Matthieu Longo1-2/+2
2024-05-22Support APX zero-upperCui, Lili7-2/+288
2024-05-22X86: Remove "i.rex" to eliminate extra conditional branchCui, Lili1-1/+1
2024-05-22Add check for 8-bit old registers in EVEX formatCui, Lili3-3/+9
2024-05-22x86: Split REX/REX2 old registers judgment.Cui, Lili1-16/+14
2024-05-21gas: ginsn: remove unnecessary buffer allocation and freeIndu Bhagat1-15/+12
2024-05-21gas: drop remnants of ia64-*-aix*Jan Beulich2-24/+0
2024-05-20aarch64: Add support for the fpmr system registerClaudio Bantaloukas4-0/+23
2024-05-20RISC-V: PR31733, Change initial CFI operation from DW_CFA_def_cfa_register to...Sung-hun Kim1-1/+1
2024-05-17aarch64: correct SVE2.1 ld2q (scalar plus scalar)Jan Beulich1-1/+1
2024-05-17aarch64: correct SVE2.1 ld{3,4}q / st{3,4}q (scalar plus immediate)Jan Beulich3-13/+13
2024-05-17LoongArch: gas: Adjust DWARF CIE alignment factorsmengqinggang1-5/+9