aboutsummaryrefslogtreecommitdiff
path: root/include/opcode
diff options
context:
space:
mode:
authorTamar Christina <tamar.christina@arm.com>2018-10-03 18:27:52 +0100
committerTamar Christina <tamar.christina@arm.com>2018-10-03 18:33:33 +0100
commit7e84b55d8f973b011f55f604a76c2d1d989d0b6b (patch)
tree1d860bb0c911056c9fed87fc0b3e46ec30723c91 /include/opcode
parenteae424aef0b14e1765602088ac866b95d14d4a22 (diff)
downloadbinutils-7e84b55d8f973b011f55f604a76c2d1d989d0b6b.zip
binutils-7e84b55d8f973b011f55f604a76c2d1d989d0b6b.tar.gz
binutils-7e84b55d8f973b011f55f604a76c2d1d989d0b6b.tar.bz2
AArch64: Wire through instr_sequence
This patch introduces aarch64_instr_sequence which is a structure similar to IT blocks on Arm in order to track instructions that introduce a constraint or dependency on instruction 1..N positions away from the instruction that opened the block. The struct is also wired through to the locations that require it. gas/ * config/tc-aarch64.c (now_instr_sequence): (*insn_sequence, now_instr_sequence): New. (output_operand_error_record, do_encode): Add insn_sequence. (md_assemble): Update insn_sequence. (try_to_encode_as_unscaled_ldst, fix_mov_imm_insn, fix_insn): Pass insn_sequence. * config/tc-aarch64.h (struct aarch64_segment_info_type): Add insn_sequence. include/ * opcode/aarch64.h (struct aarch64_instr_sequence): New. (aarch64_opcode_encode): Use it. opcodes/ * aarch64-asm.c (aarch64_opcode_encode): Add insn_sequence. * aarch64-dis.c (insn_sequence): New.
Diffstat (limited to 'include/opcode')
-rw-r--r--include/opcode/aarch64.h24
1 files changed, 22 insertions, 2 deletions
diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h
index c7d9008..10bf097 100644
--- a/include/opcode/aarch64.h
+++ b/include/opcode/aarch64.h
@@ -662,6 +662,13 @@ empty_qualifier_sequence_p (const aarch64_opnd_qualifier_t *qualifiers)
return TRUE;
}
+/* Forward declare error reporting type. */
+typedef struct aarch64_operand_error aarch64_operand_error;
+/* Forward declare instruction sequence type. */
+typedef struct aarch64_instr_sequence aarch64_instr_sequence;
+/* Forward declare instruction definition. */
+typedef struct aarch64_inst aarch64_inst;
+
/* This structure holds information for a particular opcode. */
struct aarch64_opcode
@@ -1124,14 +1131,27 @@ struct aarch64_operand_error
bfd_boolean non_fatal;
};
-typedef struct aarch64_operand_error aarch64_operand_error;
+/* AArch64 sequence structure used to track instructions with F_SCAN
+ dependencies for both assembler and disassembler. */
+struct aarch64_instr_sequence
+{
+ /* The instruction that caused this sequence to be opened. */
+ aarch64_inst *instr;
+ /* The number of instructions the above instruction allows to be kept in the
+ sequence before an automatic close is done. */
+ int num_insns;
+ /* The instructions currently added to the sequence. */
+ aarch64_inst **current_insns;
+ /* The number of instructions already in the sequence. */
+ int next_insn;
+};
/* Encoding entrypoint. */
extern int
aarch64_opcode_encode (const aarch64_opcode *, const aarch64_inst *,
aarch64_insn *, aarch64_opnd_qualifier_t *,
- aarch64_operand_error *);
+ aarch64_operand_error *, aarch64_instr_sequence *);
extern const aarch64_opcode *
aarch64_replace_opcode (struct aarch64_inst *,