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rocket-tools/riscv-tests.git
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ceasetest2
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debug-0.13
debug-clear-satp
debug-delete-sim
debug_auth
debug_disassemble
disable_unavailable
dma-memcpy
eos20-bringup
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misc
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riscv-tests-sail
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Author
Files
Lines
2018-03-21
Make misa.C test conform to Hauser proposal
Andrew Waterman
1
-43
/
+10
2018-02-27
Add test for clearing misa.C while PC is misaligned (#117)
Andrew Waterman
1
-1
/
+79
2017-11-27
Rename sbadaddr to satp
Andrew Waterman
1
-1
/
+1
2017-11-22
Check sepc for rv64si/scall test. (#107)
Christopher Celio
1
-0
/
+4
2017-11-11
Make sure that code is 4-byte aligned before disabling rvc (#100)
Andrew Waterman
1
-0
/
+1
2017-11-09
Make rv64mi-p-ecall work when U-mode is not present
Andrew Waterman
1
-1
/
+17
2017-11-09
Use mstatus.MPP to check existence of U-mode
Andrew Waterman
1
-5
/
+6
2017-11-01
SBREAK test now checks EPC value. (#92)
Christopher Celio
1
-0
/
+4
2017-10-30
Declare trap handlers as global symbols. (#87)
Richard Xia
5
-0
/
+5
2017-10-26
Verify that mtval/stval is written correctly on misaligned fetch
Andrew Waterman
1
-1
/
+9
2017-10-26
Fix rv64mi-csr for the case where U-mode is not available. (#86)
Richard Xia
1
-0
/
+16
2017-09-01
Improve ma_fetch test to cover JAL and branches
Andrew Waterman
1
-1
/
+48
2017-08-07
rv64[ms]i-csr: Only emit F instructions when compiled for F.
Richard Xia
1
-1
/
+6
2017-05-05
Check UXL in sstatus
Andrew Waterman
1
-0
/
+5
2017-05-05
Test that superpage PTEs trap when PPN LSBs are set
Andrew Waterman
1
-0
/
+18
2017-05-05
Regularize control flow in dirty-bit test
Andrew Waterman
1
-8
/
+12
2017-03-30
Expand dirty-bit test to test MPRV and SUM
Andrew Waterman
1
-27
/
+30
2017-03-27
Separate page faults from physical memory access exceptions
Andrew Waterman
1
-1
/
+1
2017-03-21
Allow supervisor access to user pages in dirty-bit test
Andrew Waterman
1
-1
/
+1
2017-03-09
Permit flexible dirty-bit behavior
Andrew Waterman
1
-16
/
+26
2016-11-01
Make sure FP stores don't write memory if mstatus.FS=0.
Andrew Waterman
1
-8
/
+22
2016-08-26
Update to new breakpoint & counter spec
Andrew Waterman
1
-6
/
+6
2016-07-22
skip user-mode trap tests in rv32mi/rv64mi-p-csr if no user mode
Howard Mao
1
-0
/
+9
2016-07-22
Move dirty bit test to rv64si directory
Andrew Waterman
2
-0
/
+94
2016-07-22
Make ma_fetch test robust against code size changes
Andrew Waterman
1
-2
/
+4
2016-07-11
Remove instruction width assumptions to support RVC
Andrew Waterman
4
-6
/
+6
2016-07-07
Update WFI test for priv v1.9
Andrew Waterman
1
-2
/
+3
2016-05-02
Remove incorrect M-mode WFI test
Andrew Waterman
1
-9
/
+0
2016-04-30
ERET -> xRET; new memory map
Andrew Waterman
4
-17
/
+13
2016-03-03
Make WFI test more strict
Andrew Waterman
1
-3
/
+1
2016-03-03
Some S-mode tests really only belong in M-mode
Andrew Waterman
4
-154
/
+9
2016-03-03
Fix ma_fetch to work with or without RVC
Andrew Waterman
1
-8
/
+18
2016-03-03
WIP on priv spec v1.9
Andrew Waterman
3
-21
/
+21
2015-07-05
New M-mode timers
Andrew Waterman
2
-1127
/
+0
2015-05-19
Add basic WFI test
Andrew Waterman
2
-0
/
+42
2015-05-09
Update to privileged architecture version 1.7
Andrew Waterman
3
-12
/
+19
2015-03-25
split out S-mode tests and M-mode tests
Yunsup Lee
10
-186
/
+96
2015-03-24
Don't assume PRV1/2 and IE1/2 are reset
Andrew Waterman
1
-1
/
+1
2015-03-21
Merge rv64si and rv32si tests
Andrew Waterman
6
-0
/
+309
2015-03-17
Merge [shm]call into ecall, [shm]ret into eret
Andrew Waterman
2
-2
/
+2
2015-03-14
Add PTE dirty bit test
Andrew Waterman
2
-0
/
+85
2015-03-12
Update to new privileged spec
Andrew Waterman
5
-77
/
+53
2015-02-19
Unify rv32/rv64 timer tests
Andrew Waterman
1
-5
/
+7
2015-01-09
Add LICENSE
Andrew Waterman
4
-0
/
+8
2015-01-04
Avoid deprecated "b" pseudo-op; use "j" instead
Andrew Waterman
1
-2
/
+2
2014-12-03
Make timer test more thorough
Andrew Waterman
1
-12
/
+1043
2014-05-07
Add timer interrupt test
Andrew Waterman
3
-4
/
+66
2014-01-31
Add rv32si tests, including illegality of shamt[5]
Andrew Waterman
1
-1
/
+1
2014-01-31
Make CSR test much more robust
Andrew Waterman
1
-0
/
+52
2014-01-21
Add CSRRx/CSRRxI test
Andrew Waterman
3
-1
/
+35
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