| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2020-12-15 | Add support for the UART interface on the LiteX SoC (#230) | gsomlo | 1 | -0/+14 | |
| Tested using the RocketChip CPU option. (see https://github.com/enjoy-digital/litex) Signed-off-by: Gabriel Somlo <gsomlo@gmail.com> | |||||
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index : rocket-tools/riscv-pk.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
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