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author | gsomlo <gsomlo@gmail.com> | 2020-12-15 16:11:40 -0500 |
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committer | GitHub <noreply@github.com> | 2020-12-15 13:11:40 -0800 |
commit | 62bb5daea5ef014616b00a63c106afdd07e68ffd (patch) | |
tree | 66d1d74fd95fa1a6b319ba857d6c3ca4ec434aa5 /machine/uart_litex.h | |
parent | 5c159feca11473822906ec9595f7593aba60222f (diff) | |
download | riscv-pk-62bb5daea5ef014616b00a63c106afdd07e68ffd.zip riscv-pk-62bb5daea5ef014616b00a63c106afdd07e68ffd.tar.gz riscv-pk-62bb5daea5ef014616b00a63c106afdd07e68ffd.tar.bz2 |
Add support for the UART interface on the LiteX SoC (#230)
Tested using the RocketChip CPU option.
(see https://github.com/enjoy-digital/litex)
Signed-off-by: Gabriel Somlo <gsomlo@gmail.com>
Diffstat (limited to 'machine/uart_litex.h')
-rw-r--r-- | machine/uart_litex.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/machine/uart_litex.h b/machine/uart_litex.h new file mode 100644 index 0000000..a10dc57 --- /dev/null +++ b/machine/uart_litex.h @@ -0,0 +1,14 @@ +// See LICENSE for license details. + +#ifndef _RISCV_UARTLR_H +#define _RISCV_UARTLR_H + +#include <stdint.h> + +extern volatile unsigned int *uart_litex; + +void uart_litex_putchar(uint8_t ch); +int uart_litex_getchar(); +void query_uart_litex(uintptr_t dtb); + +#endif |