| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-01-06 | Support RV32E/RV64E base ISAs | Andrew Waterman | 1 | -2/+25 |
| 2021-11-08 | Move definitions of P and require macros | Andrew Waterman | 1 | -0/+1 |
| 2021-09-15 | Fix signed/unsigned warnings | Andrew Waterman | 1 | -2/+4 |
| 2015-09-08 | Add facility to instrument specific opcodes | Andrew Waterman | 1 | -0/+2 |
| 2015-02-08 | Use xlen, not xprlen, to refer to x-register width | Andrew Waterman | 1 | -4/+4 |
| 2014-07-07 | Use precompiled headers to speed up compilation | Andrew Waterman | 1 | -7/+1 |
| 2013-08-11 | Instructions are no longer member functions | Andrew Waterman | 1 | -2/+2 |
| 2013-08-08 | Disentangle some header files | Andrew Waterman | 1 | -1/+1 |
| 2013-07-26 | Generate instruction decoder dynamically | Andrew Waterman | 1 | -0/+25 |
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index : rocket-tools/riscv-isa-sim.git | |
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