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AgeCommit message (Expand)AuthorFilesLines
2022-05-25Actually inline load_fast/store_fast for clang/ARMsimplify-misalignedAndrew Waterman2-4/+6
2022-05-25Simplify handling of misaligned loads/storesAndrew Waterman1-51/+37
2022-05-25Fix trigger store priority.Tim Newsome2-14/+36
2022-05-24Make templated store_fast() for use with store_func()Tim Newsome1-29/+39
2022-05-24Don't check alignment before load_slow_path()Tim Newsome1-4/+8
2022-05-24Add require_alignment to load_slow_path().Tim Newsome2-3/+20
2022-05-23Turn load_fast() from macro into templateTim Newsome1-31/+36
2022-05-23Check early for trigger address in fast load_func()Tim Newsome1-1/+8
2022-05-23Use `size` variable consistently.Tim Newsome1-8/+8
2022-05-23Check address for triggers before the access happens.Tim Newsome2-0/+22
2022-05-23Use idiomatic iteration.Tim Newsome1-2/+2
2022-05-23Add memory_access_match() to triggers.Tim Newsome2-3/+47
2022-05-16Include recently added headers in riscv/riscv.mk.inPirmin Vogel1-0/+3
2022-05-13Merge pull request #997 from riscv-software-src/simplify-decode_insnAndrew Waterman3-19/+18
2022-05-12Remove now-unnecessary null check from decode_insnAndrew Waterman1-2/+2
2022-05-12Assert that nullptrs can't make their way into the instructions listAndrew Waterman1-0/+2
2022-05-12Remove insn_func_t::supported fieldAndrew Waterman3-10/+5
2022-05-12Don't register instructions that aren't supportedAndrew Waterman1-8/+10
2022-05-11Merge pull request #992 from rbuchner-aril/rb-pbmteAndrew Waterman4-6/+37
2022-05-11Check for reserved PBMT values during tablewalks and fault if foundRyan Buchner1-0/+4
2022-05-11Switch from checking for SVPBMT extension to checking *ENVCFG values during t...Ryan Buchner1-2/+4
2022-05-11Add PBMTE bit to menvcfg and henvcfg mask valuesRyan Buchner1-4/+8
2022-05-11Change henvcfg csr to a henvcfg_csr_tRyan Buchner3-1/+22
2022-05-11rvv: fix the checking eew and elen for index loadChih-Min Chao1-0/+1
2022-05-05Factor out P extension macros into their own headerfactor-out-macrosAndrew Waterman2-500/+507
2022-05-05Factor out V extension macros into their own headerAndrew Waterman2-2069/+2076
2022-05-05Merge pull request #983 from soberl/epmp_updates_2Scott Johnson5-13/+130
2022-05-04Update pmpaddr_csr_t::access_ok() for ePMP on matching regionssoberl@nvidia.com1-5/+31
2022-05-04Update mmu_t::pmp_ok() for ePMP in case matching region is not foundsoberl@nvidia.com1-1/+5
2022-05-04Update csr access rules for ePMP on pmpaddr and pmpcfgsoberl@nvidia.com1-7/+31
2022-05-04Implement the new csr mseccfg for ePMP as dummysoberl@nvidia.com4-0/+63
2022-05-04Merge pull request #985 from riscv-software-src/trigger_hitAndrew Waterman2-11/+18
2022-05-04Fix the padding of register names in the log (#987)Shaked Flur1-1/+1
2022-05-02Use MCONTROL_TYPE_MATCH macro instead of 2Tim Newsome1-1/+1
2022-05-02Implement mcontrol trigger hit bit.Tim Newsome2-1/+14
2022-04-22Remove mcontrol_t.hTim Newsome2-4/+1
2022-04-22Remove maskmax as a variable.Tim Newsome2-3/+2
2022-04-22Remove mcontrol_t.type.Tim Newsome2-3/+2
2022-04-22Whitespace fix.Tim Newsome1-1/+0
2022-04-21Pass acutally_store from store_func to misaligned_storeRyan Buchner1-1/+1
2022-04-21Add actually_store tag to misaligned_store functionRyan Buchner1-2/+2
2022-04-21Modify store_func to throw fault if misaligned and require_alignment=trueRyan Buchner1-2/+4
2022-04-21Set require alignment to true on the 'fake' store in amo_func.Ryan Buchner1-1/+1
2022-04-21Add require_alignment tag to store_funcRyan Buchner1-1/+1
2022-04-14Merge pull request #975 from plctlab/plct-code-styleAndrew Waterman5-299/+321
2022-04-14add support for overlap instructionsWeiwei Li4-6/+25
2022-04-14fix style problems in decode.h and processor.ccWeiwei Li2-293/+296
2022-04-13Merge pull request #954 from rswarbrick/more-cfgAndrew Waterman3-28/+29
2022-04-13Adjust indentation in store_slow_path and store_funcRyan Buchner2-18/+18
2022-04-13Skip storing in store_func if actually_store is false, add a fake store at st...Ryan Buchner2-1/+8