Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2021-02-24 | rvv: add vsetivli | Chih-Min Chao | 1 | -0/+1 |
2021-02-24 | rvv: add vse1/vle1 | Chih-Min Chao | 1 | -0/+3 |
2021-02-23 | rvv: rename sqrt/reciprocal instructions | Chih-Min Chao | 1 | -2/+2 |
2021-02-23 | rvv: disas: reserved sew >= 128 | Chih-Min Chao | 1 | -4/+0 |
2021-01-17 | rvb: add xperm.[nbhw] (#629) | Chih-Min Chao | 1 | -0/+4 |
2021-01-08 | Update Zba/Zbb/Zbc to v0.93; Zbs/Zbe to v0.94-draft | Andrew Waterman | 1 | -12/+13 |
2021-01-08 | Remove RV128 fmv.x.q/fmv.q.x instructions from disassembler | Andrew Waterman | 1 | -2/+0 |
2020-12-15 | Add Zba/Zbb to disassembler | Andrew Waterman | 1 | -0/+27 |
2020-12-14 | disasm: show fench's predecessor and successor | Chih-Min Chao | 1 | -1/+25 |
2020-12-02 | rvv: index load/store have benn separated into ordered and unordered parts (#... | Chih-Min Chao | 1 | -4/+8 |
2020-10-22 | Start adding B ext to disassembler | Andrew Waterman | 1 | -0/+13 |
2020-09-29 | Partially revert removal of .pc.in files; add disasm.pc.in | Abhinay Kayastha | 1 | -1/+3 |
2020-09-22 | Separate build of spike and spike-dasm | Andrew Waterman | 4 | -0/+1334 |