| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2023-08-03 | update set_msw/clear_msw/set_mtimer/clear_mtimer | Dan Smathers | 1 | -8/+42 | |
| Added ifndef to clint addresses instead of hard-coding Added clear_msw and clear mtimer Tested against Sail/isa-sim with new proposed Smclint/Ssclint arch-tests https://github.com/riscv-non-isa/riscv-arch-test/pull/372 Building a baseline of interrupt tests that changes to SAIL/isa-sim can be tested against when other interrupt extensions are added. Signed-off-by: Dan Smathers <dan.smathers@seagate.com> | |||||
| 2022-02-26 | clean up for rv32e_unratified. | Neel Gala | 3 | -102/+3 | |
| 2022-02-25 | clean up the the arch-test directory to avoid copypasta | Neel Gala | 13 | -409/+46 | |
| - move all common stuff to a Makefile_common.inc - include this file in all individual Makefile.includes | |||||
| 2022-02-24 | adding ports to run F, D and E extension architectural tests on spike | Neel Gala | 6 | -1/+202 | |
| 2021-09-26 | Update README.md (#797) | davidharrishmc | 1 | -1/+1 | |
| Corrected path to Makefile.include | |||||
| 2021-04-05 | replace old compliance name with new arch-test name in spike target README ↵ | Allen Baum | 1 | -6/+6 | |
| (#690) | |||||
| 2021-02-02 | fixed typos and paths for arch_test readme (#638) | Neel Gala | 1 | -5/+7 | |
| Co-authored-by: Neel Gala <neelgala@incoresemi.com> | |||||
| 2021-01-21 | adding spike as a target to the arch-test-framework (#630) | Neel Gala | 14 | -0/+567 | |
| * files and collateral for adding spike as a target to the arch-test-framework * minor typo fix Co-authored-by: Neel Gala <neelgala@incoresemi.com> | |||||
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index : rocket-tools/riscv-isa-sim.git | |
| Unnamed repository; edit this file 'description' to name the repository. | root |
| aboutsummaryrefslogtreecommitdiff |
path: root/arch_test_target