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author | Andrew Waterman <andrew@sifive.com> | 2019-10-07 15:03:08 +0200 |
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committer | Andrew Waterman <andrew@sifive.com> | 2019-10-07 15:03:08 +0200 |
commit | bbe881f3c5435d02eeb7c28515bfb301470f2875 (patch) | |
tree | 40992ac01d7b5e9f2d92612b9921ee8b71380b31 /spike_main/disasm.cc | |
parent | 7cdcdfb01cb2f70aeead3743d767f2fad5c64cbf (diff) | |
download | riscv-isa-sim-bbe881f3c5435d02eeb7c28515bfb301470f2875.zip riscv-isa-sim-bbe881f3c5435d02eeb7c28515bfb301470f2875.tar.gz riscv-isa-sim-bbe881f3c5435d02eeb7c28515bfb301470f2875.tar.bz2 |
Speed up compilation of disasm.cc, especially in clang
Diffstat (limited to 'spike_main/disasm.cc')
-rw-r--r-- | spike_main/disasm.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/spike_main/disasm.cc b/spike_main/disasm.cc index 0dbdbb7..8f778a8 100644 --- a/spike_main/disasm.cc +++ b/spike_main/disasm.cc @@ -1149,7 +1149,7 @@ const disasm_insn_t* disassembler_t::lookup(insn_t insn) const return NULL; } -void disassembler_t::add_insn(disasm_insn_t* insn) +void NOINLINE disassembler_t::add_insn(disasm_insn_t* insn) { size_t idx = HASH_SIZE; if (insn->get_mask() % HASH_SIZE == HASH_SIZE - 1) |