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author | YenHaoChen <howard25336284@gmail.com> | 2024-07-02 10:12:52 +0800 |
---|---|---|
committer | YenHaoChen <howard25336284@gmail.com> | 2024-07-02 10:12:55 +0800 |
commit | ec292be4fdac9685c9d6f2f209b73743c2e573f7 (patch) | |
tree | 92c98cc1035245f614e67c2ddee626988e406575 /riscv | |
parent | 1b1a333763eae2e74dbf38b39d9adab39c4bed7c (diff) | |
download | riscv-isa-sim-ec292be4fdac9685c9d6f2f209b73743c2e573f7.zip riscv-isa-sim-ec292be4fdac9685c9d6f2f209b73743c2e573f7.tar.gz riscv-isa-sim-ec292be4fdac9685c9d6f2f209b73743c2e573f7.tar.bz2 |
Update encoding.h for pointer masking
Rename DCSR_STOPCYCLE to DCSR_STOPCOUNT
Rename DCSR_HALT to DCSR_NMIP
Diffstat (limited to 'riscv')
-rw-r--r-- | riscv/csrs.cc | 4 | ||||
-rw-r--r-- | riscv/encoding.h | 265 |
2 files changed, 114 insertions, 155 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 02a2c4f..e99ae84 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -1312,7 +1312,7 @@ reg_t dcsr_csr_t::read() const noexcept { result = set_field(result, DCSR_EBREAKU, ebreaku); result = set_field(result, CSR_DCSR_EBREAKVS, ebreakvs); result = set_field(result, CSR_DCSR_EBREAKVU, ebreakvu); - result = set_field(result, DCSR_STOPCYCLE, 0); + result = set_field(result, DCSR_STOPCOUNT, 0); result = set_field(result, DCSR_STOPTIME, 0); result = set_field(result, DCSR_CAUSE, cause); result = set_field(result, DCSR_STEP, step); @@ -1331,7 +1331,7 @@ bool dcsr_csr_t::unlogged_write(const reg_t val) noexcept { ebreaku = proc->extension_enabled('U') ? get_field(val, DCSR_EBREAKU) : false; ebreakvs = proc->extension_enabled('H') ? get_field(val, CSR_DCSR_EBREAKVS) : false; ebreakvu = proc->extension_enabled('H') ? get_field(val, CSR_DCSR_EBREAKVU) : false; - halt = get_field(val, DCSR_HALT); + halt = get_field(val, DCSR_NMIP); v = proc->extension_enabled('H') ? get_field(val, CSR_DCSR_V) : false; pelp = proc->extension_enabled(EXT_ZICFILP) ? static_cast<elp_t>(get_field(val, DCSR_PELP)) : elp_t::NO_LP_EXPECTED; diff --git a/riscv/encoding.h b/riscv/encoding.h index 4b2e0b6..d5fb1de 100644 --- a/riscv/encoding.h +++ b/riscv/encoding.h @@ -4,7 +4,7 @@ /* * This file is auto-generated by running 'make' in - * https://github.com/riscv/riscv-opcodes (7bed351) + * https://github.com/riscv/riscv-opcodes (c55d30f) */ #ifndef RISCV_CSR_ENCODING_H @@ -30,6 +30,7 @@ #define MSTATUS_TW 0x00200000 #define MSTATUS_TSR 0x00400000 #define MSTATUS_SPELP 0x00800000 +#define MSTATUS_SDT 0x01000000 #define MSTATUS32_SD 0x80000000 #define MSTATUS_UXL 0x0000000300000000 #define MSTATUS_SXL 0x0000000C00000000 @@ -38,12 +39,14 @@ #define MSTATUS_GVA 0x0000004000000000 #define MSTATUS_MPV 0x0000008000000000 #define MSTATUS_MPELP 0x0000020000000000 +#define MSTATUS_MDT 0x0000040000000000 #define MSTATUS64_SD 0x8000000000000000 #define MSTATUSH_SBE 0x00000010 #define MSTATUSH_MBE 0x00000020 #define MSTATUSH_GVA 0x00000040 #define MSTATUSH_MPV 0x00000080 +#define MSTATUSH_MDT 0x00000400 #define SSTATUS_UIE 0x00000001 #define SSTATUS_SIE 0x00000002 @@ -57,6 +60,7 @@ #define SSTATUS_SUM 0x00040000 #define SSTATUS_MXR 0x00080000 #define SSTATUS_SPELP 0x00800000 +#define SSTATUS_SDT 0x01000000 #define SSTATUS32_SD 0x80000000 #define SSTATUS_UXL 0x0000000300000000 #define SSTATUS64_SD 0x8000000000000000 @@ -71,6 +75,7 @@ #define HSTATUS_SPV 0x00000080 #define HSTATUS_GVA 0x00000040 #define HSTATUS_VSBE 0x00000020 +#define HSTATUS_HUPMM 0x0003000000000000 #define USTATUS_UIE 0x00000001 #define USTATUS_UPIE 0x00000010 @@ -79,19 +84,22 @@ #define MNSTATUS_MNPP 0x00001800 #define MNSTATUS_MNPV 0x00000080 -#define DCSR_XDEBUGVER (3U<<30) -#define DCSR_NDRESET (1<<29) -#define DCSR_FULLRESET (1<<28) +#define DCSR_XDEBUGVER (15U<<28) +#define DCSR_EXTCAUSE (7<<24) +#define DCSR_CETRIG (1<<19) #define DCSR_PELP (1<<18) +#define DCSR_EBREAKVS (1<<17) +#define DCSR_EBREAKVU (1<<16) #define DCSR_EBREAKM (1<<15) -#define DCSR_EBREAKH (1<<14) #define DCSR_EBREAKS (1<<13) #define DCSR_EBREAKU (1<<12) -#define DCSR_STOPCYCLE (1<<10) +#define DCSR_STEPIE (1<<11) +#define DCSR_STOPCOUNT (1<<10) #define DCSR_STOPTIME (1<<9) #define DCSR_CAUSE (7<<6) -#define DCSR_DEBUGINT (1<<5) -#define DCSR_HALT (1<<3) +#define DCSR_V (1<<5) +#define DCSR_MPRVEN (1<<4) +#define DCSR_NMIP (1<<3) #define DCSR_STEP (1<<2) #define DCSR_PRV (3<<0) @@ -168,10 +176,13 @@ #define MENVCFG_CBIE 0x00000030 #define MENVCFG_CBCFE 0x00000040 #define MENVCFG_CBZE 0x00000080 +#define MENVCFG_PMM 0x0000000300000000 +#define MENVCFG_DTE 0x0800000000000000 #define MENVCFG_ADUE 0x2000000000000000 #define MENVCFG_PBMTE 0x4000000000000000 #define MENVCFG_STCE 0x8000000000000000 +#define MENVCFGH_DTE 0x08000000 #define MENVCFGH_ADUE 0x20000000 #define MENVCFGH_PBMTE 0x40000000 #define MENVCFGH_STCE 0x80000000 @@ -179,6 +190,7 @@ #define MSTATEEN0_CS 0x00000001 #define MSTATEEN0_FCSR 0x00000002 #define MSTATEEN0_JVT 0x00000004 +#define MSTATEEN0_CTR 0x0040000000000000 #define MSTATEEN0_PRIV114 0x0080000000000000 #define MSTATEEN0_HCONTEXT 0x0200000000000000 #define MSTATEEN0_AIA 0x0800000000000000 @@ -186,6 +198,7 @@ #define MSTATEEN0_HENVCFG 0x4000000000000000 #define MSTATEEN_HSTATEEN 0x8000000000000000 +#define MSTATEEN0H_CTR 0x00400000 #define MSTATEEN0H_PRIV114 0x00800000 #define MSTATEEN0H_HCONTEXT 0x02000000 #define MSTATEEN0H_AIA 0x08000000 @@ -213,10 +226,13 @@ #define HENVCFG_CBIE 0x00000030 #define HENVCFG_CBCFE 0x00000040 #define HENVCFG_CBZE 0x00000080 +#define HENVCFG_PMM 0x0000000300000000 +#define HENVCFG_DTE 0x0800000000000000 #define HENVCFG_ADUE 0x2000000000000000 #define HENVCFG_PBMTE 0x4000000000000000 #define HENVCFG_STCE 0x8000000000000000 +#define HENVCFGH_DTE 0x08000000 #define HENVCFGH_ADUE 0x20000000 #define HENVCFGH_PBMTE 0x40000000 #define HENVCFGH_STCE 0x80000000 @@ -236,12 +252,14 @@ #define HSTATEEN0_CS 0x00000001 #define HSTATEEN0_FCSR 0x00000002 #define HSTATEEN0_JVT 0x00000004 +#define HSTATEEN0_CTR 0x0040000000000000 #define HSTATEEN0_SCONTEXT 0x0200000000000000 #define HSTATEEN0_AIA 0x0800000000000000 #define HSTATEEN0_CSRIND 0x1000000000000000 #define HSTATEEN0_SENVCFG 0x4000000000000000 #define HSTATEEN_SSTATEEN 0x8000000000000000 +#define HSTATEEN0H_CTR 0x00400000 #define HSTATEEN0H_SCONTEXT 0x02000000 #define HSTATEEN0H_AIA 0x08000000 #define HSTATEEN0H_CSRIND 0x10000000 @@ -254,6 +272,7 @@ #define SENVCFG_CBIE 0x00000030 #define SENVCFG_CBCFE 0x00000040 #define SENVCFG_CBZE 0x00000080 +#define SENVCFG_PMM 0x0000000300000000 #define SSTATEEN0_CS 0x00000001 #define SSTATEEN0_FCSR 0x00000002 @@ -265,6 +284,7 @@ #define MSECCFG_USEED 0x00000100 #define MSECCFG_SSEED 0x00000200 #define MSECCFG_MLPE 0x00000400 +#define MSECCFG_PMM 0x0000000300000000 /* jvt fields */ #define JVT_MODE 0x3F @@ -324,6 +344,73 @@ #define PMP_NA4 0x10 #define PMP_NAPOT 0x18 +#define MCTRCTL_U 0x0000000000000001 +#define MCTRCTL_S 0x0000000000000002 +#define MCTRCTL_M 0x0000000000000004 +#define MCTRCTL_RASEMU 0x0000000000000080 +#define MCTRCTL_STE 0x0000000000000100 +#define MCTRCTL_MTE 0x0000000000000200 +#define MCTRCTL_BPFRZ 0x0000000000000800 +#define MCTRCTL_LCOFIFRZ 0x0000000000001000 +#define MCTRCTL_EXCINH 0x0000000200000000 +#define MCTRCTL_INTRINH 0x0000000400000000 +#define MCTRCTL_TRETINH 0x0000000800000000 +#define MCTRCTL_NTBREN 0x0000001000000000 +#define MCTRCTL_TKBRINH 0x0000002000000000 +#define MCTRCTL_INDCALLINH 0x0000010000000000 +#define MCTRCTL_DIRCALLINH 0x0000020000000000 +#define MCTRCTL_INDJMPINH 0x0000040000000000 +#define MCTRCTL_DIRJMPINH 0x0000080000000000 +#define MCTRCTL_CORSWAPINH 0x0000100000000000 +#define MCTRCTL_RETINH 0x0000200000000000 +#define MCTRCTL_INDLJMPINH 0x0000400000000000 +#define MCTRCTL_DIRLJMPINH 0x0000800000000000 + +#define SCTRCTL_U 0x0000000000000001 +#define SCTRCTL_S 0x0000000000000002 +#define SCTRCTL_RASEMU 0x0000000000000080 +#define SCTRCTL_STE 0x0000000000000100 +#define SCTRCTL_BPFRZ 0x0000000000000800 +#define SCTRCTL_LCOFIFRZ 0x0000000000001000 +#define SCTRCTL_EXCINH 0x0000000200000000 +#define SCTRCTL_INTRINH 0x0000000400000000 +#define SCTRCTL_TRETINH 0x0000000800000000 +#define SCTRCTL_NTBREN 0x0000001000000000 +#define SCTRCTL_TKBRINH 0x0000002000000000 +#define SCTRCTL_INDCALLINH 0x0000010000000000 +#define SCTRCTL_DIRCALLINH 0x0000020000000000 +#define SCTRCTL_INDJMPINH 0x0000040000000000 +#define SCTRCTL_DIRJMPINH 0x0000080000000000 +#define SCTRCTL_CORSWAPINH 0x0000100000000000 +#define SCTRCTL_RETINH 0x0000200000000000 +#define SCTRCTL_INDLJMPINH 0x0000400000000000 +#define SCTRCTL_DIRLJMPINH 0x0000800000000000 + +#define VSCTRCTL_U 0x0000000000000001 +#define VSCTRCTL_S 0x0000000000000002 +#define VSCTRCTL_RASEMU 0x0000000000000080 +#define VSCTRCTL_STE 0x0000000000000100 +#define VSCTRCTL_BPFRZ 0x0000000000000800 +#define VSCTRCTL_LCOFIFRZ 0x0000000000001000 +#define VSCTRCTL_EXCINH 0x0000000200000000 +#define VSCTRCTL_INTRINH 0x0000000400000000 +#define VSCTRCTL_TRETINH 0x0000000800000000 +#define VSCTRCTL_NTBREN 0x0000001000000000 +#define VSCTRCTL_TKBRINH 0x0000002000000000 +#define VSCTRCTL_INDCALLINH 0x0000010000000000 +#define VSCTRCTL_DIRCALLINH 0x0000020000000000 +#define VSCTRCTL_INDJMPINH 0x0000040000000000 +#define VSCTRCTL_DIRJMPINH 0x0000080000000000 +#define VSCTRCTL_CORSWAPINH 0x0000100000000000 +#define VSCTRCTL_RETINH 0x0000200000000000 +#define VSCTRCTL_INDLJMPINH 0x0000400000000000 +#define VSCTRCTL_DIRLJMPINH 0x0000800000000000 + +#define SCTRDEPTH_DEPTH 0x00000007 + +#define SCTRSTATUS_WRPTR 0x000000FF +#define SCTRSTATUS_FROZEN 0x80000000 + #define IRQ_U_SOFT 0 #define IRQ_S_SOFT 1 #define IRQ_VS_SOFT 2 @@ -425,8 +512,6 @@ #define RISCV_ENCODING_H #define MATCH_ADD 0x33 #define MASK_ADD 0xfe00707f -#define MATCH_ADD64 0xc0001077 -#define MASK_ADD64 0xfe00707f #define MATCH_ADD_UW 0x800003b #define MASK_ADD_UW 0xfe00707f #define MATCH_ADDI 0x13 @@ -1151,14 +1236,6 @@ #define MASK_JAL 0x7f #define MATCH_JALR 0x67 #define MASK_JALR 0x707f -#define MATCH_KADD64 0x90001077 -#define MASK_KADD64 0xfe00707f -#define MATCH_KMAR64 0x94001077 -#define MASK_KMAR64 0xfe00707f -#define MATCH_KMSR64 0x96001077 -#define MASK_KMSR64 0xfe00707f -#define MATCH_KSUB64 0x92001077 -#define MASK_KSUB64 0xfe00707f #define MATCH_LB 0x3 #define MASK_LB 0x707f #define MATCH_LB_AQ 0x3400002f @@ -1293,10 +1370,6 @@ #define MASK_MULHSU 0xfe00707f #define MATCH_MULHU 0x2003033 #define MASK_MULHU 0xfe00707f -#define MATCH_MULR64 0xf0001077 -#define MASK_MULR64 0xfe00707f -#define MATCH_MULSR64 0xe0001077 -#define MASK_MULSR64 0xfe00707f #define MATCH_MULW 0x200003b #define MASK_MULW 0xfe00707f #define MATCH_OR 0x6033 @@ -1319,8 +1392,6 @@ #define MASK_PREFETCH_R 0x1f07fff #define MATCH_PREFETCH_W 0x306013 #define MASK_PREFETCH_W 0x1f07fff -#define MATCH_RADD64 0x80001077 -#define MASK_RADD64 0xfe00707f #define MATCH_REM 0x2006033 #define MASK_REM 0xfe00707f #define MATCH_REMU 0x2007033 @@ -1341,8 +1412,6 @@ #define MASK_RORIW 0xfe00707f #define MATCH_RORW 0x6000503b #define MASK_RORW 0xfe00707f -#define MATCH_RSUB64 0x82001077 -#define MASK_RSUB64 0xfe00707f #define MATCH_SB 0x23 #define MASK_SB 0x707f #define MATCH_SB_RL 0x3a00002f @@ -1351,6 +1420,8 @@ #define MASK_SC_D 0xf800707f #define MATCH_SC_W 0x1800202f #define MASK_SC_W 0xf800707f +#define MATCH_SCTRCLR 0x10400073 +#define MASK_SCTRCLR 0xffffffff #define MATCH_SD 0x3023 #define MASK_SD 0x707f #define MATCH_SD_RL 0x3a00302f @@ -1425,14 +1496,6 @@ #define MASK_SLLIW 0xfe00707f #define MATCH_SLLW 0x103b #define MASK_SLLW 0xfe00707f -#define MATCH_SLO 0x20001033 -#define MASK_SLO 0xfe00707f -#define MATCH_SLOI 0x20001013 -#define MASK_SLOI 0xfc00707f -#define MATCH_SLOIW 0x2000101b -#define MASK_SLOIW 0xfe00707f -#define MATCH_SLOW 0x2000103b -#define MASK_SLOW 0xfe00707f #define MATCH_SLT 0x2033 #define MASK_SLT 0xfe00707f #define MATCH_SLTI 0x2013 @@ -1449,40 +1512,6 @@ #define MASK_SM4ED 0x3e00707f #define MATCH_SM4KS 0x34000033 #define MASK_SM4KS 0x3e00707f -#define MATCH_SMAL 0x5e001077 -#define MASK_SMAL 0xfe00707f -#define MATCH_SMALBB 0x88001077 -#define MASK_SMALBB 0xfe00707f -#define MATCH_SMALBT 0x98001077 -#define MASK_SMALBT 0xfe00707f -#define MATCH_SMALDA 0x8c001077 -#define MASK_SMALDA 0xfe00707f -#define MATCH_SMALDRS 0x9a001077 -#define MASK_SMALDRS 0xfe00707f -#define MATCH_SMALDS 0x8a001077 -#define MASK_SMALDS 0xfe00707f -#define MATCH_SMALTT 0xa8001077 -#define MASK_SMALTT 0xfe00707f -#define MATCH_SMALXDA 0x9c001077 -#define MASK_SMALXDA 0xfe00707f -#define MATCH_SMALXDS 0xaa001077 -#define MASK_SMALXDS 0xfe00707f -#define MATCH_SMAR64 0x84001077 -#define MASK_SMAR64 0xfe00707f -#define MATCH_SMSLDA 0xac001077 -#define MASK_SMSLDA 0xfe00707f -#define MATCH_SMSLXDA 0xbc001077 -#define MASK_SMSLXDA 0xfe00707f -#define MATCH_SMSR64 0x86001077 -#define MASK_SMSR64 0xfe00707f -#define MATCH_SMUL16 0xa0000077 -#define MASK_SMUL16 0xfe00707f -#define MATCH_SMUL8 0xa8000077 -#define MASK_SMUL8 0xfe00707f -#define MATCH_SMULX16 0xa2000077 -#define MASK_SMULX16 0xfe00707f -#define MATCH_SMULX8 0xaa000077 -#define MASK_SMULX8 0xfe00707f #define MATCH_SRA 0x40005033 #define MASK_SRA 0xfe00707f #define MATCH_SRAI 0x40005013 @@ -1505,14 +1534,6 @@ #define MASK_SRLIW 0xfe00707f #define MATCH_SRLW 0x503b #define MASK_SRLW 0xfe00707f -#define MATCH_SRO 0x20005033 -#define MASK_SRO 0xfe00707f -#define MATCH_SROI 0x20005013 -#define MASK_SROI 0xfc00707f -#define MATCH_SROIW 0x2000501b -#define MASK_SROIW 0xfe00707f -#define MATCH_SROW 0x2000503b -#define MASK_SROW 0xfe00707f #define MATCH_SSAMOSWAP_D 0x4800302f #define MASK_SSAMOSWAP_D 0xf800707f #define MATCH_SSAMOSWAP_W 0x4800202f @@ -1529,40 +1550,14 @@ #define MASK_SSRDP 0xfffff07f #define MATCH_SUB 0x40000033 #define MASK_SUB 0xfe00707f -#define MATCH_SUB64 0xc2001077 -#define MASK_SUB64 0xfe00707f #define MATCH_SUBW 0x4000003b #define MASK_SUBW 0xfe00707f #define MATCH_SW 0x2023 #define MASK_SW 0x707f #define MATCH_SW_RL 0x3a00202f #define MASK_SW_RL 0xfa007fff -#define MATCH_UKADD64 0xb0001077 -#define MASK_UKADD64 0xfe00707f -#define MATCH_UKMAR64 0xb4001077 -#define MASK_UKMAR64 0xfe00707f -#define MATCH_UKMSR64 0xb6001077 -#define MASK_UKMSR64 0xfe00707f -#define MATCH_UKSUB64 0xb2001077 -#define MASK_UKSUB64 0xfe00707f -#define MATCH_UMAR64 0xa4001077 -#define MASK_UMAR64 0xfe00707f -#define MATCH_UMSR64 0xa6001077 -#define MASK_UMSR64 0xfe00707f -#define MATCH_UMUL16 0xb0000077 -#define MASK_UMUL16 0xfe00707f -#define MATCH_UMUL8 0xb8000077 -#define MASK_UMUL8 0xfe00707f -#define MATCH_UMULX16 0xb2000077 -#define MASK_UMULX16 0xfe00707f -#define MATCH_UMULX8 0xba000077 -#define MASK_UMULX8 0xfe00707f #define MATCH_UNSHFLI 0x8005013 #define MASK_UNSHFLI 0xfe00707f -#define MATCH_URADD64 0xa0001077 -#define MASK_URADD64 0xfe00707f -#define MATCH_URSUB64 0xa2001077 -#define MASK_URSUB64 0xfe00707f #define MATCH_VAADD_VV 0x24002057 #define MASK_VAADD_VV 0xfc00707f #define MATCH_VAADD_VX 0x24006057 @@ -2487,6 +2482,8 @@ #define CSR_STVAL 0x143 #define CSR_SIP 0x144 #define CSR_STIMECMP 0x14d +#define CSR_SCTRCTL 0x14e +#define CSR_SCTRSTATUS 0x14f #define CSR_SISELECT 0x150 #define CSR_SIREG 0x151 #define CSR_SIREG2 0x152 @@ -2495,6 +2492,7 @@ #define CSR_SIREG5 0x156 #define CSR_SIREG6 0x157 #define CSR_STOPEI 0x15c +#define CSR_SCTRDEPTH 0x15f #define CSR_SATP 0x180 #define CSR_SRMCFG 0x181 #define CSR_SCONTEXT 0x5a8 @@ -2507,6 +2505,7 @@ #define CSR_VSTVAL 0x243 #define CSR_VSIP 0x244 #define CSR_VSTIMECMP 0x24d +#define CSR_VSCTRCTL 0x24e #define CSR_VSISELECT 0x250 #define CSR_VSIREG 0x251 #define CSR_VSIREG2 0x252 @@ -2579,6 +2578,7 @@ #define CSR_MIP 0x344 #define CSR_MTINST 0x34a #define CSR_MTVAL2 0x34b +#define CSR_MCTRCTL 0x34e #define CSR_MISELECT 0x350 #define CSR_MIREG 0x351 #define CSR_MIREG2 0x352 @@ -3007,7 +3007,6 @@ #endif #ifdef DECLARE_INSN DECLARE_INSN(add, MATCH_ADD, MASK_ADD) -DECLARE_INSN(add64, MATCH_ADD64, MASK_ADD64) DECLARE_INSN(add_uw, MATCH_ADD_UW, MASK_ADD_UW) DECLARE_INSN(addi, MATCH_ADDI, MASK_ADDI) DECLARE_INSN(addiw, MATCH_ADDIW, MASK_ADDIW) @@ -3370,10 +3369,6 @@ DECLARE_INSN(hsv_h, MATCH_HSV_H, MASK_HSV_H) DECLARE_INSN(hsv_w, MATCH_HSV_W, MASK_HSV_W) DECLARE_INSN(jal, MATCH_JAL, MASK_JAL) DECLARE_INSN(jalr, MATCH_JALR, MASK_JALR) -DECLARE_INSN(kadd64, MATCH_KADD64, MASK_KADD64) -DECLARE_INSN(kmar64, MATCH_KMAR64, MASK_KMAR64) -DECLARE_INSN(kmsr64, MATCH_KMSR64, MASK_KMSR64) -DECLARE_INSN(ksub64, MATCH_KSUB64, MASK_KSUB64) DECLARE_INSN(lb, MATCH_LB, MASK_LB) DECLARE_INSN(lb_aq, MATCH_LB_AQ, MASK_LB_AQ) DECLARE_INSN(lbu, MATCH_LBU, MASK_LBU) @@ -3441,8 +3436,6 @@ DECLARE_INSN(mul, MATCH_MUL, MASK_MUL) DECLARE_INSN(mulh, MATCH_MULH, MASK_MULH) DECLARE_INSN(mulhsu, MATCH_MULHSU, MASK_MULHSU) DECLARE_INSN(mulhu, MATCH_MULHU, MASK_MULHU) -DECLARE_INSN(mulr64, MATCH_MULR64, MASK_MULR64) -DECLARE_INSN(mulsr64, MATCH_MULSR64, MASK_MULSR64) DECLARE_INSN(mulw, MATCH_MULW, MASK_MULW) DECLARE_INSN(or, MATCH_OR, MASK_OR) DECLARE_INSN(ori, MATCH_ORI, MASK_ORI) @@ -3454,7 +3447,6 @@ DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE) DECLARE_INSN(prefetch_i, MATCH_PREFETCH_I, MASK_PREFETCH_I) DECLARE_INSN(prefetch_r, MATCH_PREFETCH_R, MASK_PREFETCH_R) DECLARE_INSN(prefetch_w, MATCH_PREFETCH_W, MASK_PREFETCH_W) -DECLARE_INSN(radd64, MATCH_RADD64, MASK_RADD64) DECLARE_INSN(rem, MATCH_REM, MASK_REM) DECLARE_INSN(remu, MATCH_REMU, MASK_REMU) DECLARE_INSN(remuw, MATCH_REMUW, MASK_REMUW) @@ -3465,11 +3457,11 @@ DECLARE_INSN(ror, MATCH_ROR, MASK_ROR) DECLARE_INSN(rori, MATCH_RORI, MASK_RORI) DECLARE_INSN(roriw, MATCH_RORIW, MASK_RORIW) DECLARE_INSN(rorw, MATCH_RORW, MASK_RORW) -DECLARE_INSN(rsub64, MATCH_RSUB64, MASK_RSUB64) DECLARE_INSN(sb, MATCH_SB, MASK_SB) DECLARE_INSN(sb_rl, MATCH_SB_RL, MASK_SB_RL) DECLARE_INSN(sc_d, MATCH_SC_D, MASK_SC_D) DECLARE_INSN(sc_w, MATCH_SC_W, MASK_SC_W) +DECLARE_INSN(sctrclr, MATCH_SCTRCLR, MASK_SCTRCLR) DECLARE_INSN(sd, MATCH_SD, MASK_SD) DECLARE_INSN(sd_rl, MATCH_SD_RL, MASK_SD_RL) DECLARE_INSN(sext_b, MATCH_SEXT_B, MASK_SEXT_B) @@ -3507,10 +3499,6 @@ DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32) DECLARE_INSN(slli_uw, MATCH_SLLI_UW, MASK_SLLI_UW) DECLARE_INSN(slliw, MATCH_SLLIW, MASK_SLLIW) DECLARE_INSN(sllw, MATCH_SLLW, MASK_SLLW) -DECLARE_INSN(slo, MATCH_SLO, MASK_SLO) -DECLARE_INSN(sloi, MATCH_SLOI, MASK_SLOI) -DECLARE_INSN(sloiw, MATCH_SLOIW, MASK_SLOIW) -DECLARE_INSN(slow, MATCH_SLOW, MASK_SLOW) DECLARE_INSN(slt, MATCH_SLT, MASK_SLT) DECLARE_INSN(slti, MATCH_SLTI, MASK_SLTI) DECLARE_INSN(sltiu, MATCH_SLTIU, MASK_SLTIU) @@ -3519,23 +3507,6 @@ DECLARE_INSN(sm3p0, MATCH_SM3P0, MASK_SM3P0) DECLARE_INSN(sm3p1, MATCH_SM3P1, MASK_SM3P1) DECLARE_INSN(sm4ed, MATCH_SM4ED, MASK_SM4ED) DECLARE_INSN(sm4ks, MATCH_SM4KS, MASK_SM4KS) -DECLARE_INSN(smal, MATCH_SMAL, MASK_SMAL) -DECLARE_INSN(smalbb, MATCH_SMALBB, MASK_SMALBB) -DECLARE_INSN(smalbt, MATCH_SMALBT, MASK_SMALBT) -DECLARE_INSN(smalda, MATCH_SMALDA, MASK_SMALDA) -DECLARE_INSN(smaldrs, MATCH_SMALDRS, MASK_SMALDRS) -DECLARE_INSN(smalds, MATCH_SMALDS, MASK_SMALDS) -DECLARE_INSN(smaltt, MATCH_SMALTT, MASK_SMALTT) -DECLARE_INSN(smalxda, MATCH_SMALXDA, MASK_SMALXDA) -DECLARE_INSN(smalxds, MATCH_SMALXDS, MASK_SMALXDS) -DECLARE_INSN(smar64, MATCH_SMAR64, MASK_SMAR64) -DECLARE_INSN(smslda, MATCH_SMSLDA, MASK_SMSLDA) -DECLARE_INSN(smslxda, MATCH_SMSLXDA, MASK_SMSLXDA) -DECLARE_INSN(smsr64, MATCH_SMSR64, MASK_SMSR64) -DECLARE_INSN(smul16, MATCH_SMUL16, MASK_SMUL16) -DECLARE_INSN(smul8, MATCH_SMUL8, MASK_SMUL8) -DECLARE_INSN(smulx16, MATCH_SMULX16, MASK_SMULX16) -DECLARE_INSN(smulx8, MATCH_SMULX8, MASK_SMULX8) DECLARE_INSN(sra, MATCH_SRA, MASK_SRA) DECLARE_INSN(srai, MATCH_SRAI, MASK_SRAI) DECLARE_INSN(srai_rv32, MATCH_SRAI_RV32, MASK_SRAI_RV32) @@ -3547,10 +3518,6 @@ DECLARE_INSN(srli, MATCH_SRLI, MASK_SRLI) DECLARE_INSN(srli_rv32, MATCH_SRLI_RV32, MASK_SRLI_RV32) DECLARE_INSN(srliw, MATCH_SRLIW, MASK_SRLIW) DECLARE_INSN(srlw, MATCH_SRLW, MASK_SRLW) -DECLARE_INSN(sro, MATCH_SRO, MASK_SRO) -DECLARE_INSN(sroi, MATCH_SROI, MASK_SROI) -DECLARE_INSN(sroiw, MATCH_SROIW, MASK_SROIW) -DECLARE_INSN(srow, MATCH_SROW, MASK_SROW) DECLARE_INSN(ssamoswap_d, MATCH_SSAMOSWAP_D, MASK_SSAMOSWAP_D) DECLARE_INSN(ssamoswap_w, MATCH_SSAMOSWAP_W, MASK_SSAMOSWAP_W) DECLARE_INSN(sspopchk_x1, MATCH_SSPOPCHK_X1, MASK_SSPOPCHK_X1) @@ -3559,23 +3526,10 @@ DECLARE_INSN(sspush_x1, MATCH_SSPUSH_X1, MASK_SSPUSH_X1) DECLARE_INSN(sspush_x5, MATCH_SSPUSH_X5, MASK_SSPUSH_X5) DECLARE_INSN(ssrdp, MATCH_SSRDP, MASK_SSRDP) DECLARE_INSN(sub, MATCH_SUB, MASK_SUB) -DECLARE_INSN(sub64, MATCH_SUB64, MASK_SUB64) DECLARE_INSN(subw, MATCH_SUBW, MASK_SUBW) DECLARE_INSN(sw, MATCH_SW, MASK_SW) DECLARE_INSN(sw_rl, MATCH_SW_RL, MASK_SW_RL) -DECLARE_INSN(ukadd64, MATCH_UKADD64, MASK_UKADD64) -DECLARE_INSN(ukmar64, MATCH_UKMAR64, MASK_UKMAR64) -DECLARE_INSN(ukmsr64, MATCH_UKMSR64, MASK_UKMSR64) -DECLARE_INSN(uksub64, MATCH_UKSUB64, MASK_UKSUB64) -DECLARE_INSN(umar64, MATCH_UMAR64, MASK_UMAR64) -DECLARE_INSN(umsr64, MATCH_UMSR64, MASK_UMSR64) -DECLARE_INSN(umul16, MATCH_UMUL16, MASK_UMUL16) -DECLARE_INSN(umul8, MATCH_UMUL8, MASK_UMUL8) -DECLARE_INSN(umulx16, MATCH_UMULX16, MASK_UMULX16) -DECLARE_INSN(umulx8, MATCH_UMULX8, MASK_UMULX8) DECLARE_INSN(unshfli, MATCH_UNSHFLI, MASK_UNSHFLI) -DECLARE_INSN(uradd64, MATCH_URADD64, MASK_URADD64) -DECLARE_INSN(ursub64, MATCH_URSUB64, MASK_URSUB64) DECLARE_INSN(vaadd_vv, MATCH_VAADD_VV, MASK_VAADD_VV) DECLARE_INSN(vaadd_vx, MATCH_VAADD_VX, MASK_VAADD_VX) DECLARE_INSN(vaaddu_vv, MATCH_VAADDU_VV, MASK_VAADDU_VV) @@ -4071,6 +4025,8 @@ DECLARE_CSR(scause, CSR_SCAUSE) DECLARE_CSR(stval, CSR_STVAL) DECLARE_CSR(sip, CSR_SIP) DECLARE_CSR(stimecmp, CSR_STIMECMP) +DECLARE_CSR(sctrctl, CSR_SCTRCTL) +DECLARE_CSR(sctrstatus, CSR_SCTRSTATUS) DECLARE_CSR(siselect, CSR_SISELECT) DECLARE_CSR(sireg, CSR_SIREG) DECLARE_CSR(sireg2, CSR_SIREG2) @@ -4079,6 +4035,7 @@ DECLARE_CSR(sireg4, CSR_SIREG4) DECLARE_CSR(sireg5, CSR_SIREG5) DECLARE_CSR(sireg6, CSR_SIREG6) DECLARE_CSR(stopei, CSR_STOPEI) +DECLARE_CSR(sctrdepth, CSR_SCTRDEPTH) DECLARE_CSR(satp, CSR_SATP) DECLARE_CSR(srmcfg, CSR_SRMCFG) DECLARE_CSR(scontext, CSR_SCONTEXT) @@ -4091,6 +4048,7 @@ DECLARE_CSR(vscause, CSR_VSCAUSE) DECLARE_CSR(vstval, CSR_VSTVAL) DECLARE_CSR(vsip, CSR_VSIP) DECLARE_CSR(vstimecmp, CSR_VSTIMECMP) +DECLARE_CSR(vsctrctl, CSR_VSCTRCTL) DECLARE_CSR(vsiselect, CSR_VSISELECT) DECLARE_CSR(vsireg, CSR_VSIREG) DECLARE_CSR(vsireg2, CSR_VSIREG2) @@ -4163,6 +4121,7 @@ DECLARE_CSR(mtval, CSR_MTVAL) DECLARE_CSR(mip, CSR_MIP) DECLARE_CSR(mtinst, CSR_MTINST) DECLARE_CSR(mtval2, CSR_MTVAL2) +DECLARE_CSR(mctrctl, CSR_MCTRCTL) DECLARE_CSR(miselect, CSR_MISELECT) DECLARE_CSR(mireg, CSR_MIREG) DECLARE_CSR(mireg2, CSR_MIREG2) @@ -4469,10 +4428,10 @@ DECLARE_CAUSE("misaligned load", CAUSE_MISALIGNED_LOAD) DECLARE_CAUSE("load access", CAUSE_LOAD_ACCESS) DECLARE_CAUSE("misaligned store", CAUSE_MISALIGNED_STORE) DECLARE_CAUSE("store access", CAUSE_STORE_ACCESS) -DECLARE_CAUSE("user_ecall", CAUSE_USER_ECALL) -DECLARE_CAUSE("supervisor_ecall", CAUSE_SUPERVISOR_ECALL) -DECLARE_CAUSE("virtual_supervisor_ecall", CAUSE_VIRTUAL_SUPERVISOR_ECALL) -DECLARE_CAUSE("machine_ecall", CAUSE_MACHINE_ECALL) +DECLARE_CAUSE("user ecall", CAUSE_USER_ECALL) +DECLARE_CAUSE("supervisor ecall", CAUSE_SUPERVISOR_ECALL) +DECLARE_CAUSE("virtual supervisor ecall", CAUSE_VIRTUAL_SUPERVISOR_ECALL) +DECLARE_CAUSE("machine ecall", CAUSE_MACHINE_ECALL) DECLARE_CAUSE("fetch page fault", CAUSE_FETCH_PAGE_FAULT) DECLARE_CAUSE("load page fault", CAUSE_LOAD_PAGE_FAULT) DECLARE_CAUSE("store page fault", CAUSE_STORE_PAGE_FAULT) |