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| author | Ved Shanbhogue <ved@rivosinc.com> | 2024-01-10 17:34:48 -0600 |
|---|---|---|
| committer | Ved Shanbhogue <ved@rivosinc.com> | 2024-01-10 17:34:48 -0600 |
| commit | 573761793eed4a7a4de2f43e09da94f74f1f0430 (patch) | |
| tree | b6c22172ea4753c5ef207366563b0eb3e139a63f /riscv | |
| parent | bd53a1b474401b8311d9afa0c9f1e113f7e32061 (diff) | |
| download | riscv-isa-sim-573761793eed4a7a4de2f43e09da94f74f1f0430.zip riscv-isa-sim-573761793eed4a7a4de2f43e09da94f74f1f0430.tar.gz riscv-isa-sim-573761793eed4a7a4de2f43e09da94f74f1f0430.tar.bz2 | |
fix merge issue
Diffstat (limited to 'riscv')
| -rw-r--r-- | riscv/csrs.cc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/riscv/csrs.cc b/riscv/csrs.cc index 0564fb9..b76b496 100644 --- a/riscv/csrs.cc +++ b/riscv/csrs.cc @@ -668,7 +668,6 @@ bool misa_csr_t::unlogged_write(const reg_t val) noexcept { proc->set_extension_enable(EXT_ZVFHMIN, new_misa & (1L << ('V' - 'A'))); proc->set_extension_enable(EXT_ZAAMO, (new_misa & (1L << ('A' - 'A'))) || !proc->get_isa().extension_enabled('A')); proc->set_extension_enable(EXT_ZALRSC, (new_misa & (1L << ('A' - 'A'))) || !proc->get_isa().extension_enabled('A')); - proc->set_extension_enable(EXT_ZBA, (new_misa & (1L << ('B' - 'A'))) || !proc->get_isa().extension_enabled('B')); proc->set_extension_enable(EXT_ZBB, (new_misa & (1L << ('B' - 'A'))) || !proc->get_isa().extension_enabled('B')); proc->set_extension_enable(EXT_ZBS, (new_misa & (1L << ('B' - 'A'))) || !proc->get_isa().extension_enabled('B')); |