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| author | Ved Shanbhogue <ved@rivosinc.com> | 2024-05-04 15:30:10 -0500 |
|---|---|---|
| committer | Ved Shanbhogue <ved@rivosinc.com> | 2024-05-06 18:21:06 -0500 |
| commit | c5229c3f5f4b6404977bb4134f1a0bda5207ff90 (patch) | |
| tree | fd9c817dd725bd138d80782915b59379b809780f /riscv/riscv.mk.in | |
| parent | 7438d1e69286470b7aaa0a713fd853fdf5c12416 (diff) | |
| download | riscv-isa-sim-c5229c3f5f4b6404977bb4134f1a0bda5207ff90.zip riscv-isa-sim-c5229c3f5f4b6404977bb4134f1a0bda5207ff90.tar.gz riscv-isa-sim-c5229c3f5f4b6404977bb4134f1a0bda5207ff90.tar.bz2 | |
Add Zawrs extension
Diffstat (limited to 'riscv/riscv.mk.in')
| -rw-r--r-- | riscv/riscv.mk.in | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/riscv/riscv.mk.in b/riscv/riscv.mk.in index 6db6fa9..469c48d 100644 --- a/riscv/riscv.mk.in +++ b/riscv/riscv.mk.in @@ -987,6 +987,10 @@ riscv_insn_ext_zabha = \ amoxor_h \ amocas_h \ +riscv_insn_ext_zawrs = \ + wrs_sto \ + wrs_nto \ + riscv_insn_ext_zalasr = \ lb_aq \ lh_aq \ @@ -1099,6 +1103,7 @@ riscv_insn_list = \ $(riscv_insn_ext_q_zfa) \ $(riscv_insn_ext_zacas) \ $(riscv_insn_ext_zabha) \ + $(riscv_insn_ext_zawrs) \ $(riscv_insn_ext_zalasr) \ $(riscv_insn_ext_zce) \ $(riscv_insn_ext_zfh) \ |