diff options
author | Andrew Waterman <andrew@sifive.com> | 2022-10-06 17:40:41 -0700 |
---|---|---|
committer | Andrew Waterman <andrew@sifive.com> | 2022-10-06 19:30:40 -0700 |
commit | 7b8114f707a7b2de9fd2d393b9d019180de83025 (patch) | |
tree | dc4c83a2ab0e7050758214025c15991f9e78a5eb /riscv/mmu.cc | |
parent | fd50768df9ec4d9f80c6a37d89734d9e27443f6b (diff) | |
download | riscv-isa-sim-7b8114f707a7b2de9fd2d393b9d019180de83025.zip riscv-isa-sim-7b8114f707a7b2de9fd2d393b9d019180de83025.tar.gz riscv-isa-sim-7b8114f707a7b2de9fd2d393b9d019180de83025.tar.bz2 |
Don't use reexecution as the means to implement trigger-after
The scheme was based on the notion that memory accesses are idempotent
up until the point the trigger would've been hit, which isn't true in
the case of side-effecting loads and data-value triggers.
Instead, check the trigger on the next instruction fetch. To keep the
perf overhead minimal, perform this check on the I$ refill path, and
ensure that path is taken by flushing the I$.
Diffstat (limited to 'riscv/mmu.cc')
-rw-r--r-- | riscv/mmu.cc | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/riscv/mmu.cc b/riscv/mmu.cc index b8690ec..fdad05f 100644 --- a/riscv/mmu.cc +++ b/riscv/mmu.cc @@ -165,8 +165,11 @@ void mmu_t::check_triggers(triggers::operation_t operation, reg_t address, bool throw triggers::matched_t(operation, address, data, action); case triggers::MATCH_FIRE_AFTER: + // We want to take this exception on the next instruction. We check + // whether to do so in the I$ refill path, so flush the I$. + flush_icache(); matched_trigger = new triggers::matched_t(operation, address, data, action); - throw *matched_trigger; + return; } } |