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| author | Mark Fedorov <mark.fedorov@cloudbear.ru> | 2021-09-08 19:26:40 +0300 |
|---|---|---|
| committer | Andrew Waterman <aswaterman@gmail.com> | 2021-09-09 15:29:38 -0700 |
| commit | bd93d290256c2de233696a12c5211288e66428d6 (patch) | |
| tree | 3dd5ed90ab1043d1c5bc0cd86e61d8dace03376f /riscv/insns/sha512sum0r.h | |
| parent | 07ae07ff015821f43f1a8c814d829314979bf363 (diff) | |
| download | riscv-isa-sim-bd93d290256c2de233696a12c5211288e66428d6.zip riscv-isa-sim-bd93d290256c2de233696a12c5211288e66428d6.tar.gz riscv-isa-sim-bd93d290256c2de233696a12c5211288e66428d6.tar.bz2 | |
Splitted K-ext to zeds
Diffstat (limited to 'riscv/insns/sha512sum0r.h')
| -rw-r--r-- | riscv/insns/sha512sum0r.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/riscv/insns/sha512sum0r.h b/riscv/insns/sha512sum0r.h index 87afee9..cb6c636 100644 --- a/riscv/insns/sha512sum0r.h +++ b/riscv/insns/sha512sum0r.h @@ -1,6 +1,6 @@ require_rv32; -require_extension('K'); +require_extension(EXT_ZKNH); reg_t result = (zext32(RS1) << 25) ^ (zext32(RS1) << 30) ^ (zext32(RS1) >> 28) ^ |