diff options
31 files changed, 72 insertions, 31 deletions
diff --git a/riscv/insns/aes32dsi.h b/riscv/insns/aes32dsi.h index c33c42c..b2680b0 100644 --- a/riscv/insns/aes32dsi.h +++ b/riscv/insns/aes32dsi.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv32; -require_extension('K'); +require_extension(EXT_ZKND); uint8_t bs = insn.bs(); diff --git a/riscv/insns/aes32dsmi.h b/riscv/insns/aes32dsmi.h index f51da54..d76abc0 100644 --- a/riscv/insns/aes32dsmi.h +++ b/riscv/insns/aes32dsmi.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv32; -require_extension('K'); +require_extension(EXT_ZKND); uint8_t bs = insn.bs(); diff --git a/riscv/insns/aes32esi.h b/riscv/insns/aes32esi.h index 1321cd3..d0c0a63 100644 --- a/riscv/insns/aes32esi.h +++ b/riscv/insns/aes32esi.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv32; -require_extension('K'); +require_extension(EXT_ZKNE); uint8_t bs = insn.bs(); diff --git a/riscv/insns/aes32esmi.h b/riscv/insns/aes32esmi.h index 25d7dae..069718d 100644 --- a/riscv/insns/aes32esmi.h +++ b/riscv/insns/aes32esmi.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv32; -require_extension('K'); +require_extension(EXT_ZKNE); uint8_t bs = insn.bs(); diff --git a/riscv/insns/aes64ds.h b/riscv/insns/aes64ds.h index 05fadca..64baf87 100644 --- a/riscv/insns/aes64ds.h +++ b/riscv/insns/aes64ds.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv64; -require_extension('K'); +require_extension(EXT_ZKND); uint64_t temp = AES_INVSHIFROWS_LO(RS1,RS2); diff --git a/riscv/insns/aes64dsm.h b/riscv/insns/aes64dsm.h index 617a965..eccf02f 100644 --- a/riscv/insns/aes64dsm.h +++ b/riscv/insns/aes64dsm.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv64; -require_extension('K'); +require_extension(EXT_ZKND); uint64_t temp = AES_INVSHIFROWS_LO(RS1,RS2); diff --git a/riscv/insns/aes64es.h b/riscv/insns/aes64es.h index a34436d..6bbc4ef 100644 --- a/riscv/insns/aes64es.h +++ b/riscv/insns/aes64es.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv64; -require_extension('K'); +require_extension(EXT_ZKNE); uint64_t temp = AES_SHIFROWS_LO(RS1,RS2); diff --git a/riscv/insns/aes64esm.h b/riscv/insns/aes64esm.h index a41667b..0351c11 100644 --- a/riscv/insns/aes64esm.h +++ b/riscv/insns/aes64esm.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv64; -require_extension('K'); +require_extension(EXT_ZKNE); uint64_t temp = AES_SHIFROWS_LO(RS1,RS2); diff --git a/riscv/insns/aes64im.h b/riscv/insns/aes64im.h index 31fd0e4..9dd9b02 100644 --- a/riscv/insns/aes64im.h +++ b/riscv/insns/aes64im.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv64; -require_extension('K'); +require_extension(EXT_ZKND); uint32_t col_0 = RS1 & 0xFFFFFFFF; uint32_t col_1 = RS1 >> 32 ; diff --git a/riscv/insns/aes64ks1i.h b/riscv/insns/aes64ks1i.h index 90c299e..fff7109 100644 --- a/riscv/insns/aes64ks1i.h +++ b/riscv/insns/aes64ks1i.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv64; -require_extension('K'); +require_either_extension(EXT_ZKND, EXT_ZKNE); uint8_t round_consts [10] = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80, 0x1b, 0x36 diff --git a/riscv/insns/aes64ks2.h b/riscv/insns/aes64ks2.h index 07c8488..65d5a77 100644 --- a/riscv/insns/aes64ks2.h +++ b/riscv/insns/aes64ks2.h @@ -2,7 +2,7 @@ #include "aes_common.h" require_rv64; -require_extension('K'); +require_either_extension(EXT_ZKND, EXT_ZKNE); uint32_t rs1_hi = RS1 >> 32; uint32_t rs2_lo = RS2 ; diff --git a/riscv/insns/sha256sig0.h b/riscv/insns/sha256sig0.h index f37a722..f86e42f 100644 --- a/riscv/insns/sha256sig0.h +++ b/riscv/insns/sha256sig0.h @@ -1,5 +1,5 @@ -require_extension('K'); +require_extension(EXT_ZKNH); #define ROR32(a,amt) ((a << (-amt & (32-1))) | (a >> (amt & (32-1)))) diff --git a/riscv/insns/sha256sig1.h b/riscv/insns/sha256sig1.h index e6136f9..72e586c 100644 --- a/riscv/insns/sha256sig1.h +++ b/riscv/insns/sha256sig1.h @@ -1,5 +1,5 @@ -require_extension('K'); +require_extension(EXT_ZKNH); #define ROR32(a,amt) ((a << (-amt & (32-1))) | (a >> (amt & (32-1)))) diff --git a/riscv/insns/sha256sum0.h b/riscv/insns/sha256sum0.h index 20a86d0..f0aed47 100644 --- a/riscv/insns/sha256sum0.h +++ b/riscv/insns/sha256sum0.h @@ -1,5 +1,5 @@ -require_extension('K'); +require_extension(EXT_ZKNH); #define ROR32(a,amt) ((a << (-amt & (32-1))) | (a >> (amt & (32-1)))) diff --git a/riscv/insns/sha256sum1.h b/riscv/insns/sha256sum1.h index a840509..41de5af 100644 --- a/riscv/insns/sha256sum1.h +++ b/riscv/insns/sha256sum1.h @@ -1,5 +1,5 @@ -require_extension('K'); +require_extension(EXT_ZKNH); #define ROR32(a,amt) ((a << (-amt & (32-1))) | (a >> (amt & (32-1)))) diff --git a/riscv/insns/sha512sig0.h b/riscv/insns/sha512sig0.h index 140a61e..2efd763 100644 --- a/riscv/insns/sha512sig0.h +++ b/riscv/insns/sha512sig0.h @@ -1,5 +1,5 @@ require_rv64; -require_extension('K'); +require_extension(EXT_ZKNH); #define ROR64(a,amt) ((a << (-amt & (64-1))) | (a >> (amt & (64-1)))) diff --git a/riscv/insns/sha512sig0h.h b/riscv/insns/sha512sig0h.h index 7cd5f2f..eb6a2a2 100644 --- a/riscv/insns/sha512sig0h.h +++ b/riscv/insns/sha512sig0h.h @@ -1,6 +1,6 @@ require_rv32; -require_extension('K'); +require_extension(EXT_ZKNH); reg_t result = (zext32(RS1) >> 1) ^ (zext32(RS1) >> 7) ^ (zext32(RS1) >> 8) ^ diff --git a/riscv/insns/sha512sig0l.h b/riscv/insns/sha512sig0l.h index 99d7aa9..599a6a1 100644 --- a/riscv/insns/sha512sig0l.h +++ b/riscv/insns/sha512sig0l.h @@ -1,6 +1,6 @@ require_rv32; -require_extension('K'); +require_extension(EXT_ZKNH); reg_t result = (zext32(RS1) >> 1) ^ (zext32(RS1) >> 7) ^ (zext32(RS1) >> 8) ^ diff --git a/riscv/insns/sha512sig1.h b/riscv/insns/sha512sig1.h index 0ec9f29..2176654 100644 --- a/riscv/insns/sha512sig1.h +++ b/riscv/insns/sha512sig1.h @@ -1,5 +1,5 @@ require_rv64; -require_extension('K'); +require_extension(EXT_ZKNH); #define ROR64(a,amt) ((a << (-amt & (64-1))) | (a >> (amt & (64-1)))) diff --git a/riscv/insns/sha512sig1h.h b/riscv/insns/sha512sig1h.h index ed3fa32..271a1f9 100644 --- a/riscv/insns/sha512sig1h.h +++ b/riscv/insns/sha512sig1h.h @@ -1,6 +1,6 @@ require_rv32; -require_extension('K'); +require_extension(EXT_ZKNH); reg_t result = (zext32(RS1) << 3) ^ (zext32(RS1) >> 6) ^ (zext32(RS1) >> 19) ^ diff --git a/riscv/insns/sha512sig1l.h b/riscv/insns/sha512sig1l.h index 84694d1..491810d 100644 --- a/riscv/insns/sha512sig1l.h +++ b/riscv/insns/sha512sig1l.h @@ -1,6 +1,6 @@ require_rv32; -require_extension('K'); +require_extension(EXT_ZKNH); reg_t result = (zext32(RS1) << 3) ^ (zext32(RS1) >> 6) ^ (zext32(RS1) >> 19) ^ diff --git a/riscv/insns/sha512sum0.h b/riscv/insns/sha512sum0.h index 211be4e..01182e6 100644 --- a/riscv/insns/sha512sum0.h +++ b/riscv/insns/sha512sum0.h @@ -1,5 +1,5 @@ require_rv64; -require_extension('K'); +require_extension(EXT_ZKNH); #define ROR64(a,amt) ((a << (-amt & (64-1))) | (a >> (amt & (64-1)))) diff --git a/riscv/insns/sha512sum0r.h b/riscv/insns/sha512sum0r.h index 87afee9..cb6c636 100644 --- a/riscv/insns/sha512sum0r.h +++ b/riscv/insns/sha512sum0r.h @@ -1,6 +1,6 @@ require_rv32; -require_extension('K'); +require_extension(EXT_ZKNH); reg_t result = (zext32(RS1) << 25) ^ (zext32(RS1) << 30) ^ (zext32(RS1) >> 28) ^ diff --git a/riscv/insns/sha512sum1.h b/riscv/insns/sha512sum1.h index a238e50..267d7dd 100644 --- a/riscv/insns/sha512sum1.h +++ b/riscv/insns/sha512sum1.h @@ -1,5 +1,5 @@ require_rv64; -require_extension('K'); +require_extension(EXT_ZKNH); #define ROR64(a,amt) ((a << (-amt & (64-1))) | (a >> (amt & (64-1)))) diff --git a/riscv/insns/sha512sum1r.h b/riscv/insns/sha512sum1r.h index 1e52696..8109d0d 100644 --- a/riscv/insns/sha512sum1r.h +++ b/riscv/insns/sha512sum1r.h @@ -1,6 +1,6 @@ require_rv32; -require_extension('K'); +require_extension(EXT_ZKNH); reg_t result = (zext32(RS1) << 23) ^ (zext32(RS1) >> 14) ^ (zext32(RS1) >> 18) ^ diff --git a/riscv/insns/sm3p0.h b/riscv/insns/sm3p0.h index 3625eb6..0a72a93 100644 --- a/riscv/insns/sm3p0.h +++ b/riscv/insns/sm3p0.h @@ -1,5 +1,5 @@ -require_extension('K'); +require_extension(EXT_ZKSH); #define ROL32(a,amt) ((a >> (-amt & (32-1))) | (a << (amt & (32-1)))) diff --git a/riscv/insns/sm3p1.h b/riscv/insns/sm3p1.h index b8f445b..ce3e36c 100644 --- a/riscv/insns/sm3p1.h +++ b/riscv/insns/sm3p1.h @@ -1,5 +1,5 @@ -require_extension('K'); +require_extension(EXT_ZKSH); #define ROL32(a,amt) ((a >> (-amt & (32-1))) | (a << (amt & (32-1)))) diff --git a/riscv/insns/sm4ed.h b/riscv/insns/sm4ed.h index 1b01404..a78c1a8 100644 --- a/riscv/insns/sm4ed.h +++ b/riscv/insns/sm4ed.h @@ -1,5 +1,5 @@ -require_extension('K'); +require_extension(EXT_ZKSED); #include "sm4_common.h" diff --git a/riscv/insns/sm4ks.h b/riscv/insns/sm4ks.h index c697ef7..c93c97e 100644 --- a/riscv/insns/sm4ks.h +++ b/riscv/insns/sm4ks.h @@ -1,5 +1,5 @@ -require_extension('K'); +require_extension(EXT_ZKSED); #include "sm4_common.h" diff --git a/riscv/processor.cc b/riscv/processor.cc index 6734c02..af4f35b 100644 --- a/riscv/processor.cc +++ b/riscv/processor.cc @@ -221,7 +221,7 @@ void processor_t::parse_isa_string(const char* str) char error_msg[256]; const char* p = lowercase.c_str(); - const char* all_subsets = "imafdqckhp" + const char* all_subsets = "imafdqchp" #ifdef __SIZEOF_INT128__ "v" #endif @@ -290,6 +290,38 @@ void processor_t::parse_isa_string(const char* str) extension_table[EXT_ZBC] = true; } else if (ext_str == "zbs") { extension_table[EXT_ZBS] = true; + } else if (ext_str == "zbkb") { + extension_table[EXT_ZBKB] = true; + } else if (ext_str == "zbkc") { + extension_table[EXT_ZBKC] = true; + } else if (ext_str == "zbkx") { + extension_table[EXT_ZBKX] = true; + } else if (ext_str == "zkn") { + extension_table[EXT_ZBKB] = true; + extension_table[EXT_ZBKC] = true; + extension_table[EXT_ZBKX] = true; + extension_table[EXT_ZKND] = true; + extension_table[EXT_ZKNE] = true; + extension_table[EXT_ZKNH] = true; + } else if (ext_str == "zknd") { + extension_table[EXT_ZKND] = true; + } else if (ext_str == "zkne") { + extension_table[EXT_ZKNE] = true; + } else if (ext_str == "zknh") { + extension_table[EXT_ZKNH] = true; + } else if (ext_str == "zks") { + extension_table[EXT_ZBKB] = true; + extension_table[EXT_ZBKC] = true; + extension_table[EXT_ZBKX] = true; + extension_table[EXT_ZKSED] = true; + extension_table[EXT_ZKSH] = true; + } else if (ext_str == "zksed") { + extension_table[EXT_ZKSED] = true; + } else if (ext_str == "zksh") { + extension_table[EXT_ZKSH] = true; + } else if (ext_str == "zkr") { + extension_table[EXT_ZKR] = true; + } else if (ext_str == "zkt") { } else if (ext_str == "SVNAPOT") { extension_table[EXT_SVNAPOT] = true; } else if (ext_str == "SVPBMT") { @@ -1170,7 +1202,7 @@ reg_t processor_t::get_csr(int which, insn_t insn, bool write, bool peek) switch (which) { case CSR_SENTROPY: - if (!extension_enabled('K')) + if (!extension_enabled(EXT_ZKR)) break; /* Read-only access disallowed due to wipe-on-read side effect */ if (!write) diff --git a/riscv/processor.h b/riscv/processor.h index 36b3703..450d650 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -250,6 +250,15 @@ typedef enum { EXT_ZBB, EXT_ZBC, EXT_ZBS, + EXT_ZBKB, + EXT_ZBKC, + EXT_ZBKX, + EXT_ZKND, + EXT_ZKNE, + EXT_ZKNH, + EXT_ZKSED, + EXT_ZKSH, + EXT_ZKR, EXT_SVNAPOT, EXT_SVPBMT, EXT_SVINVAL, |