diff options
| author | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-03-29 18:35:25 -0700 |
|---|---|---|
| committer | Andrew Waterman <waterman@cs.berkeley.edu> | 2013-03-29 18:35:25 -0700 |
| commit | b189b9b128ce619f9423009062a85ccb17b32db9 (patch) | |
| tree | 519ee4bd22ea039d28690294461a02b2ce66635f /riscv/insns/lr_w.h | |
| parent | 983a062e287ebe0d69c17448e67da6223cf48080 (diff) | |
| download | riscv-isa-sim-b189b9b128ce619f9423009062a85ccb17b32db9.zip riscv-isa-sim-b189b9b128ce619f9423009062a85ccb17b32db9.tar.gz riscv-isa-sim-b189b9b128ce619f9423009062a85ccb17b32db9.tar.bz2 | |
add load-reserved/store-conditional instructions
Diffstat (limited to 'riscv/insns/lr_w.h')
| -rw-r--r-- | riscv/insns/lr_w.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/riscv/insns/lr_w.h b/riscv/insns/lr_w.h new file mode 100644 index 0000000..3ac4746 --- /dev/null +++ b/riscv/insns/lr_w.h @@ -0,0 +1 @@ +RD = mmu.load_reserved_int32(RS1); |