index
:
rocket-tools/riscv-isa-sim.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
dynamic
eos18-bringup
factor-out-macros
fix-bf16
force-rtti
fp-encoding
heterogeneous_mc
hwachav4
increase-stack-size
itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
mmio-hack
mvp
no_progbuf
no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
plic_uart_v1
priv-1.10
private-l1-caches
pte-info-and-delegation
remove-tests
rivosinc-etrigger_fix_exception_match
rva-profile-support
simplify-misaligned
sodor
sparse-mem
speed2
speedup-hacks
static-link
test
tmp
trigger_priority
tweak_debug_rom
whole-archive
sifive/rvv0.9-phase2
Unnamed repository; edit this file 'description' to name the repository.
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diff
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author
committer
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Branch
Commit message
Author
Age
device_flags
Allow device flags after --device cmdline arg
Jerry Zhao
11 months
dts_parsing
Support parsing procs fully from DTS
Jerry Zhao
5 months
dynamic
build: Dynamically link installed progs
Jerry Zhao
16 months
force-rtti
build: Include all symbols from extension.o when linking spike's main
Jerry Zhao
16 months
log-commits-faster
tmp
Andrew Waterman
12 months
master
Merge pull request #1859 from ved-rivos/issue_1857
Andrew Waterman
45 hours
nolibfdt
Remove in-tree libfdt, rely on system-installed libfdt
Jerry Zhao
11 months
rivosinc-etrigger_fix_exception_match
Call stash_privilege more selectively
Andrew Waterman
18 months
speed2
Split off opcode_cache_entry_t
Jerry Zhao
11 days
whole-archive
build: Link spike binaries with --whole-archive
Jerry Zhao
16 months
[...]
Tag
Download
Author
Age
dummy-tag-for-ci-storage
riscv-isa-sim-dummy-tag-for-ci-storage.zip
riscv-isa-sim-dummy-tag-for-ci-storage.tar.gz
riscv-isa-sim-dummy-tag-for-ci-storage.tar.bz2
Andrew Waterman
2 years
v1.1.0
riscv-isa-sim-1.1.0.zip
riscv-isa-sim-1.1.0.tar.gz
riscv-isa-sim-1.1.0.tar.bz2
Andrew Waterman
3 years
v1.0.0
riscv-isa-sim-1.0.0.zip
riscv-isa-sim-1.0.0.tar.gz
riscv-isa-sim-1.0.0.tar.bz2
Andrew Waterman
6 years
Age
Commit message
Author
Files
Lines
2022-11-15
Use ACTION_DEBUG_MODE instead of 1
itrigger-etrigger-cleanup
YenHaoChen
1
-1
/
+1
2022-11-15
Update riscv/triggers.cc
YenHaoChen
1
-1
/
+1
2022-11-15
fix compilation error: unused parameter
YenHaoChen
2
-4
/
+4
2022-11-15
check itrigger/etrigger after taking trap
YenHaoChen
1
-1
/
+6
2022-11-15
add take_trigger_action() to processor.h/processor.cc
YenHaoChen
3
-12
/
+25
2022-11-15
update module_t
YenHaoChen
2
-31
/
+82
2022-11-15
add itrigger_t and etrigger_t
YenHaoChen
2
-1
/
+153
2022-11-15
update debug_defines.h
YenHaoChen
1
-892
/
+1432
2022-11-15
add disabled_trigger_t to triggers
YenHaoChen
2
-0
/
+27
2022-11-15
trigger_t: Protect destructor and memory_access_match()
Tim Newsome
1
-7
/
+3
[...]