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8 hoursSupport parsing procs fully from DTSdts_parsingJerry Zhao3-23/+81
9 hoursMove isa property to a field of processor_t, not sim_tJerry Zhao7-33/+33
9 hoursPass cfg into make_dtsJerry Zhao3-18/+15
2 daysMerge pull request #1714 from abejgonzalez/fix-interactive-insnHEADmasterJerry Zhao1-29/+30
2 daysMerge pull request #1715 from abejgonzalez/fix-interactive-vregsJerry Zhao1-29/+34
3 daysDon't print vregs if no V extsabejgonzalez1-29/+34
3 daysFix insn interactive command (catch/print trap, use proper access func)abejgonzalez1-29/+30
4 daysMerge pull request #1709 from abejgonzalez/add-insn-debug-mode-cmdsAndrew Waterman2-19/+57
4 daysAdd insn cmds to interactive debug modeabejgonzalez2-19/+57
4 daysMerge pull request #1711 from riscv-software-src/zfa-disasmAndrew Waterman1-1/+105
4 daysExpand default disassembly ISAAndrew Waterman1-1/+2
4 daysAdd disassembly for Zfa extensionAndrew Waterman1-0/+103
4 daysMerge pull request #1710 from riscv-software-src/fix_debug_ciJerry Zhao1-1/+1
4 daysFix riscv-tests commit for CIJerry Zhao1-1/+1
9 daysMerge pull request #1705 from rpsene/masterJerry Zhao1-0/+1
9 daysFix: Add missing <stdexcept> header for std::logic_errorRafael Sene1-0/+1
9 daysMerge pull request #1701 from riscv-software-src/zvl_zveJerry Zhao15-119/+93
9 daysMerge pull request #1704 from riscv-software-src/thread-local-againAndrew Waterman1-2/+1
9 daysFix C/C++ thread-local linkage differentlyAndrew Waterman1-2/+1
10 daysVector-fp instructions depend on zve, not F/DJerry Zhao2-10/+12
10 daysRestrict spike to vlen <= 4096Jerry Zhao1-0/+4
10 daysRemove all --varch parsingJerry Zhao9-93/+1
10 daysSwitch to Zvl/Zve parsing from isa_parser, instead of varchJerry Zhao1-1/+4
10 daysDisallow any vector, not just V, when no __int128 type is presentJerry Zhao1-1/+1
10 daysRelax require_vector check for misa.VJerry Zhao1-2/+0
10 daysRelax mstatus.vs dependency on full VJerry Zhao2-1/+5
10 daysRelax vector_csr dependency on 'V'Jerry Zhao1-4/+0
10 daysRelax zvfh/zvfhmin dependency on V, they only actually depend on ZveJerry Zhao1-3/+0
10 daysAllow disassembly from implementations that are not full VJerry Zhao1-1/+1
10 daysRelax has_fs dependency on misa.vJerry Zhao1-2/+1
10 daysAdd accessors to isa_parser's VLEN/ELENJerry Zhao1-0/+3
10 daysAdd Zvl/Zve validation to isa_parserJerry Zhao1-0/+21
10 daysAdd isa_parser parsing for zvl/zveJerry Zhao2-1/+40
10 daysMerge pull request #1702 from riscv-software-src/fix-1696Andrew Waterman1-20/+20
10 daysIn isa_parser, move extensionology code before error-checking codeAndrew Waterman1-20/+20
10 daysMerge pull request #1695 from riscv-software-src/bf16-opsAndrew Waterman10-4/+443
10 daysMerge pull request #1690 from riscv-software-src/fix-warningsJerry Zhao2-17/+17
12 daysAdd several BF16 ops to SoftFloatAndrew Waterman10-0/+435
13 daysMerge pull request #1694 from Du-Chao/masterAndrew Waterman1-1/+1
13 daysAdd a prerequisite for buildingChao Du1-1/+1
13 daysConsistently order BF16 routines in Makefile and softfloat.hAndrew Waterman2-4/+8
2024-06-13Merge pull request #1689 from riscv-software-src/rounding-mode-thread-localAndrew Waterman1-2/+5
2024-06-13Make softfloat's rounding mode thread-localAndrew Waterman1-2/+5
2024-06-13Merge branch 'NXP-zilsd'Andrew Waterman11-17/+83
2024-06-13Adding Zilsd and Zcmlsd extensions (Load/store pair for RV32)Christian Herber11-17/+83
2024-06-12Fix a few compile warningsAndrew Waterman2-17/+17
2024-06-11Merge pull request #1679 from akifejaz/vector-cryptoAndrew Waterman1-0/+10
2024-06-12Merge branch 'master' into vector-cryptoAkif Ejaz20-139/+199
2024-06-11Merge pull request #1687 from riscv-software-src/flw-overlapAndrew Waterman13-124/+179
2024-06-11Validate contents of overlap list in CIAndrew Waterman1-13/+32
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