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rocket-tools/riscv-gnu-toolchain/spike.git
confprec
cs250
cycleh
debug_rom
debug_rom_fence
device_flags
dtm_reset_error
dts_parsing
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eos18-bringup
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itrigger-etrigger-cleanup
load_reservation_set_size
log-commits-faster
master
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mvp
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no_progbuf2
nolibfdt
p-ext-0.5.2
plctlab-plct-zce-fix2
plic-clint-endian
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priv-1.10
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whole-archive
sifive/rvv0.9-phase2
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Author
Files
Lines
2020-04-05
option: flag x extension without loading shared lib (#439)
Chih-Min Chao
1
-1
/
+5
2020-04-05
Deny hart access to debug CSRs when not in D-mode
Andrew Waterman
1
-0
/
+8
2020-04-05
Assert that debug_module is initialized correctly. (#437)
Tim Newsome
1
-0
/
+1
2020-04-05
Write execution logs to a named log file (#409)
Rupert Swarbrick
6
-78
/
+144
2020-04-05
Allow PATH lookup for executing dtc (#432)
綺麗な賢狼ホロ
1
-1
/
+1
2020-04-05
Don't acquire load reservation in the event of a fault
Andrew Waterman
2
-2
/
+4
2020-04-05
ebreak should write mtval with 0, not pc
Andrew Waterman
3
-3
/
+3
2020-03-27
rvv: fix int_max/min value calculation
Chih-Min Chao
8
-23
/
+26
2020-03-26
rvv: fix vssraa.vi e64 corner case
Chih-Min Chao
1
-1
/
+1
2020-03-26
rvv: check vlen == slen
Chih-Min Chao
1
-0
/
+2
2020-03-24
rvv: fix vmv reg checking failure
Chih-Min Chao
3
-1
/
+6
2020-03-23
rvv: restrict segment load register rule
Chih-Min Chao
4
-3
/
+4
2020-03-23
rvv: fix WARL behavior for vxsat and vxrm
Chih-Min Chao
1
-2
/
+2
2020-03-17
rvv: fix vdiv corner case
Chih-Min Chao
2
-2
/
+2
2020-03-16
commitlog: fix build failed
Chih-Min Chao
1
-4
/
+6
2020-03-16
commitlog: fix wrong dump when exception occur
Chih-Min Chao
2
-4
/
+9
2020-03-12
rvv: commitlog: fix vrgather_vv dump
Chih-Min Chao
1
-4
/
+4
2020-03-12
rvv: fix vfmv.f.s and vfmv.s.f
Chih-Min Chao
2
-22
/
+21
2020-03-11
commitlog: fix missing dump for some instructions
Chih-Min Chao
8
-29
/
+32
2020-03-11
rvv: respect vstart and vl for vfmv.s.f
Chih-Min Chao
1
-19
/
+22
2020-03-08
Make debug printfs only show in debug builds. (#414)
Andrew Waterman
1
-6
/
+6
2020-03-08
Don't clobber trigger types when initializing state
Andrew Waterman
1
-1
/
+1
2020-03-05
rvv: fix vf(w)redsum option parsing bug
Zhen Wei
1
-4
/
+5
2020-03-05
rvv: avoid redundant std::string comparison
Zhen Wei
4
-20
/
+40
2020-03-05
rvv: update the vector fredsum algorithm
Zhen Wei
1
-15
/
+23
2020-03-05
rvv: import parallel vf(w)redsum hardware impl.
Zhen Wei
7
-16
/
+118
2020-03-03
commitlog: fix conditional building error
Chih-Min Chao
1
-1
/
+3
2020-03-03
op: update encoding
Chih-Min Chao
1
-315
/
+372
2020-03-03
commitlog: enhance vector dump
Chih-Min Chao
2
-5
/
+15
2020-03-03
rvv: handle middle value of vslidedown.vx
Chih-Min Chao
1
-1
/
+1
2020-03-03
Add do-nothing support for mcountinhibit CSR
Rupert Swarbrick
2
-0
/
+3
2020-03-03
Check presence of [S|U] extension for mstatus.[sxl|uxl] read/write
Udit Khanna
1
-7
/
+8
2020-03-03
Allow debug accesses from MMUs not bound to processors
Andrew Waterman
1
-1
/
+1
2020-03-03
Initialize some uninitialized state
Andrew Waterman
2
-1
/
+4
2020-03-03
Disallow access to debug memory region unless in debug mode
Andrew Waterman
2
-3
/
+31
2020-03-03
Debug can actually start at 0x0 now
Andrew Waterman
1
-2
/
+1
2020-03-03
rvv: vstart must be 0 for reduction instructions
Chih-Min Chao
1
-0
/
+1
2020-03-04
rvv: remove the option of vector misaligned access
Zhen Wei
9
-43
/
+30
2020-03-04
rvv: remove the option of vector impl. check
Zhen Wei
6
-802
/
+3
2020-02-27
rvv: enable --varch to parse string type options
Zhen Wei
2
-32
/
+44
2020-02-20
Revert "rvv modify the vfredsum.vs behavior with e27 xlen=32"
Max Lin
2
-54
/
+9
2020-02-20
rvv modify the vfredsum.vs behavior with e27 xlen=32
Max Lin
2
-9
/
+54
2020-02-20
rvv: only check segment overlapping in index load
Chih-Min Chao
1
-4
/
+2
2020-02-19
rvv: also relax vmerge_vim/vvm when lmul = 1
Chih-Min Chao
2
-2
/
+0
2020-02-19
rvv: also relax lmul in vfwredum
Chih-Min Chao
2
-2
/
+0
2020-02-19
commitlog: print vsew in bit
Chih-Min Chao
1
-1
/
+1
2020-02-19
rvv: don't zero vstart in the beginning
Chih-Min Chao
1
-1
/
+0
2020-02-19
Vector stores don't care if rd overlaps v0 (#400)
Andrew Waterman
5
-13
/
+20
2020-02-19
widening reductions are legal when LMUL=8
Andrew Waterman
1
-1
/
+0
2020-02-19
v[f]merge: allow v0 overlap if LMUL = 1
Andrew Waterman
2
-2
/
+0
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