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authorChih-Min Chao <chihmin.chao@sifive.com>2020-03-12 20:08:04 -0700
committerChih-Min Chao <chihmin.chao@sifive.com>2020-03-12 20:08:08 -0700
commit2f942b6966e7af68a5c49c34405371a9b32d0bf3 (patch)
tree9610366f6b623a45beb553fe113e3a2a5737fd34 /riscv
parent7217bebfe8605b5177bd59acbfae3b0f86950889 (diff)
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rvv: commitlog: fix vrgather_vv dump
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv')
-rw-r--r--riscv/insns/vrgather_vv.h8
1 files changed, 4 insertions, 4 deletions
diff --git a/riscv/insns/vrgather_vv.h b/riscv/insns/vrgather_vv.h
index 8266c95..822e197 100644
--- a/riscv/insns/vrgather_vv.h
+++ b/riscv/insns/vrgather_vv.h
@@ -11,22 +11,22 @@ VI_LOOP_BASE
case e8: {
auto vs1 = P.VU.elt<uint8_t>(rs1_num, i);
//if (i > 255) continue;
- P.VU.elt<uint8_t>(rd_num, i) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint8_t>(rs2_num, vs1);
+ P.VU.elt<uint8_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint8_t>(rs2_num, vs1);
break;
}
case e16: {
auto vs1 = P.VU.elt<uint16_t>(rs1_num, i);
- P.VU.elt<uint16_t>(rd_num, i) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint16_t>(rs2_num, vs1);
+ P.VU.elt<uint16_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint16_t>(rs2_num, vs1);
break;
}
case e32: {
auto vs1 = P.VU.elt<uint32_t>(rs1_num, i);
- P.VU.elt<uint32_t>(rd_num, i) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint32_t>(rs2_num, vs1);
+ P.VU.elt<uint32_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint32_t>(rs2_num, vs1);
break;
}
default: {
auto vs1 = P.VU.elt<uint64_t>(rs1_num, i);
- P.VU.elt<uint64_t>(rd_num, i) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint64_t>(rs2_num, vs1);
+ P.VU.elt<uint64_t>(rd_num, i, true) = vs1 >= P.VU.vlmax ? 0 : P.VU.elt<uint64_t>(rs2_num, vs1);
break;
}
}