diff options
| author | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-21 19:46:38 -0700 |
|---|---|---|
| committer | Chih-Min Chao <chihmin.chao@sifive.com> | 2020-05-21 20:45:57 -0700 |
| commit | 7eed9371f79f5c8f4675078d11a0228af9b5f571 (patch) | |
| tree | 07a0170c3ce8f301b5a79d690898997613a1664c /riscv/insns/vmv_s_x.h | |
| parent | b2ae7abe22e0f0768b4c49d686a93f9c240985da (diff) | |
| download | spike-7eed9371f79f5c8f4675078d11a0228af9b5f571.zip spike-7eed9371f79f5c8f4675078d11a0228af9b5f571.tar.gz spike-7eed9371f79f5c8f4675078d11a0228af9b5f571.tar.bz2 | |
rvv: refine vl length and elemnet size checking
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Diffstat (limited to 'riscv/insns/vmv_s_x.h')
| -rw-r--r-- | riscv/insns/vmv_s_x.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/riscv/insns/vmv_s_x.h b/riscv/insns/vmv_s_x.h index 9964901..74ab9e0 100644 --- a/riscv/insns/vmv_s_x.h +++ b/riscv/insns/vmv_s_x.h @@ -1,8 +1,7 @@ // vmv_s_x: vd[0] = rs1 require_vector; require(insn.v_vm() == 1); -require(P.VU.vsew == e8 || P.VU.vsew == e16 || - P.VU.vsew == e32 || P.VU.vsew == e64); +require(P.VU.vsew >= e8 && P.VU.vsew <= e64); reg_t vl = P.VU.vl; if (vl > 0 && P.VU.vstart < vl) { |