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| author | Dave.Wen <dave.wen@sifive.com> | 2020-05-06 00:41:53 -0700 |
|---|---|---|
| committer | Dave.Wen <dave.wen@sifive.com> | 2020-05-06 00:41:53 -0700 |
| commit | f471e0edac1be60e92b96518cb653fa5f173af07 (patch) | |
| tree | bb7a6cb41a35d2c2b9894068b9c97d92a66cb774 | |
| parent | 73d1d226249c9686481601e1e66e1818a9bfdc0f (diff) | |
| download | spike-f471e0edac1be60e92b96518cb653fa5f173af07.zip spike-f471e0edac1be60e92b96518cb653fa5f173af07.tar.gz spike-f471e0edac1be60e92b96518cb653fa5f173af07.tar.bz2 | |
fractional_lmul: update the vtype register and alos remove the useless reg_mask
| -rw-r--r-- | riscv/processor.h | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/riscv/processor.h b/riscv/processor.h index ff5c86e..af2fe0f 100644 --- a/riscv/processor.h +++ b/riscv/processor.h @@ -441,12 +441,14 @@ public: void *reg_file; char reg_referenced[NVPR]; int setvl_count; - reg_t reg_mask, vlmax, vmlen; + reg_t vlmax, vmlen; reg_t vstart, vxrm, vxsat, vl, vtype, vlenb; + reg_t vma, vta; reg_t vediv, vsew, vlmul; reg_t ELEN, VLEN, SLEN; reg_t VALU; bool vill; + bool fractional_lmul; // Microarchitecture dependent features typedef enum { |