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3 dayspinctrl: qcom: sm8250: fix pin countCaleb Connolly1-1/+1
The pin count wasn't updated when the special pins were added, as a result it was never possible to configure the special pins on SM8250 boards. Fix the pin count and allow the special pins to be configured. This fixes sdcard support on the RB5. Fixes: 58fa52042471 ("pinctr: qcom: sm8250: add special pins pins configuration data") Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
3 dayspower: regulator: add additional supported LDOs for pm8150lCaleb Connolly1-0/+7
Add the other LDOs that our rpmh driver can currently support. Some of these are used on the RB5 to power the sdcard. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Tested-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
3 daysclk: stub: add sm8150 compatible idJulius Lehmann1-0/+1
Add support for sm8150 clock controller to clk stub driver. Signed-off-by: Julius Lehmann <lehmanju@devpi.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
3 daysclk: add stub clock driverCaleb Connolly3-0/+74
Add a stub clock driver which can be used to bind clock controllers which aren't required for the platform to boot, but which are needed for U-Boot drivers to work. In addition, add a NOP parent driver to allow for binding the parent nodes of the clock. Initially this driver supports a Qualcomm platform where the MMC driver tries to fetch the RPM clock controller, which is not actually required for the device to work. Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Acked-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
4 daysmmc: Fix size calculation for sector addressed MMC version 4Marek Vasut1-1/+1
For eMMC v4 and newer that is smaller than 2 GiB, the JEDEC JESD84-B51 section 6.2.4 Configure partitions indicates that EXT_CSD SEC_COUNT should not be used to determine device size, and instead device size should be calculated from C_SIZE and C_SIZE_MULT. This is not exactly accurate, the 2 GiB limit is not a hard line, there are eMMC devices which are smaller than 2 GiB and still require device size to be determined from EXT_CSD SEC_COUNT. The hard line is instead OCR HCS bit, which indicates whether the device is byte or sector addressed, the former applies to most devices below 2 GiB, and the later applies mostly to devices above 2 GiB. However, there are a couple of devices which are smaller than 2 GiB and still set the OCR HCS bit to indicate they are sector addressed, and therefore the size calculation for those devices should also use EXT_CSD SEC_COUNT . Use mmc->high_capacity flag to discern the devices instead of arbitrary 2 GiB limit. The mmc->high_capacity flag reflects the OCR HCS bit state. Fixes: 639b7827d1ca ("mmc: fix the condition for MMC version 4") Signed-off-by: Marek Vasut <marex@denx.de>
10 daysnet: dwc_eth_qos_rockchip: Fix disable of RX/TX delay for RK3588Jonas Karlman1-2/+5
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX and/or TX delay. Currently RX/TX delay is configured as enabled using zero as delay value for the rgmii-rxid/txid/id modes. Change to disable RX and/or TX delay and using zero as delay value. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 daysnet: dwc_eth_qos_rockchip: Fix disable of RX/TX delay for RK356xJonas Karlman1-2/+5
When rgmii-rxid/txid/id phy-mode is used the MAC should not add RX and/or TX delay. Currently RX/TX delay is configured as enabled using zero as delay value for the rgmii-rxid/txid/id modes. Change to disable RX and/or TX delay and using zero as delay value. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
10 dayspinctrl: rockchip: rk3328: Fix pinmux for GPIO2-B and GPIO3-B pinsJonas Karlman1-7/+52
The pinmux bits for GPIO2-B0 to GPIO2-B6 actually have 2 bits width, correct the bank flag for GPIO2-B. The pinmux bits for GPIO2-B7 is recalculated so it remain unchanged. Add missing GPIO3-B1 to GPIO3-B7 pinmux data to rk3328_mux_recalced_data as mux register offset for these pins does not follow rockchip convention. This matches changes in following Linux commits: - e8448a6c817c ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO2-B pins") - 5ef6914e0bf5 ("pinctrl: rockchip: fix pinmux bits for RK3328 GPIO3-B pins") - 128f71fe014f ("pinctrl: rockchip: correct RK3328 iomux width flag for GPIO2-B pins") Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
11 daysled: fix coverity scan errorHeiko Schocher1-0/+4
The following was reported by Covervity scan: *** CID 541279: (TAINTED_SCALAR) /drivers/led/led-uclass.c: 284 in led_get_function_name() 278 if (!ret) { 279 snprintf(uc_plat->name, LED_MAX_NAME_SIZE, 280 "%s:%s-%d", 281 cp ? "" : led_colors[color], 282 func ? func : "", enumerator); 283 } else { >>> CID 541279: (TAINTED_SCALAR) >>> Using tainted variable "color" as an index into an array "led_colors". Fix it. Addresses-Coverity-ID: 541279 (TAINTED_SCALAR) Link: https://lists.denx.de/pipermail/u-boot/2025-February/580250.html Signed-off-by: Heiko Schocher <hs@denx.de>
11 dayspower: regulator: tps65941: Fix voltage calculation for ldoUdit Kumar1-3/+13
As per TRM[0] Section 8.7.1 "TPS6594-Q1 Registers", LDOx_Vout bit 6-1, define the NVM voltage settings. Along side table 8-4 of above TRM, shows voltage to value mapping. Driver wrongly using bits 5-1 to calculate voltage, and to convert voltage to value driver was using buck's calculation. So fix those calculation. [0]: https://www.ti.com/lit/ds/symlink/tps6594-q1.pdf Fixes: 5d7dbd22cf7d ("power: regulator: tps65941: use function callbacks for conversion ops") Signed-off-by: Udit Kumar <u-kumar1@ti.com> Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
11 daystpm: unconstify tpm_tis_chip_dataIlias Apalodimas1-1/+1
The struct contains an iomem pointer that we later remap and update. Remove const from the struct definition. Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2025-02-12pinctrl: tegra20: adjust pin type detectionSvyatoslav Ryhel1-2/+2
Pin detection on t20 depends on node name. With recent changes in node naming, let's remove '_' to be safe about both '_' or '-' use. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
2025-02-12pmic: palmas: bind sysreset to parent nodeSvyatoslav Ryhel1-2/+3
Bind SYSRESET child to parent node since it does not have its own node in the device tree. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-02-12pmic: max77663: bind children to parent nodeSvyatoslav Ryhel1-4/+5
Bind GPIO and SYSRESET children to parent node since they do not have their own nodes in the device tree. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-02-12Revert "drivers: gpio-uclass: support PMIC GPIO children"Svyatoslav Ryhel1-20/+0
Requesting of PMIC's GPIO child should be done by binding GPIO driver to PMIC's node is GPIO driver does not have its own node. This reverts commit c03cd98d1a163666b4addcdd9a34fc0c77dfd0a5. Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
2025-02-11Merge tag 'u-boot-dfu-20250211' of ↵Tom Rini9-280/+150
https://source.denx.de/u-boot/custodians/u-boot-dfu u-boot-dfu-20250211: CI: - https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/24556 Android: - Handle boot images with missing DTB Usb gadget: - Fix nullptr in g_dnl when serial# is unset - Add missing schedule() in f_mass_storage gadget - Add support for STih407 in dwc3-generic - Fix usb clocks on STih407 - Migrate STih407 to DM_USB_GADGET
2025-02-11usb: dwc3-generic: Add STih407 supportPatrice Chotard3-0/+143
Add STi glue logic to manage the DWC3 HC on STiH407 SoC family. It configures the internal glue logic and syscfg registers. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250130163547.512990-6-patrice.chotard@foss.st.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-11usb: dwc3-generic: Reorder includePatrice Chotard1-16/+4
Reorder include following rules available here : https://docs.u-boot.org/en/latest/develop/codingstyle.html#include-files Remove useless include files. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Link: https://lore.kernel.org/r/20250130163547.512990-5-patrice.chotard@foss.st.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-11usb: dwc3: Remove dwc3 glue driver support for STiPatrice Chotard3-263/+0
STi will migrate to dwc3-generic driver, dwc3-sti-glue driver can be removed. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20250130163547.512990-4-patrice.chotard@foss.st.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-11usb: gadget: f_mass_storage: Add schedule() in sleep_thread()Patrice Chotard1-0/+1
In case "ums" command is used on platforms which don't implement g_dnl_board_usb_cable_connected() and USB cable is not connected, we stay inside sleep_thread() forever and watchdog is triggered. Add schedule() call to avoid this issue. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Marek Vasut <marex@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Link: https://lore.kernel.org/r/20241202074644.5380-1-patrice.chotard@foss.st.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-10rtc: emul_rtc: Make emul_rtc_probe() staticMichal Simek1-1/+1
emul_rtc_probe() is not called from anywhere else that's why make it static. Issue is reported by build with W=1. Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-02-10net: designware: support phy io micro voltage setting.Michael Chang1-0/+12
Support phy io micro voltage setting for NPCM8XX rgmii interface. Signed-off-by: Michael Chang <zhang971090220@gmail.com>
2025-02-10pinctrl: mediatek: support reading register base address by nameWeijie Gao1-1/+5
This patch add support to read register base address by name if provided. Also devfdt_get_addr_* is changed to dev_read_addr_* to support DT live tree. Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-10pinctrl: mediatek: mt7988: remove _base from reg-namesWeijie Gao1-2/+1
The reg-names in mt7988.dtsi have no _base suffix. Remove the suffix will also make it match upstream linux format. Fixes: 8c2cb748ef5 (pinctrl: mediatek: mt7988: rename reg-names to upstream linux format) Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-07Merge patch series "led: add function naming option from linux"Tom Rini1-4/+66
Heiko Schocher <hs@denx.de> says: In linux we have the option to create the name of a led optionally through the following properties: - function - color - function-enumerator This series adds support for parsing this properties if there is no label property. Link: https://lore.kernel.org/r/20250128135246.74838-1-hs@denx.de [trini: Document name parameter in led.h]
2025-02-07led: add function naming option from linuxHeiko Schocher1-4/+66
in linux we have the option to create the name of a led optionally through the following properties: - function - color - function-enumerator This patch adds support for parsing this properties if there is no label property. The led name is created in led_post_bind() and we need some storage place for it. Currently this patch prevents to use malloc() instead it stores the name in new member : char name[LED_MAX_NAME_SIZE]; of struct led_uc_plat. While at it append led tests for the new feature. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-02-06Merge tag 'xilinx-for-v2025.04-rc2' of ↵Tom Rini3-8/+20
https://source.denx.de/u-boot/custodians/u-boot-microblaze AMD/Xilinx changes for v2025.04-rc2 fpga: - Cleanup help - Show xilinx only options on Xilinx devices ospi-versal: - Fix alignment issue - Fix cadence_qspi_flash_reset() prototype zynqmp: - Define usb_pgood_delay - Fix bootseq number versal: - Fix mini_ospi configuration versal2: - Enable OPTEE xilinx: - Enable some flashes - Clean up SYS_MALLOC_F_LEN Kconfig - Some binman fixes - DT updates - Enable mkfwumdata compilation - Enable meminfo command - Switch to LWIP and enable HTTPS
2025-02-06usb: gadget: g_dnl: Fix NULLPTR dereference when serial# is unsetMichael Ferolito1-1/+2
The current behaviour of this function will dereference a null pointer if the serial# environment variable is unset. This was discovered on a board where U-Boot did not have access to the first 256MB of ram, resulting in a board crash. In the event that U-Boot has full access to memory, it will still read from address 0, which is probably not optimal. This simple check is enough to fix it Signed-off-by: Michael Ferolito <michaelsunn101@gmail.com> Cc: Marek Vasut <marex@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Kyungmin Park <kyungmin.park@samsung.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Reviewed-by: Marek Vasut <marex@denx.de> Link: https://lore.kernel.org/r/20250128030945.1219589-1-michaelsunn101@gmail.com Signed-off-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
2025-02-05fpga: Avoid ignored-qualifiers warningAlexander Dahl1-7/+7
Fixes annoying warnings of the following type when built with W=1 (for each file including fpga.h): CC drivers/fpga/fpga.o In file included from /mnt/data/adahl/src/u-boot/include/xilinx.h:7, from /mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:10: /mnt/data/adahl/src/u-boot/include/fpga.h:61:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers] 61 | const fpga_desc *const fpga_get_desc(int devnum); | ^~~~~ /mnt/data/adahl/src/u-boot/include/fpga.h:81:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers] 81 | const fpga_desc *const fpga_validate(int devnum, const void *buf, | ^~~~~ /mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:36:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers] 36 | const fpga_desc *const fpga_get_desc(int devnum) | ^~~~~ /mnt/data/adahl/src/u-boot/drivers/fpga/fpga.c:53:1: warning: type qualifiers ignored on function return type [-Wignored-qualifiers] 53 | const fpga_desc *const fpga_validate(int devnum, const void *buf, | ^~~~~ Do some type and cast cleanup on that fpga_desc type while at it. Link: https://gcc.gnu.org/onlinedocs/gcc/Warning-Options.html#index-Wignored-qualifiers Signed-off-by: Alexander Dahl <ada@thorsis.com> Link: https://lore.kernel.org/r/20250121162213.1477506-1-ada@thorsis.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-02-05spi: cadence_qspi: Add missing prototype for cadence_qspi_flash_resetVenkatesh Yadav Abbarapu1-1/+1
Add missing prototype to fix the sparse warning, warning: no previous prototype for 'cadence_qspi_flash_reset' [-Wmissing-prototypes]. Fixes: 6d234a79e9 ("cadence_qspi: Refactor the flash reset functionality") Signed-off-by: Venkatesh Yadav Abbarapu <venkatesh.abbarapu@amd.com> Link: https://lore.kernel.org/r/20250122135334.1201562-1-venkatesh.abbarapu@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-02-05spi: cadence_qspi: Fix OSPI DDR mode alignment issuePadmarao Begari1-0/+12
If the least significant bit of the address is set to one when using the DDR protocol for data transfer then the results are indeterminate for few flash devices. To fix this the least significant bit of the address is set to zero. Signed-off-by: Padmarao Begari <padmarao.begari@amd.com> Link: https://lore.kernel.org/r/20250106095120.800753-1-padmarao.begari@amd.com Signed-off-by: Michal Simek <michal.simek@amd.com>
2025-02-04net: miiphybb: Update debug() printMarek Vasut1-1/+1
Update the debug() print, use __func__ to always print matching function name, and also print bus name in case there are multiple busses. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-04net: miiphybb: Convert ifdef DEBUG to debug()Marek Vasut1-3/+1
Replace ifdeffery with plain debug() function call. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
2025-02-04remoteproc: renesas: Synchronize caches across coresMarek Vasut1-0/+7
Explicitly flush icache on the CR52 core before jumping to the next stage software to make sure it does not contain any invalid content. Explicitly flash and invalidate dcache on the CA76 core both over the trampoline buffer and over the CR52 firmware, and then trigger full system synchronization, to make sure the data surely land in DRAM, from where the CR52 can surely pick them up. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2025-02-04Merge patch series "mediatek: final preparation for OF_UPSTREAM support"Tom Rini1-2/+3
Christian Marangi <ansuelsmth@gmail.com> says: This is the last batch of part to push actual support of OF_UPSTREAM for the mediatek SoC. The plan is to make the current downstream DTS on part with upstream implementation so we can permit a gradual transition to it while we don't cause any regression to any user. This is to have the same node downstream and upstream. Mediatek is working hard upstream to also push all the remaining nodes. All patch are the final changes after the pinctrl patch merged previously. All patch pass CI tests Link: https://github.com/u-boot/u-boot/pull/731 Link: https://lore.kernel.org/r/20250127134046.26345-1-ansuelsmth@gmail.com
2025-02-04pinctrl: mediatek: mt7981: rename reg-names to upstream linux formatChristian Marangi1-2/+3
Rename reg-names to upstream linux format. Upstream linux drop the "_base". To make use of upstream DTSI, align to the upstream naming. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com> Reviewed-by: Weijie Gao <weijie.gao@mediatek.com> Tested-by: Weijie Gao <weijie.gao@mediatek.com>
2025-02-03mmc: Allow controlling DM_MMC for VPL buildsSimon Glass1-2/+2
VPL may want to use driver model for MMC even if TPL does not. Update the rule in this driver to support that. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
2025-02-03pinctrl: starfive: Correct driver declaration for starfive_gpioHal Feng1-2/+2
Use the driver macros so that the driver appears in the linker list. Reported-by: Simon Glass <sjg@chromium.org> Fixes: 732f01aabf53 ("pinctrl: starfive: Add StarFive JH7110 driver") Signed-off-by: Hal Feng <hal.feng@starfivetech.com> Reviewed-by: Anand Moon <linux.amoon@gmail.com>
2025-01-31net: mediatek: fix coding style of AN8855 switch driverWeijie Gao1-45/+44
This patch fixed the following coding style suggested by checkpatch.pl: 1. Use tab instead of space 2. Use BIT() instead of << 3. Use mdelay for long time delay 4. Remove useless parenthesises Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-01-31pinctrl: mediatek: update mt7981 pinctrl driver based on upstream kernelWeijie Gao1-6/+45
Update mt7981 pinctrl driver based on upstream kernel Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-01-31scsi: do not fill the LUN in the second CDB byteNeil Armstrong1-6/+6
The SCSI specification originally required that the second Command Data Byte contain the LUN value in its high-order bits, but this field has been marked as reserved since the SCSI-3 spec from 1996. Some vendors uses this byte to pass vendor specific data, and specifying the LUN can trigger strange behaviors. For the record, this happened on an UFS device where LUN0 was working perfectly and reading the other LUNs would get the last buffer data that was read for LUN0, making this issue very very hard to debug. It's sane to assume U-Boot will probably never encounter an SCSI-2 multi-LUN device, if somehow it happens the enquiry command would need to get the SCSI level to handle this case. The Linux fix was added in [1] to fix the exact same issue. [1] https://lore.kernel.org/all/Pine.LNX.4.44L0.1409021108380.2308-100000@iolanthe.rowland.org/ Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2025-01-31Merge tag 'u-boot-stm32-20250131' of ↵Tom Rini2-4/+7
https://source.denx.de/u-boot/custodians/u-boot-stm STM32 MPU: - Remove dt-bindings headers available in dts/upstream - Fixes for stm32prog - Enable CONFIG_SYS_64BIT_LBA for STM32MP15/13/25 defconfigs - Add upport of ck_usbo_48m in pre-reloc stage for STM32MP13 - Clean env_get_location() for STM32MP1 - Fix board_get_usable_ram_top() to fix infinite loop in cache management for STM32MP2. - Fix ck_flexgen_08 frequency for STM32MP2 STM32 MCU: - Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F469-Disco - Tune CYCLIC_MAX_CPU_TIME_US to avoid cyclic warning for STM32F769-Disco
2025-01-31fastboot: Fix warning when CONFIG_SYS_64BIT_LBA is enablePatrice Chotard1-4/+4
If CONFIG_SYS_64BIT_LBA is enable, following compilation warning is triggered: CC drivers/fastboot/fb_mmc.o ../drivers/fastboot/fb_mmc.c: In function 'fb_mmc_erase_mmc_hwpart': ../drivers/fastboot/fb_mmc.c:215:35: warning: format '%lu' expects argument of type 'long unsigned int', but argument 2 has type 'long long unsigned int' [-Wformat=] 215 | printf("........ erased %lu bytes from mmc hwpart[%u]\n", | ~~^ | | | long unsigned int | %llu 216 | dev_desc->lba * dev_desc->blksz, dev_desc->hwpart); | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ | | | long long unsigned int ../drivers/fastboot/fb_mmc.c: In function 'fb_mmc_boot_ops': ../drivers/fastboot/fb_mmc.c:261:42: warning: format '%lu' expects argument of type 'long unsigned int', but argument 2 has type 'long long unsigned int' [-Wformat=] 261 | printf("........ wrote %lu bytes to EMMC_BOOT%d\n", | ~~^ | | | long unsigned int | %llu 262 | blkcnt * blksz, hwpart); | ~~~~~~~~~~~~~~ | | | long long unsigned int Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Acked-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2025-01-31stm32: remove dt-binding headers that are available upstreamPatrick Delaunay1-0/+3
Some dt-binding headers mask the upstream ones which can lead to build failures, or worse: super weird bugs, if they get out of sync. Remove these headers so our devicetree and binding headers will both be in sync with upstream. Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
2025-01-30net: phy: Add RGMII RX/TX delay handling to DP83822 PHYMarek Vasut1-1/+47
The TI DP83822 does have support for configurable RGMII RX/TX clock shift, add support for parsing DT properties which describe the RX/TX clock shift configuration and configuration of the matching bits in RCSR register. The shift is only configurable on DP83822, the other PHYs supported by this PHY driver, namely DP83825/DP83826 variants, do not implement this functionality and the RCSR bits used to configure the clock shift are missing from those PHYs. The shift is configurable separately for RX and TX path. Each path can either enable the shift or disable the shift using single bit. In case the shift is disabled, a delay of 0ns is added to the path, otherwise a delay of 3.5ns is added to the path. Note that the two RCSR bits 11 and 12 have inverted logic, RCSR bit 12 enables RX internal shift when SET, while RCSR bit 11 enables TX shift when UNSET. Signed-off-by: Marek Vasut <marex@denx.de>
2025-01-30Merge patch series "Add support for MediaTek MT7987 SoC"Tom Rini6-2/+1609
Weijie Gao <weijie.gao@mediatek.com> says: This patch series add support for MediaTek MT7987 SoC with its reference boards and related drivers. This patch series add basic boot support on eMMC/SD/SPI-NOR/SPI-NAND for these boards. The clock, pinctrl drivers and the SoC initializaton code are also included. Link: https://lore.kernel.org/r/cover.1737621362.git.weijie.gao@mediatek.com
2025-01-30mmc: mediatek: add support for MediaTek MT7987 SoCsWeijie Gao1-2/+19
This patch adds eMMC/SD support for MT7987 SoC Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-01-30pinctrl: mediatek: add pinctrl driver for MT7987 SoCWeijie Gao3-0/+741
This patch adds pinctrl and gpio support for MT7987 SoC Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-01-30clk: mediatek: add clock driver support for MediaTek MT7987 SoCWeijie Gao2-0/+849
This patch adds clock driver support for MediaTek MT7987 SoC Signed-off-by: Sam Shih <sam.shih@mediatek.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
2025-01-29net: ravb: Staticize bb_miiphy functionsMarek Vasut1-7/+7
These functions can be static as they are referenced only in this file. Make them static. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
generated by cgit v1.1 at 2025-03-01 07:37:26 +0000