rocket-tools/riscv-gnu-toolchain/qemu/roms/u-boot.git - Unnamed repository; edit this file 'description' to name the repository.

Age	Commit message (Expand)	Author	Files	Lines
2019-05-09	riscv: Introduce CONFIG_XIP to support booting from flash	Rick Chen	1	-0/+7
2019-04-08	riscv: Add a SYSCON driver for Andestech's PLMT	Rick Chen	1	-0/+9
2019-04-08	riscv: Add a SYSCON driver for Andestech's PLIC	Rick Chen	1	-0/+9
2019-04-08	riscv: add support for multi-hart systems	Lukas Auer	1	-0/+4
2019-04-08	riscv: implement IPI platform functions using SBI	Lukas Auer	1	-0/+5
2019-04-08	riscv: add infrastructure for calling functions on other harts	Lukas Auer	1	-0/+19
2019-02-27	riscv: Add SiFive FU540 board support	Anup Patel	1	-0/+4
2019-02-27	riscv: Rename cpu/qemu to cpu/generic	Anup Patel	1	-1/+1
2018-12-18	riscv: Enlarge the default SYS_MALLOC_F_LEN	Bin Meng	1	-0/+3
2018-12-18	riscv: qemu: Add platform-specific Kconfig options	Bin Meng	1	-0/+1
2018-12-18	riscv: Implement riscv_get_time() API using rdtime instruction	Anup Patel	1	-0/+8
2018-12-18	riscv: Add a SYSCON driver for SiFive's Core Local Interruptor	Bin Meng	1	-0/+9
2018-12-18	riscv: Introduce a Kconfig option for machine mode	Anup Patel	1	-5/+16
2018-12-18	riscv: add Kconfig entries for the code model	Lukas Auer	1	-0/+18
2018-12-05	riscv: Add kconfig option to run U-Boot in S-mode	Anup Patel	1	-0/+5
2018-11-26	riscv: cache: Implement i/dcache [status, enable, disable]	Rick Chen	1	-0/+6
2018-11-26	riscv: add Kconfig entries for the C and A ISA extensions	Lukas Auer	1	-0/+11
2018-11-26	riscv: select CONFIG_PHYS_64BIT on RV64I systems	Lukas Auer	1	-0/+1
2018-11-26	riscv: rename CPU_RISCV_32/64 to match architecture names ARCH_RV32I/64I	Lukas Auer	1	-8/+8
2018-10-03	riscv: Add QEMU virt board support	Bin Meng	1	-0/+4
2018-10-03	riscv: kconfig: Normalize architecture name spelling	Bin Meng	1	-3/+3
2018-05-29	riscv: cpu: nx25: Rename as ax25	Rick Chen	1	-3/+3
2018-01-12	riscv: Add Kconfig to support RISC-V	Rick Chen	1	-0/+42