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| author | Rick Chen <rick@andestech.com> | 2019-04-30 13:49:33 +0800 |
|---|---|---|
| committer | Andes <uboot@andestech.com> | 2019-05-09 16:46:46 +0800 |
| commit | bdce38965e79143ed58bf1c6d39c650ff3dfefd1 (patch) | |
| tree | dfb6c4288f22c176838ace87fed0949dd747a7dc /arch/riscv/Kconfig | |
| parent | 8aa278df0a338dfc05c731589051ab80373925c5 (diff) | |
| download | u-boot-bdce38965e79143ed58bf1c6d39c650ff3dfefd1.zip u-boot-bdce38965e79143ed58bf1c6d39c650ff3dfefd1.tar.gz u-boot-bdce38965e79143ed58bf1c6d39c650ff3dfefd1.tar.bz2 | |
riscv: Introduce CONFIG_XIP to support booting from flash
When U-Boot boots from flash, during the boot process,
hart_lottery and available_harts_lock variable addresses
point to flash which is not writable. This causes boot
failures on AE350. Introduce a config option CONFIG_XIP
to support such configuration.
Signed-off-by: Rick Chen <rick@andestech.com>
Cc: Greentime Hu <greentime@andestech.com>
Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Diffstat (limited to 'arch/riscv/Kconfig')
| -rw-r--r-- | arch/riscv/Kconfig | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ae8ff7b..362f3cd 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -162,6 +162,13 @@ config SBI_IPI default y if RISCV_SMODE depends on SMP +config XIP + bool "XIP mode" + help + XIP (eXecute In Place) is a method for executing code directly + from a NOR flash memory without copying the code to ram. + Say yes here if U-Boot boots from flash directly. + config STACK_SIZE_SHIFT int default 13 |