From bdce38965e79143ed58bf1c6d39c650ff3dfefd1 Mon Sep 17 00:00:00 2001 From: Rick Chen Date: Tue, 30 Apr 2019 13:49:33 +0800 Subject: riscv: Introduce CONFIG_XIP to support booting from flash When U-Boot boots from flash, during the boot process, hart_lottery and available_harts_lock variable addresses point to flash which is not writable. This causes boot failures on AE350. Introduce a config option CONFIG_XIP to support such configuration. Signed-off-by: Rick Chen Cc: Greentime Hu Reviewed-by: Lukas Auer Reviewed-by: Bin Meng --- arch/riscv/Kconfig | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'arch/riscv/Kconfig') diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index ae8ff7b..362f3cd 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -162,6 +162,13 @@ config SBI_IPI default y if RISCV_SMODE depends on SMP +config XIP + bool "XIP mode" + help + XIP (eXecute In Place) is a method for executing code directly + from a NOR flash memory without copying the code to ram. + Say yes here if U-Boot boots from flash directly. + config STACK_SIZE_SHIFT int default 13 -- cgit v1.1