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| author | Jonathan Cameron <Jonathan.Cameron@huawei.com> | 2024-09-16 18:35:17 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2024-11-04 16:03:24 -0500 |
| commit | 14bd0f3865489d537a93b7c80617622473f224e4 (patch) | |
| tree | e2b4691002a2a8834973ab9adf79d8d08bcf708e /hw/intc | |
| parent | ea3f0ebc1a3ba380e682ea8aad38f8e8cbc0d6f7 (diff) | |
| download | qemu-14bd0f3865489d537a93b7c80617622473f224e4.zip qemu-14bd0f3865489d537a93b7c80617622473f224e4.tar.gz qemu-14bd0f3865489d537a93b7c80617622473f224e4.tar.bz2 | |
hw/mem/cxl-type3: Add properties to control link speed and width
To establish performance characteristics of a CXL device when used via a
particular CXL topology (root ports, switches, end points) it is necessary
to set the appropriate link speed and width in the PCI Express capability
structure. Provide x-speed and x-link properties for this.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240916173518.1843023-6-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/intc')
0 files changed, 0 insertions, 0 deletions