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Age	Commit message (Expand)	Author	Files	Lines
2024-05-25	[Support] Fix LEB128 test when building with MSVC (#93184)	Alexandre Ganea	1	-7/+13
2024-05-25	[llvm] Revise IDE folder structure (#89741)	Michael Kruse	56	-113/+158
2024-05-25	[VPlan] Remove unused Range arg from createWidenInductionRecipe (NFC).	Florian Hahn	1	-4/+3
2024-05-24	[flang] [lldb] [llvm] Fix 'destory' comment typos [NFC] (#93260)	Stephan T. Lavavej	2	-3/+3
2024-05-25	[llvm] Include the GenVT.inc to getEnumName (#93198)	Brandon Wu	1	-206/+3
2024-05-25	Reland "[SimplifyCFG] `switch`: Do Not Transform the Default Case if the Cond...	Qiongsi Wu	2	-0/+38
2024-05-25	Reland "[SimplifyCFG] When only one case value is missing, replace default wi...	DianQK	3	-10/+142
2024-05-25	[LV, VPlan] Check if plan is compatible to EVL transform (#92092)	Shih-Po Hung	5	-174/+33
2024-05-24	[RISCV] Fix spelling error in test names. NFC	Craig Topper	2	-0/+0
2024-05-24	[RISCV] PseudoMovImm is not a IsSignExtendingOpW instruction.	Craig Topper	1	-2/+2
2024-05-24	[nfc][InstCombine]Find PHI incoming block by operand number (#93249)	Mingming Liu	1	-20/+13
2024-05-24	[test][EntryExitInstrumenter] Update/add tests	Arthur Eubanks	2	-67/+102
2024-05-24	[llvm-profgen] Improve sample profile density (#92144)	Lei Wang	3	-52/+120
2024-05-24	[RISCV] Do not check PostRAScheduler in enablePostRAScheduler (#92781)	Michael Maitland	6	-12/+11
2024-05-24	[Support] Remove terminfo dependency (#92865)	Aaron Siddhartha Mondal	14	-172/+10
2024-05-24	[memprof] Call llvm::SmallVector::reserve (#93324)	Kazu Hirata	1	-0/+2
2024-05-24	[ConstantRange][LVI] Add support for `multiplyWithNoWrap`	Antonio Frighetto	5	-11/+154
2024-05-24	[AArch64][SVE] Lower function arguments in types of arrays of predicates (#90...	Zhaoshi Zheng	4	-8/+344
2024-05-24	[LV] fix logical error in trunc cost (#91136)	Ramkumar Ramachandra	3	-34/+259
2024-05-24	[RISCV] Replace std::optional::value() with operator*. NFC	Craig Topper	1	-4/+4
2024-05-24	[LAA] rewrite a test to make it more robust (#93197)	Ramkumar Ramachandra	1	-22/+33
2024-05-24	[SelectionDAG][RISCV][VE] Rename VP_ASHR->VP_SRA VP_LSHR->VP_SRL. (#93221)	Craig Topper	6	-43/+43
2024-05-24	[memprof] Use a SetVector (NFC) (#93312)	Kazu Hirata	1	-11/+7
2024-05-24	[WebAssembly] Implement prototype f16x8.extract_lane instruction. (#93272)	Brendan Dahl	6	-1/+29
2024-05-24	[X86] combineBitcastToBoolVector - add XOR + Constant handling, match existin...	Simon Pilgrim	2	-14/+34
2024-05-24	[LV][NFC] precommit test for EVL transform (#92203)	Shih-Po Hung	1	-0/+175
2024-05-24	[X86] Add test case for #93000	Simon Pilgrim	1	-0/+45
2024-05-24	[MemProf] Fix tailcall discovery checking for multiple callee chains (#92632)	Teresa Johnson	3	-47/+45
2024-05-24	[DAG] visitFunnelShift - pull out repeated SDLoc.	Simon Pilgrim	1	-13/+15
2024-05-24	[X86] funnel-shifts.ll - add VBMI2 and non-uniform shift amounts test coverage	Simon Pilgrim	1	-363/+458
2024-05-24	[SLP]Improve/fix extracts calculations for non-power-of-2 elements.	Alexey Bataev	8	-308/+214
2024-05-24	[SPIR-V] Update docs to describe support of SPV_KHR_shader_clock (#93168)	Vyacheslav Levytskyy	1	-0/+2
2024-05-24	[SPIR-V] Enable spirv-val in SPV_KHR_shader_clock test (#93292)	Sven van Haastregt	1	-1/+1
2024-05-24	[SPIR-V] Inline assembly support (#93164)	Vyacheslav Levytskyy	22	-15/+440
2024-05-24	[X86] canCreateUndefOrPoisonForTargetNode - SSE vector shifts handle out of b...	Simon Pilgrim	2	-6/+7
2024-05-24	[NFC][LLVM] Clean up TLI VECFUNC macros. (#93178)	Paul Walker	3	-17/+13
2024-05-24	[LAA] increase test coverage in symbolic-stride (#92253)	Ramkumar Ramachandra	1	-0/+121
2024-05-24	[LV] add test for #47665, #88802 (#91135)	Ramkumar Ramachandra	2	-0/+56
2024-05-24	[VPlan] Use DomTreeUpdater to automatically update DT for vector loop. (#92525)	Florian Hahn	3	-59/+23
2024-05-24	[gn build] Port 5a48223d1c34	LLVM GN Syncbot	1	-1/+0
2024-05-23	Revert "[AMDGPU] Add AMDGPU-specific module splitting" (#93275)	Vitaly Buka	21	-1560/+0
2024-05-24	Fix build warning for 4def1ce10 (#93274)	Freddy Ye	1	-1/+0
2024-05-24	Revert "Run ObjCContractPass in Default Codegen Pipeline (#92331)"	Nikita Popov	18	-100/+28
2024-05-24	[X86][EVEX512] Move 512-bit operations under useAVX512Regs	Phoebe Wang	2	-3/+21
2024-05-24	[gn build] Port 4def1ce10128	LLVM GN Syncbot	1	-2/+0
2024-05-24	Reland "[X86] Remove knl/knm specific ISAs supports (#92883)" (#93136)	Freddy Ye	29	-631/+113
2024-05-24	LangRef: Rephrase fma description to avoid referring to libm (#92729)	Matt Arsenault	1	-2/+2
2024-05-24	[M68k] Fix compilation pipeline check	Michael Liao	1	-0/+4
2024-05-24	[PowerPC] handle toc-data in load selection of fast-isel (#91916)	Chen Zheng	3	-16/+21
2024-05-23	[WebAssembly] Implement prototype f16x8.splat instruction. (#93228)	Brendan Dahl	7	-4/+39