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path: root/llvm/test/Transforms/LoopVectorize/RISCV
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18 hours[LV] Transform tests for early-exit with stores (#183288)Graham Hunter1-0/+1125
3 days[IVDescriptors] Remove function FMF attribute check for FP min/max reduction ...Mel Chen3-54/+51
5 daysRevert "[VPlan] Remove manual region removal when simplifying for VF and UF. ...Florian Hahn2-8/+21
6 days[VPlan] Remove manual region removal when simplifying for VF and UF. (#181252)Florian Hahn2-21/+8
6 days[VPlan] Add nuw to unrolled canonical IVs (#183716)Luke Lau2-6/+6
6 daysRevert "[VPlan] Don't drop NUW flag on tail folded canonical IVs (#183301)" (...Luke Lau26-176/+176
6 days[VPlan] Don't drop NUW flag on tail folded canonical IVs (#183301)Luke Lau26-176/+176
9 days[RISCV][llvm] Rename zvqdotq to zvdot4a8i (#179393)Brandon Wu1-287/+287
2026-02-17[NFC][VPlan] Test showing that unit-stride-mv should be done later in pipelin...Andrei Elovikov1-0/+158
2026-02-16[VPlan] Directly unroll VectorEndPointerRecipe (#172372)Ramkumar Ramachandra5-270/+113
2026-02-12[VPlan] Explicitly reassociate header mask in logical and (#180898)Luke Lau1-2/+1
2026-02-12[LV] Add LoopVectorize/VPlan subdirectory for VPlan printing tests. (#180611)Florian Hahn4-517/+0
2026-02-11[LAA] Use SCEVPtrToAddr in tryToCreateDiffChecks. (#178861)Florian Hahn6-190/+190
2026-02-06[VPlan] Ignore poison incoming values when creating blend (#180005)Luke Lau1-4/+2
2026-02-03[VPlan] Sink recipes from the vector loop region in licm. (#168031)Mel Chen3-48/+50
2026-01-28[LV] Pre-commit test for sinking the recipe into vector early exit block. nfc...Mel Chen1-0/+104
2026-01-27[RISCV] Set the reciprocal throughtput cost for division to TTI::TCC_Expensiv...Ryan Buchner1-2/+2
2026-01-20[LV][NFC] Update low trip count tail-folding tests (#176898)David Sherwood1-0/+116
2026-01-17[LV] Add missing coverage for LV cost model code paths.Florian Hahn1-0/+60
2026-01-16[LV] Prevent `extract-lane` generate unused IRs with single vector operand. ...Elvis Wang5-15/+0
2026-01-15[VPlan] Explicitly test EVL recipe has "evl" name. NFCLuke Lau1-6/+6
2026-01-14[VPlan] Replace PhiR operand of ComputeRdxResult with VPIRFlags. (#174026)Florian Hahn1-4/+4
2026-01-13[VPlan] Allow VPInstruction::PtrAdd as a user of EVL (#175506)Luke Lau1-0/+47
2026-01-13[LV][NFC] Follow-up fix for #173262 (#175513)Mel Chen1-7/+6
2026-01-12[VPlan] Remove verifier check that EVL can only be used by VPInstruction with...Luke Lau1-0/+64
2026-01-12[LV] Simplify extract-lane with scalar operand to the scalar value itself. (#...Elvis Wang2-18/+3
2026-01-07[LV] Teach m_One, m_ZeroInt patterns to look through broadcasts (#170159)David Sherwood18-200/+92
2026-01-07[LV][EVL] Add test case for issue #173260. nfc (#173262)Mel Chen1-0/+197
2026-01-07[LV] Conservatively predicate SDiv/SRem (#170818)Shih-Po Hung2-11/+385
2026-01-06Reland [VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#174581)Ramkumar Ramachandra30-235/+235
2026-01-06Revert "[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr)" (#174559)Alex Bradbury30-218/+251
2026-01-06[VPlan] Simplify pow-of-2 (mul|udiv) -> (shl|lshr) (#172477)Ramkumar Ramachandra30-251/+218
2026-01-06[IR] Split vector.splice into vector.splice.left and vector.splice.right (#17...Luke Lau1-8/+8
2025-12-18[VPlan] Extract reverse operation for reverse accesses (#146525)Mel Chen5-49/+50
2025-12-18[LV][EVL] Add test case for checking debug info when tail folding by EVL. nfc...Mel Chen1-0/+93
2025-12-15[VPlan] Directly unroll VectorPointerRecipe (#168886)Ramkumar Ramachandra1-25/+15
2025-12-08[VPlan] Use nuw when computing {VF,VScale}xUF (#170710)Ramkumar Ramachandra2-19/+19
2025-12-08[VPlan] Use BlockFrequencyInfo in getPredBlockCostDivisor (#158690)Luke Lau1-0/+115
2025-11-29[VPlan] Skip cost verification for loops with EVL gather/scatter.Florian Hahn1-0/+116
2025-11-28[VPlan] Skip uses-scalars restriction if one of ops needs broadcast. (#168246)Florian Hahn1-3/+3
2025-11-27[VPlan] Handle scalar VPWidenPointerInd in convertToConcreteRecipes. (#169338)Florian Hahn1-0/+100
2025-11-27[VPlan] Optimize LastActiveLane to EVL - 1 (#169766)Luke Lau6-39/+7
2025-11-26Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding....Florian Hahn6-280/+229
2025-11-26Revert "Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-...Florian Hahn6-229/+280
2025-11-26Reapply "[LV] Use ExtractLane(LastActiveLane, V) live outs when tail-folding....Florian Hahn6-280/+229
2025-11-26[VPlan] Use DL index type consistently for GEPs (#169396)Ramkumar Ramachandra6-124/+124
2025-11-25[VPlan] Include flags in VectorPointerRecipe::printRecipe (#169466)Ramkumar Ramachandra3-14/+14
2025-11-24Reland [VPlan] Handle WidenGEP in narrowToSingleScalars (#167880)Ramkumar Ramachandra1-7/+7
2025-11-21[VPlan] Drop poison-generating flags on induction trunc (#168922)Ramkumar Ramachandra1-24/+24
2025-11-18[VPlan] Hoist loads with invariant addresses using noalias metadata. (#166247)Florian Hahn1-3/+3
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