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AgeCommit message (Expand)AuthorFilesLines
8 days[VPlan] Remove VPVectorPointer for part 0 after unrolling. (#149735)Florian Hahn4-44/+22
2025-06-09[VPlan] Add ReductionStartVector VPInstruction. (#142290)Florian Hahn1-1/+1
2025-06-02[LV] Move VPlan-based calculateRegisterUsage to VPlanAnalysis (NFC). (#135673)Florian Hahn1-2/+2
2025-05-27[VPlan] Connect Entry to scalar preheader during initial construction. (#140132)Florian Hahn1-2/+2
2025-05-06[VPlan][LV] Fix invalid truncation in VPScalarIVStepsRecipe (#137832)Maryam Moghadas1-0/+93
2025-04-08[LV] Compute register usage for interleaving on VPlan. (#126437)Florian Hahn3-252/+140
2025-03-28[VPlan] Add VF as operand to VPScalarIVStepsRecipe.Florian Hahn1-1/+2
2025-03-26[VPlan] Generalize SCALAR-STEPS removal to any unroll factor.Florian Hahn5-26/+16
2025-03-25[VPlan] Remove no-op SCALAR-STEPS after unrolling. (#123655)Florian Hahn5-28/+18
2025-03-19[LV] Don't skip instrs with side-effects in reg pressure computation. (#126415)Florian Hahn1-2/+2
2025-02-20[LV] Regen a couple of tests with UTC (#127785)Ramkumar Ramachandra2-26/+458
2025-02-09[VPlan] Add incoming values for all predecessor to ResumePHI (NFCI).Florian Hahn2-9/+9
2024-12-29[VPlan] Compute induction end values in VPlan. (#112145)Florian Hahn1-27/+27
2024-12-17[VPlan] Remove reverse() of predecessors from VPInstruction::generate.Florian Hahn2-12/+12
2024-12-17[VPlan] Propagate all GEP flags (#119899)Nikita Popov1-1/+1
2024-12-15[VPlan] Modernize VPWidenIntOrFpInductionRecipe printing (NFC).Florian Hahn1-1/+1
2024-12-12[VPlan] Hook IR blocks into VPlan during skeleton creation (NFC) (#114292)Florian Hahn1-0/+6
2024-12-06Reapply "[VPlan] Update scalar induction resume values in VPlan. (#110577)"Florian Hahn2-9/+8
2024-12-06Revert "[VPlan] Update scalar induction resume values in VPlan. (#110577)"Nikita Popov2-8/+9
2024-12-06[VPlan] Update scalar induction resume values in VPlan. (#110577)Florian Hahn2-9/+8
2024-11-17[LV] Vectorize Epilogues for loops with small VF but high IC (#108190)Julian Nagele2-30/+79
2024-11-08[Analysis] atan2: isTriviallyVectorizable; add to massv and accelerate veclib...Tex Riddell1-0/+46
2024-11-06[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)Paul Walker2-34/+34
2024-11-04[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)zhijian lin1-1/+1
2024-09-22[VPlan] Run DCE after unrolling.Florian Hahn2-161/+0
2024-09-10[VPlan] Add VPValue for VF, use it for VPWidenIntOrFpInductionRecipe. (#95305)Florian Hahn1-1/+2
2024-09-03Prefer use of 0.0 over -0.0 for fadd reductions w/nsz (in IR) (#106770)Philip Reames2-2/+2
2024-08-30Regen a bunch of vectorizer tests to avoid naming churn in upcoming reviewPhilip Reames1-8/+8
2024-08-12[VPlan] Mark VPVectorPointer as only using the first part of the ptr.Florian Hahn1-7/+0
2024-07-20[VPlan] Remove VPPredInstPHIRecipes without users after region merging.Florian Hahn1-2/+0
2024-07-16[VPlan] Update test to use CHECK variables.Florian Hahn1-26/+26
2024-07-05[VPlan] Model branch cond to enter scalar epilogue in VPlan. (#92651)Florian Hahn1-2/+2
2024-06-20[VPlan] Model middle block via VPIRBasicBlock. (#95816)Florian Hahn1-1/+1
2024-06-15[LV] Add tests with multiple conditions feedin exit branches.Florian Hahn1-0/+175
2024-05-22[LoopVectorize] optimal-epilog-vectorization-profitability.ll - fix LABLE -> ...Simon Pilgrim1-4/+4
2024-04-09[VPlan] Dont assign slots to VPValues with an underlying value.Florian Hahn1-18/+18
2024-04-04[LV, VP]VP intrinsics support for the Loop Vectorizer + adding new tail-foldi...Alexey Bataev2-0/+168
2024-02-28[LV] Remove unused configuration option (#82955)Nilanjana Basu1-2/+2
2024-01-31[VPlan] Update stale test after 9536a6286, fix formatting.Florian Hahn1-72/+72
2024-01-04[LV] Change loops' interleave count computation (#73766)Nilanjana Basu4-491/+392
2024-01-01[VPlan] Model address separately. (#72164)Florian Hahn1-108/+108
2023-11-22[LV] Reduce memory-check-threshold for test to preserve original test.Florian Hahn1-1/+1
2023-10-26[opt] Infer DataLayout from triple if not specifiedAlex Richardson1-14/+13
2023-10-04Regenerate test checks for tests affected by D141060Alex Richardson1-9/+9
2023-10-02Fix mechanism propagating mangled names for TLI function mappings (#66656)JolantaJensen1-4/+4
2023-08-14[PowerPC] vector cost model add cost to extract i1Roland Froese1-0/+29
2023-06-12[LoopVectorize] Convert most tests to opaque pointers (NFC)Nikita Popov1-508/+394
2023-05-17[NFC][Py Reformat] Reformat lit.local.cfg python files in llvmTobias Hieta1-1/+1
2023-02-28[LV] Reland "Update logic for calculating register usage due to invariants"sgokhale1-1/+1
2023-02-28Revert "[LV] Update logic for calculating register usage due to invariants"sgokhale1-1/+1
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